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Ordering number: EN 4092B
Monolithic Linear IC
LA1862M
Single-chip Tuner System for Car Stereo
Overview
The LA1862M is a single-chip car stereo FM IF/NC/MPX tuner IC which offers improved IF stability and S-meter characteristics, compared with the LA1861M. The LA1862M makes the design of high-performance FM tuners at low cost easy.
Package Dimensions
unit : mm
3129-MFP36S
[LA1862M]
Functions
. IF amplifier . Peak detector . AF preamplifier . AFC output . S-meter driver . Soft mute circuit . IF buffer output . Noise canceller . Adjustment-free VCO . Pilot signal canceller . SNC High-cut control (HCC)
Features
SANYO : MFP36S
. Pin compatible with the LA1861M . Improved I/O S-meter characteristics . Excellent sound quality at low input levels . Easy adjustment of muting characteristics . Because this device has a 36-pin flat package, it requires few
external components and offers excellent cost performance.
Specifications
Maximum Ratings at Ta = 25C
Parameter Maximum supply voltage Allowable power dissipation Input voltage Input current Output current Operating temperature Storage temperature Symbol VCC max Pd max VIN IF VIN MPX IL max ISD max Topr Tstg Pin 8 Ta = 25C Pin 36-35 (IF input) Pin 26 (NC-MPX input) Pin 25 (stereo lamp drive current) Pin 5 (SD output) Conditions Ratings 10 720 0.7 1.0 20 1.0 -30 to +80 -40 to +150 Unit V mW Vp-p Vrms mA mA C C
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
63098HA(II)/N0893TS A8-8753/O022 TS No.4092-1/27
LA1862M
Operating Conditions at Ta = 25C
Parameter Recommended supply voltage Operating supply voltage range Symbol VCC VCC op Conditions Ratings 8.5 7.5 to 10 Unit V V
Operating Characteristics at Ta = 25C, VCC = 8.5 V, f = 10.7 MHz, unless otherwise noted SW-1 is off.
Parameter Quiescent current Current drain Demodulator output voltage Symbol ICCO ICC-100 VO THD 1 Total harmonic distortion THD 2 Signal-to-noise ratio Input limiting voltage Muting attenuation (1) Muting attenuation (2) Muting bandwidth AM rejection ratio Muting drive output voltage S/N VIN lim Mute Att Mute Att BW Mute AMR V5-0 V5-100 V1-0 V1-50 V1-100 VIF-ON Zin VNO tgate SN Sep Conditions No input signal VIN = 100 dB VIN = 100 dB, f = 1 kHz, 100% modulation, pin 15 output Mono, VIN = 100 dB, f = 1 kHz, 100% modulation, pin 15 output Stereo (L + R), VIN = 100 dB, f = 1 kHz, 100% modulation, pin 15 output VIN = 100 dB, f = 1 kHz, 100% modulation VIN = 100 dB reference, 3 dB audio output attenuation, IF input level, soft muting ON V5 = 5 V, VIN = 100 dB, f = 1 kHz, 100% modulation V5 = 2 V, VIN = 100 dB, f = 1 kHz, 100% modulation VIN = 100 dB, V5 = 2 V VIN = 100 dB, 400 Hz, 100% modulated FM carrier. 1 kHz, 30% modulated AM interference signal No input signal VIN = 100 dB No input signal VIN = 50 dB VIN = 100 dB IF input level at IF COUNT ON. SW-1 is ON. VIN = 100 dB. SW-1 is ON. f = 1 kHz Pin 26 connected to ground VIN = 100 mVp-p, 1 s pulsewidth, f = 1 kHz VIN = 1 s pulsewidth, f = 1 kHz f = 1 kHz, 90% L+R signal modulation. 10% pilot signal modulation, IHF bandpass filter. Pilot signal level when the LED turns ON. LED ON level - LED OFF level CR = | (f - 456)/456 x 100 | 90% L + R signal modulation. 10% pilot signal modulation. 67 kHz, 10% modulated SCA signal V14 = 0.6 V, 90% L - R signal modulation. 10% pilot signal modulation V14 = 0.1 V, 90% L - R signal modulation. 10% pilot signal modulation V13 = 0.6 V, 90% L + R signal modulation. 10% pilot signal modulation V = 1.1 V, 90% L + R signal modulation. 10% pilot signal modulation f = 50 Hz, V = 100 mVrms | Pin 15 output - pin 16 output | Left channel adjusted and measured DIN audio filter. See Note. Minimum stereo drive current IL = 10 mA min typ 45 47 350 0.3 0.3 64 32 21 5 135 47 3.5 71 41 25 10 200 60 4.7 0 0.1 1.9 6.4 53 300 20 27 23 50 29 15 305 max 70 72 495 1.2 1.2 Unit mA mA mVrms % % dB dB dB dB kHz dB V V V dB mVrms k V s mVp-o dB 5.0 6.5 % dB % dB -3.0 5 -15 -2.0 27 0 15 1.0 1.0 22 -5 0 0 dB mV dB dB dB dB dB mA V
225
S-meter output voltage IF COUNT output sensitivity IF buffer output voltage Input impedance Output noise voltage Gate time Noise sensitivity Channel separation Stereo indicator threshold level Stereo indicator hysteresis Capture range SCA rejection ratio SNC output attenuation SNC output voltage
1.1 5.4 44 200
0.3 0.5 2.7 7.4 62 480
13
35 35
36 1.0
50 2.5 3.2 1.2 75
hy C.R SCA rej AttSNC VOsub AttHCC1
-12.0
-7.5
High-out control attenuation AttHCC2 Ripple rejection Channel balance Pilot signal attenuation Stereo indicator LED current Pin 25 saturation voltage Rr CB
1.5
Note: When a filter is not specified, connect an IHF bandpass filter to the MPX outputs.
No. 4092- 2/27
LA1862M
Allowable power dissipation, Pd max - mW
Specified board (80 x 40 x 2 mm3 glass epoxy resin)
Independent IC
Ambient temperature, Ta - C
Test Circuit
Unit (resistance: , capacitance: F)
No. 4092- 3/27
LA1862M
Pin Description
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 S-meter output IF buffer sensitivity control IF buffer output Muting threshold control Muting drive control output Noise sensitivity control Noise AGC sensitivity control Supply voltage (VCC) Gate time control output Peak hold network connection Lowpass filter output High-cut attenuation control High-cut control input SNC control input MPX left-channel audio output MPX right-channel audio output Pilot cancel signal input Pilot cancel signal output Pilot detector capacitor connection 1 Pilot detector capacitor connection 2 External VCO (F23) connection Phase detector network connection 1 Phase detector network connection 2 PLL input Stereo indicator LED driver output Noise canceller input Ground Audio muting amplifier output (AF output) AFC output Peak detector input IF signal output Muting attenuation control Voltage reference output Pilot signal canceller detector IF input IF bypass input Description
No. 4092- 4/27
LA1862M
Sample Application Circuit
Frequency divider
Unit (resistance: , capacitance: F)
PCB Pattern
Unit (resistance: , capacitance: F)
No. 4092- 5/27
Sample Application Circuit (USA)
(Mitsumi)
gain
Frequency divider
LA1862M
Note 1: Used to change the SD sensitivity Note 2: When LOC goes HIGH, the IF count and SD sensitivity shift by 25 dB No. 4092- 6/27
See note 1.
Unit (resistance: , capacitance: F)
LA1862M
Pin Functions
Pin No. Function Equivalent circuit Remarks
FM S-meter detector
1
S-meter output
Current-drive waveform S-meter circuit
IF amplifier
2
IF buffer ON adjust
3
IF buffer output
Control signal: SEEK when HIGH (VDD) STOP when LOW (GND) Pin 3 should be left open if not using the IF count
Inversion circuit
4
Mute adjust
Continued on next page.
No. 4092- 7/27
LA1862M
Continued from preceding page.
Pin No. Function Equivalent circuit Remarks
Mute circuit Mute band detector S-meter detector
5
Mute drive
6
Noise sensitivity adjust
Noise demodulator
7
Noise AGC
Pulse detector 9 Gate time adjust
Gate circuit
Pin 9 voltage
The gate is open when the voltage on pin 9 is 1.4 V (2VD) or higher.
10
Memory circuit To MPX input Gate
11
LPF output
Subtraction circuit
17
Pilot cancel signal input
Continued on next page.
No. 4092- 8/27
LA1862M
Continued from preceding page.
Pin No. Function Equivalent circuit Remarks
Composite signal
12
High-cut capacitive coupling
High-cut frequency set pin
13
HCC control input
14
SNC control input
15
MPX outputs
Output R = 3.3 k Load R built-in
16
Multiplier
Continued on next page.
No. 4092- 9/27
LA1862M
Continued from preceding page.
Pin No. Function Equivalent circuit Remarks
18
Pilot cancel signal output
34
Pilot cancel signal detector
19
Composite signal
Pilot detectors
20
21
VCO
Composite signal 22
Phase detectors
23
Continued on next page.
No. 4092- 10/27
LA1862M
Continued from preceding page.
Pin No. Function Equivalent circuit Remarks
24
PLL input
Inversion circuit
Schmitt trigger
25
ST indicator
ST indicator Mono when HIGH and stereo when LOW
26
Noise canceller input
28
Muting circuit output
pin 28: Output impedance 50
32
Muting attenuation adjust
Continued on next page.
No. 4092- 11/27
LA1862M
Continued from preceding page.
Pin No. Function Equivalent circuit Remarks
29
AFC output
30
Peak detector input
31
Constant voltage output
33
Constant voltage circuit
35
IF input
36
IF bypass
No. 4092- 12/27
LA1862M
IF Block Obtaining Stable Characteristics 1. 2. 3. Pin 36 is the IF input; pin 35, the IF bypass. Connect a 330 resistor between them for ceramic filter matching. Position the capacitor between thr IF bypass (pin 35) and the ground pattern so as to maximize AM rejection. Provide separate ground pattern islands for the IF input and detection circuits, as sharing the same island reduces stability. Position the IF input and detector coil as far apart as possible, as proximity reduces stability and introduces beat noise in the output.
4.
Unit (resistance: , capacitance: F) S-meter Output VSM 1. 2. 3. 4. 5. Pin 1 is the field strength indicator (or ``S-meter'') output. Its current-driven circuit uses an external resistance to adjust the slopes of the I/O characteristics curves. The S-meter output is internally connected to the soft muting and IF buffer blocks for use as a control signal for the soft muting drive and IF count buffer. The point at which the input produces an S-meter output depends on the front end (FE) and interstage amplifier gains. Too large a front end gain produces floating S-meter output even when there is no input. Either use a smaller load resistance on pin 1 or reduce the front end gain so that the output with no load does not exceed 0.5 V. The S-meter output circuit has a dynamic range of approximately 80 dB, but this is limited by the front end noise component and broadband AGC circuit.
Soft Muting 1. 2. The soft muting circuit operates in response to the S-meter output voltage. The amount of muting is related to the pin 5 output voltage. There are two mechanisms for adjusting the soft muting (Muting drive output) I/O characteristic curve: a. Start point for muting: Resistance attached to pin 4 * Time constant for charging Charging b. Attenuation for muting: Resistance attached to pin 32 current re x C5 = *Note that the resistance attached to pin 1 also affects the curve. The soft muting circuit automatically varies the amount of muting in response to the IF input. In the absence of front end broadband AGC effects, the time constant of the RC * Time constant for discharging circuit between pins 1 and 5 determines the response. R5 x C5 =
Discharging current
3.
Band Muting 1. 2. 3. 4. Band muting uses the detector's S-curve. The band-width depends on the resistance between pins 29 and 33. Select this value to match the needs of the destination market. Keep in mind that changing the detector coil or tuning capacity Q changes the slope of the S-curve and hence the bandwidth. The attenuation muting depends on the resistance connected to pin 32. The muting transient response depends on the resistance between pins 29 and 33, the capacitance at pin 29, and the time constant for the RC circuit at pin 5.
No. 4092- 13/27
LA1862M
Detector 1. 2. 3. 4. This IC uses a peak differential detector. To adjust the detector coil, use the built-in automatic frequency circuit (AFC) and rotate the coil core until the voltage drop between pins 29 and 33 is 0 V. Zeroing the AFC and minimizing the total harmonic distortion requires adjusting the capacitance between pin 30 and ground. Note that stray circuit board capacitance can affect this capacitance value. The level of demodulation that is output depends on the inductance of the coil between pins 30 and 31, tuning capacity Q and the capacitor size. Note that although raising Q increases the slope of the S-curve and thus the demodulation output, it does so at the risk of increasing distortion. If the destination market is Europe, increasing the slope of the S-curve helps reduce interference from neighboring channels.
5.
IF Count Buffer 1. 2. 3. 4. Pin 3 is the IF count buffer output. To activate the IF count circuit, apply a 5 V input to pin 3 through a 51 k resistor. The resistor connected to pin 2 determines the IF count buffer output sensitivity (seek stop sensitivity). Leave pins 2 and 3 open if the IF count buffer is not used. The largest time constant among those for the following pins determines the transient response characteristic of the IF count buffer. Pin 1: the S-meter output, pin 4: the start of muting, pin 5: the muting drive output and pin 29: the AFC output. IF count system block diagram S-meter output Muting drive output Band muting SD output
Pin 3 control voltage
IF count buffer amplifier
Comparator
IF count buffer output
The logical AND of the S-meter output and pin 3 control voltage generates the output 10.7 MHz IF count signal. SD Output 1. 2. 3. To obtain SD output, attach an external NPN transistor to pin 5 as shown in the following figure. The resistor connected between the base and ground is for adjusting the SD sensitivity. The transient response characteristic of the resulting SD circuit on pin 5 is, like that for the IF count buffer, determined by the time constants for pins 1, 4, 5 and 29. Raising the seek speed requires decreasing the time constants. Decreasing them too far, however, reduces muting transient response and risks introducing beat noise and other distortion.
SD output
No. 4092- 14/27
LA1862M
4. The following figure illustrates one possible circuit design using both the IF count buffer and the SD output circuit.
Apply 5 V for seek
SD output
IF count buffer output
Noise Canceller Block 1. 2. 3. The resistor and capacitor connected to pin 6 determine the noise canceller sensitivity. The resistor and capacitor connected to pin 7 determine the noise AGC. Pin 9 is the gate trigger output. The resistor and capacitor connected to pin 9 determine the length of time that the gate is open. The resistor and capacitor connected to pins 10 and 11 are for holding the input signal level when the noise canceller gate operates. The storage time depends on the time that the gate is open. The time constant for the RC circuit on pins 10 and 11 must, therefore, be such that the output retention signal level does not drop during this interval.
4.
Noise canceller input waveform
Noise canceller output waveform
Output retention (storage)
5.
Pin 26 is the noise canceller input. An appropriate input level is 250 mVrms for 100% dev and fm = 1 kHz. Excessive input can exceed the noise canceller dynamic range, increasing the THD. Insufficient input, on the other hand, lowers the signal-to-noise ratio and reduces pilot lamp sensitivity.
No. 4092- 15/27
LA1862M
MPX Block The variable resistor between pins 26 and 28 is for adjusting separation. 2. The ceramic oscillator must be a Murata F23. The use of other oscillators leads to frequency discrepancies and spurious oscillations. 3. Pin 14 is the SNC control input. It uses the S-meter output from pin 1 to automatically vary the stereo separation with frequency the input signal strength. It is also possible to reduce noise divider resulting from weak stereo signals. 4. Pin 13 is the HCC control input. It uses the S-meter output from pin 1 to automatically vary the multiplexer output high-frequency characteristic with the input signal strength. The capacitor at pin 12 determines the maximum attenuation for this band. Too big a capacitance, however, will degrade music quality and make the audibility unstable during reception. 5. Pin 24 is the 19 kHz pilot signal input. Capacitively couple the 19 kHz component from pin 11 to pin 24. 6. Pin 25 is the stereo lamp signal. Current flows only for stereo signals. Leaving the pin open forces monaural operation. 7. The VCO always operates during both stereo and monaural operation. 8. Pins 15 and 16 are the left- and right-channel outputs. The capacitors at these pins determine the amount of deemphasis -- 50 s using 0.015 F, and 75 s using 0.022 F. 9. Pin 18 is the pilot cancel signal output. Adjust the variable resistor between pins 17 and 18 to minimize the 19 kHz pilot signal components in the left- and right-channel outputs for correct channel balance. 10. When adjusting the pilot cancel signal output, connect a 20 kHz lowpass filter (for example, a DIN audio filter) to the multiplexer output to remove the 38 kHz component and prevent its affect on the process of minimizing the 19 kHz component. 11. The capacitor connected to pin 34 is used to detect the pilot cancel signal. It should be connected to VCC or GND. In the case of VCC, use a capacitor with no DC leakage. Coil Specifications 1.
(Toko)
(Toko) For North American and Japanese markets C = 51 pF Internal
For European markets
C = 100 pF internal
(Mitsumi)
For European markets C = 100 pF External
For North American and Japanese markets C = 51 pF External
Note: The dotted lines in the characteristics diagrams on the following pages represent device operation outside the device specifications.
No. 4092- 16/27
LA1862M
Input/output characteristics AF output, noise, AM output - dBm AF output, noise, AM output - dBm Mute OFF, pin 5=GND Input/output characteristics
Pin 1 = 7.5 k Pin 4 = 1 k Pin 32 = 100 k
S-meter voltage, VSM - V
Pin V5 output
AM output
Noise
Noise
AF output, noise output, AM output - dBm
IF input - dB Input/output characteristics
IF input - dB VMute (pin 5) - AFC f
7.5 k resistor between pins 29 and 33 YD-9493-3 coil
ST noise Noise
39 k resistor between pins 29 and 32
Pin V5 output Pin 5 voltage, V5-V
Pin V5 output
Pin 5 voltage, mute drive, SD drive - V
Frequency deviation, f - kHz VMute (pin 5) - IF input Pin 1 S-meter voltage, VSM - V
Pin 5 voltage, mute drive, SD drive - V
Antenna input - dB (SG75 open) SD mute bandwidth
Detoning frequency, f - kHz VMute (pin 5) - IF input
IF input - dB VSM - IF input
Pin 5 voltage, V5 - V
R=0
R = 0
R = 0
IF input - dB
IF input - dB No. 4092- 17/27
S-meter voltage, VSM - V
LA1862M
Mute-Att - Mute Drive AF output, Mute attenuation level - dB V5 mute drive - Antenna input
VSM to pin 1 open
Pin V5 mute drive - V
Pin V5 mute drive - V V5 mute drive - Antenna input Pin 1 S-meter voltage, VSM - V
Antenna input - dB VSM - Antenna input
Pin 1
Pin 35 to GND, R=0 Pin 1 R = 7.5 k Pin 35 to GND, R=0 Pin 1 R = 5.1 k Pin 35 to GND, R=0
Pin V5 mute drive - V
Antenna input - dB Input/output characteristics
Antenna input - dB Input/output characteristics
Noise, AF output - dBm
Noise, AF output - dBm
Mute OFF V5 - GND
Audio filter
Audio filter
Antenna input - dB Input/output characteristics
Mute OFF V5 - GND
Antenna input - dB Input/output characteristics
Noise, AF output - dBm
Noise, AF output - dBm
Audio filter
Audio filter
Antenna input - dB
Antenna input - dB No. 4092- 18/27
LA1862M
AF output - IF input Total harmonic distortion, THD - % AF-OUT, THD - dev
AF output - dBm
output
IF input - dB IF buffer ON impressed voltage - Pin 3 R IF buffer ON impressed voltage - V
dev - kHz Mute bandwidth - Pin 29 to 32 resistance
Mute bandwidth - kHz
Mute bandwidth YD-9493-3 Mitsumi coil
Turns ON when IF buffer output reaches 10 mVrms
Pin 3 R with IF buffer ON - THD - dev Total harmonic distortion, THD - % Channel separation, CH Sep - dB
Pin 29 to 32 resistance - k CH Sep - f
MPX filter IN
dev 10% (fixed)
Pilot 7.5 kHz (fixed)
dev - kHz AF OUT (MPX OUT) - fm Demodulator output, MPX OUT - dBm
Emphasis OFF
Frequency deviation - kHz dev (incl. pilot) THD - fm Total harmonic distortion, THD - %
Modulation frequency, fm - kHz
Modulation frequency, fm - Hz No. 4092- 19/27
AF-OUT - dBm
LA1862M
CH Sep - fm Channel separation, CH Sep - dB HPF frequency characteristics
(Oscillator SG Matsushita Vp-817B10)
15 kHz LPF in the output
Pin 6 output level - dBV
Pin 26 input Pin 6 output
Modulation frequency, fm - kHz THD - VIN Total harmonic distortion, THD - % Total harmonic distortion, THD - % Pin 26 input
Frequency, f - kHz THD - f Pin 26 input
Input voltage, VIN - mVrms Sep - f Channel separation, Sep - dB
Pin 26 input Pin 26 input
Frequency, f - Hz Capture range
Frequency, f - Hz VSUB - VSNC Channel separation, Sep-dB
Pin 26 input
Input frequency, f - kHz Sep - VSNC
Pin 26 input
No. 4092- 20/27
LA1862M
HCC - VHCC Pin 26 input Attenuation, Att - dB Pin 26 input Att - VHCC
HCC - %
V8 - V High-cut control characteristics
V8 - V High-cut (100 %) MPX output frequency characteristics
0 F (50 s deemphasis)
Attenuation, Att - dB
High-cut fixed-value C12 = 0.01 F
Pin 13 SNC impressed voltage, VSNC - V
Frequency, f - Hz V13 - Sep
Pin 26 input=250 mVrms (within 10% pilot) IHF-BPF T/200 connected to pins 15 and 16 MPX output
Attenuation, Att - dB
MPX output frequency, f - kHz Gate time - Pin 9 RW
1 s pulsewidth 1 kHz pulse frequency 100 mVp-o pulse level Pin 26 input
Gate time - s
Channel separation, Sep - dB Noise sensitivity - RS 1 s pulsewidth MPX modulator output - mVrms
Pin 9 RW - k Modulator output - VCC
Noise sensitivity - mVp-o
Pin 6 RS -
Supply voltage, VCC - V No. 4092- 21/27
LA1862M
-3dBL.S. - VCC -3 dB limiting sensitivity - dB Signal-to-noise ratio - dB S/N - VCC
Supply voltage, VCC - V f - VCC 10.7 MHz tuning deviation, f - kHz VCC=8.5 V
Supply voltage, VCC - V Muting attenuation - VCC
Muting attenuation - dB
Supply voltage, VCC - V Muting bandwidth - VCC
Supply voltage, VCC - V VMute - VCC IF input
Muting bandwidth - kHz
Pin 5 VMute - V
Supply voltage, VCC - V VSM - VCC
IF input
Supply voltage, VCC - V THD - VCC Total harmonic distortion, THD - %
Pin 1 VSM - V
Supply voltage, VCC - V
Supply voltage, VCC - V No. 4092- 22/27
LA1862M
Pilot indicator level - VCC Pilot modulation factor - % CH Sep - VCC
ON level OFF level
Supply voltage, VCC - V VCO free-running frequency - VCC Free-running frequency drift - kHz Output voltage, VO - mVrms
Channel separation - dB
Supply voltage, VCC - V VO - VCC
Pin 26 input
Total harmonic distortion, THD - %
Supply voltage, VCC - V THD - VCC Pin 26 input Signal-to-noise ratio, S/N - dB
Supply voltage, VCC - V S/N - VCC
Pin 26 input Pins 15 and 16 output (IMF-BPF connected at MPX output) Supply voltage, VCC-V VL, hy - VCC Pin 26 input
Supply voltage, VCC - V DR - VCC Lamp voltage, VL - mVrms Pin 26 input DR - mVrms
Supply voltage, VCC - V
Supply voltage, VCC - V No. 4092- 23/27
Hysteresis, hy - dB
LA1862M
CR - VCC Pin 26 input Noise sensitivity, S/N - mVp-p Input frequency - kHz S/N - VCC
Supply voltage, VCC - V GATE TIME - VCC Demodulator output - dBm 100 mVp-o pulse input level 1 kHz pulse frequency 1 s pulsewidth Pin 26 input Gate time - s
Supply voltage, VCC - V AF OUT - Ta
Supply voltage, VCC - V Noise - Ta -3dB L.S. - dB, S/N ratio - dB
Ambient temperature, Ta - C S/N, -3dBL.S. - Ta
S/N ratio
Noise output - dBm
Ambient temperature, Ta - C VSM - Ta Input Pin 1 output, VSM - V
Ambient temperature, Ta - C AMR - Ta
AMR - dB
Ambient temperature, Ta - C
Ambient temperature, Ta - C No. 4092- 24/27
LA1862M
Ta - f
Ambient temperature, Ta - C
AF, NOISE OUT - IF INPUT f where V5 = 2 V AF noise output - dB
Detuning frequency, f - MHz Pin V5 mute output - IF input
IF input - dB Output - Ta
Pin V5 mute output - V
Pin 26 input Output - mVrms IF input - dB THD - Ta
Ambient temperature, Ta - C S/N - Ta
Total harmonic distortion, THD - %
Pin 26 input S/N - dB
Ambient temperature, Ta - C Sep - Ta Channel separation, Sep - dB
Ambient temperature, Ta - C VL, hy - Ta Pin 26 input Lamp voltage, VL - mVrms
Pin 26 input
Ambient temperature, Ta - C
Ambient temperature, Ta - C No. 4092- 25/27
Hysteresis, hy - dB
LA1862M
HCC - Ta Pin 26 input Noise sensitivity, S/N - mVp-p S/N - Ta
20log(V10/V1) - dB
Pin 26 input
Ambient temperature, Ta - C GATE TIME - Ta
1 s pulsewidth 100 mVp-o pulse input Pin 26 input
Ambient temperature, Ta - C AF output - Antenna input
AF output - dBm
Gate time - s
Ambient temperature, Ta - C Input/output characteristics Demodulator output Total harmonic distortion, THD - % Output level - dBm
Antenna input - dB HCC, SNC characteristics
Noise
6 dB practical sensitivity
Antenna input level with 75 open - dB VCC - Input level
Antenna input level - dB
Output voltage, VCC - V
OFF mode VSM is adjusted so that Sep = 10 dB at 35 dB input.
Antenna input level - dB No. 4092- 26/27
Channel separation, Sep - dB
Output level - dB
LA1862M
No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. Anyone purchasing any products described or contained herein for an above-mentioned use shall: 1 Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: 2 Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of June, 1998. Specifications and information herein are subject to change without notice. PS No. 4092- 27/27

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