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| PRELIMINARY DATA SHEET NPN SILICON EPITAXIAL TWIN TRANSISTOR UPA836TC FEATURES * SMALL PACKAGE OUTLINE: 1.5 mm x 1.1 mm, 33% smaller than conventional SOT-363 package LOW HEIGHT PROFILE: Just 0.55 mm high FLAT LEAD STYLE: Reduced lead inductance improves electrical performance TWO DIFFERENT DIE TYPES: Q1 - Ideal oscillator transistor Q2 - Ideal buffer amplifier transistor OUTLINE DIMENSIONS (Units in mm) Package Outline TC (TOP VIEW) 1.500.1 1.100.1 * * 0.20 +0.1 -0.05 1 1.500.1 0.96 0.48 3 0.48 2 6 * 5 4 PIN OUT 1. Collector (Q1) 2. Emitter (Q1) 3. Collector (Q2) 4. Base (Q2) 5. Emitter (Q2) 6. Base (Q1) DESCRIPTION The UPA836TC contains one NE685 and one NE688 NPN high frequency silicon bipolar chip. NEC's new ultra small TC package is ideal for all portable wireless applications where reducing board space is a prime consideration. Each transistor chip is independently mounted and easily configured for oscillator/buffer amplifier and other applications. 0.11+0.1 0.550.05 -0.05 Note: Pin 1 is the lower left most pin as the package lettering is oriented and read left to right. ELECTRICAL CHARACTERISTICS (TA = 25C) PART NUMBER PACKAGE OUTLINE SYMBOLS ICBO IEBO hFE fT Cre |S21E|2 NF ICBO IEBO hFE fT PARAMETERS AND CONDITIONS Collector Cutoff Current at VCB = 5 V, IE = 0 Emitter Cutoff Current at VEB = 1 V, IC = 0 DC Current Gain1 at VCE = 3 V, IC = 10 mA GHz pF dB dB A A 80 GHz GHz pF dB dB dB dB 2.5 4.0 4.5 9.0 0.75 3.5 6.5 1.7 1.5 2.5 0.85 7 Gain Bandwidth at VCE = 3 V, IC = 10 mA, f = 2 GHz Feedback Capacitance2 at VCB = 3 V, IE = 0, f = 1 MHz Insertion Power Gain at VCE = 3 V, IC =10 mA, f = 2 GHz Noise Figure at VCE = 3 V, IC = 3 mA, f = 2 GHz Collector Cutoff Current at VCB = 5 V, IE = 0 Emitter Cutoff Current at VEB = 1 V, IC = 0 DC Current Gain1 at VCE = 1 V, IC = 3 mA Gain Bandwidth (1) at VCE = 1 V, IC = 3 mA, f = 2 GHz Gain Bandwidth (2) at VCE = 3 V, IC = 20 mA, f = 2 GHz Feedback Capacitance2 at VCB = 1 V, IE = 0, f = 1 MHz Insertion Power Gain (1) at VCE = 1 V, IC =3 mA, f = 2 GHz Insertion Power Gain (2) at VCE = 3 V, IC =20 mA, f = 2 GHz Noise Figure (1) at VCE = 1 V, IC = 3 mA, f = 2 GHz Noise Figure (2) at VCE = 3 V, IC = 7 mA, f = 2 GHz UNITS A A 75 10 12 0.4 8.5 1.5 2.5 0.1 0.1 160 0.7 MIN UPA836TC TC TYP MAX 0.1 0.1 150 Q2 Q1 fT Cre |S21E|2 |S21E|2 NF NF Notes: 1. Pulsed measurement, pulse width 350 s, duty cycle 2 %. 2. Collector to base capacitance when measured with capacitance meter (automatic balanced bridge method), with emitter connected to guard pin of capacitances meter. California Eastern Laboratories UPA836TC ABSOLUTE MAXIMUM RATINGS1 (TA = 25C) SYMBOLS VCBO VCEO VEBO IC PT TJ TSTG PARAMETERS Collector to Base Voltage Collector to Emitter Voltage Emitter to Base Voltage Collector Current Total Power Dissipation Junction Temperature Storage Temperature UNITS V V V mA mW C C RATINGS Q1 9 6 2 30 Q2 9 6 2 100 ORDERING INFORMATION PART NUMBER UPA836TC-T1 QUANTITY 3000 PACKAGING Tape & Reel TBD TBD TBD 150 150 -65 to +150 Note: 1. Operation in excess of any one of these parameters may result in permanent damage. EXCLUSIVE NORTH AMERICAN AGENT FOR RF, MICROWAVE & OPTOELECTRONIC SEMICONDUCTORS CALIFORNIA EASTERN LABORATORIES * Headquarters * 4590 Patrick Henry Drive * Santa Clara, CA 95054-1817 * (408) 988-3500 * Telex 34-6393 * FAX (408) 988-0279 24-Hour Fax-On-Demand: 800-390-3232 (U.S. and Canada only) * Internet: http://WWW.CEL.COM 1/99 DATA SUBJECT TO CHANGE WITHOUT NOTICE |
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