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19-2633; Rev 0; 10/02 4.5 Quad SPST Analog Switches in UCSP General Description The MAX4737/MAX4738/MAX4739 low-voltage, low onresistance (RON), quad single-pole/single throw (SPST) analog switches operate from a single +1.8V to +5.5V supply. These devices are designed for USB 1.1 and audio switching applications. The MAX4737/MAX4738/MAX4739 feature 4.5 RON (max) with 1.2 flatness and 0.4 matching between channels. These new switches feature guaranteed operation from +1.8V to +5.5V and are fully specified at 3V and 5V. These switches offer break-before-make switching (1ns) with t ON <80ns and t OFF <40ns at +2.7V. The digital logic inputs are +1.8V logic compatible with a +2.7V to +3.6V supply. These switches are packaged in a chip-scale package (UCSPTM), significantly reducing the required PC board area. The chip occupies only a 2mm 2mm area and has a 4 4 bump array with a bump pitch of 0.5mm. These switches are also available in a 14-pin TSSOP package. o o o o USB 1.1 Signal Switching 2ns (max) Differential Skew -3dB Bandwidth: >300MHz Low 20pF On-Channel Capacitance Features MAX4737/MAX4738/MAX4739 o Low RON 4.5 (max) (+3V Supply) 3 (max) (+5V Supply) o 0.4 (max) RON Match (+3V Supply) o 1.2 (max) RON Flatness (+3V Supply) o <0.5nA Leakage Current at +25C o High Off-Isolation: -55dB (10MHz) o Low Crosstalk: -80dB (10MHz) o Low Distortion: 0.03% o +1.8V CMOS-Logic Compatible o Single-Supply Operation from +1.8V to +5.5V o Rail-to-Rail(R) Signal Handling Applications Battery-Operated Equipment Audio/Video-Signal Routing Low-Voltage Data-Acquisition Systems Sample-and-Hold Circuits Data-Acquisition Systems Communications Circuits PART MAX4737EUD MAX4737EBE-T* MAX4738EUD MAX4738EBE-T* MAX4739EUD MAX4739EBE-T* Ordering Information TEMP RANGE -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C PIN/BUMPPACKAGE 14 TSSOP 16 UCSP-16 14 TSSOP 16 UCSP-16 14 TSSOP 16 UCSP-16 TOP MARK -- 4737 -- 4738 -- 4739 Note: UCSP package requires special solder temperature profile described in the Absolute Maximum Ratings section. UCSP is a trademark of Maxim Integrated Products, Inc. Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd. *UCSP reliability is integrally linked to the user's assembly methods, circuit board material, and environment. See the UCSP reliability notice in the UCSP Reliability section of this data sheet for more information. Pin Configurations/Functional Diagrams/Truth Tables MAX4737 TOP VIEW (BUMPS SIDE DOWN) A IN2 B COM2 C NO2 D COM1 NO1 IN1 IN4 V+ NO4 D COM1 NC1 IN1 IN4 GND COM4 C NC2 V+ NC4 D COM1 NO1 IN1 IN4 IN3 NO3 COM3 B COM2 GND COM4 C NC2 V+ NC4 1 2 3 4 A IN2 IN3 NC3 COM3 B COM2 GND COM4 1 MAX4738 2 3 4 A IN2 1 MAX4739 2 3 4 IN3 NO3 COM3 IN_ LOW HIGH NO_ OFF ON NC_ ON OFF UCSP UCSP UCSP ________________________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com. 4.5 Quad SPST Analog Switches in UCSP MAX4737/MAX4738/MAX4739 ABSOLUTE MAXIMUM RATINGS (All Voltages Referenced to GND) V+, IN_...................................................................-0.3V to +6.0V COM_, NO_, NC_ (Note 1) ...........................-0.3V to (V+ + 0.3V) Continuous Current COM_, NO_, NC_ ...........................100mA Peak Current COM_, NO_, NC_ (pulsed at 1ms, 10% duty cycle)................................200mA Continuous Power Dissipation (TA = +70C) 14-Pin TSSOP (derate 6.3mW/C above +70C) .........500mW 16-Bump UCSP (derate 8.3mW/C above +70C) ......659mW ESD Method 3015.7 .............................................................>2kV Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C Bump Temperature (soldering) (Note 2) Infrared (15s) ...............................................................+220C Vapor Phase (60s) .......................................................+215C Note 1: Signals on COM_, NO_, or NC_ exceeding V+ or GND are clamped by internal diodes. Limit forward-diode current to maximum current rating. Note 2: This device is constructed using a unique set of packaging techniques that impose a limit on the thermal profile the device can be exposed to during board level solder attach and rework. This limit permits only the use of the solder profiles recommended in the industry standard specification, JEDEC 020A, paragraph 7.6, table 3 for IR/VPR and convection reflow. Preheating is required. Hand or wave soldering is not allowed. Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS--Single +3V Supply (V+ = +2.7V to +3.6V, VIH = +1.4V, VIL = +0.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = +3.0V, TA = +25C, unless otherwise noted.) (Notes 3, 4) PARAMETER Analog Signal Range ANALOG SWITCH +25C On-Resistance (Note 5) RON V+ = 2.7V, ICOM_ = 10mA; VNO_ or VNC_ = 1.5V V+ = 2.7V, ICOM_ = 10mA; VNO_ or VNC_ = 1.5V V+ = 2.7V, ICOM_ = 10mA; VNO_ or VNC_ = 1.0V, 1.5V, 2.0V V+ = 3.6V, VCOM_ = 0.3V, 3.3V; VNO_ or VNC_ = 3.3V, 0.3V V+ = 3.6V, VCOM_ = 0.3V, 3.3V; VNO_ or VNC_ = 3.3V, 0.3V V+ = 3.6V, VCOM_ = 0.3V, 3.3V; VNO_ or VNC_ = 0.3V, 3.3V, or floating TMIN to TMAX +25C On-Resistance Match Between Channels (Notes 5, 6) RON TMIN to TMAX +25C On-Resistance Flatness (Note 7) RFLAT(ON) TMIN to TMAX +25C NO_, NC_ Off-Leakage Current (Note 8) INO_(OFF), INC_(OFF) TMIN to TMAX +25C COM_ Off-Leakage Current (Note 8) ICOM_(OFF) TMIN to TMAX +25C TMIN to TMAX -0.5 -1 -0.5 -1 -1 -2 +0.01 +0.01 +0.01 0.6 0.1 3.0 4.5 5 0.4 0.5 1.2 1.5 +0.5 +1 +0.5 +1 +1 +2 nA nA nA SYMBOL VCOM_, VNO_, VNC_ CONDITIONS TA MIN 0 TYP MAX V+ UNITS V COM_ On-Leakage Current (Note 8) ICOM_(ON) 2 _______________________________________________________________________________________ 4.5 Quad SPST Analog Switches in UCSP ELECTRICAL CHARACTERISTICS--Single +3V Supply (continued) (V+ = +2.7V to +3.6V, VIH = +1.4V, VIL = +0.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = +3.0V, TA = +25C, unless otherwise noted.) (Notes 3, 4) PARAMETER DYNAMIC CHARACTERISTICS +25C Turn-On Time tON VNO_, VNC_ = 1.5V; RL = 300, CL = 35pF, Figure 1 VNO_, VNC_ = 1.5V; RL = 300, CL = 35pF, Figure 1 VNO_, VNC_ = 1.5V; RL = 300, CL = 35pF, Figure 2 RS = 39, CL = 50pF, Figure 3 VGEN = 2V, RGEN = 0, CL = 1.0nF, Figure 4 f = 10MHz; VNO_, VNC_ = 1VP-P; RL = 50, CL = 5pF, Figure 5a f = 1MHz; VNO_, VNC_ = 1VP-P; RL = 50, CL = 5pF, Figure 5a f = 10MHz; VNO_, VNC_ = 1VP-P; RL = 50, CL = 5pF, Figure 5b f = 1MHz; VNO_, VNC_ = 1VP-P; RL = 50, CL = 5pF, Figure 5b Signal = 0dBm, CL = 5pF, 50 in and out, Figure 5a RL = 600 +25C +25C +25C +25C TMIN to TMAX TMIN to TMAX V+ = 3.6V, VIN_ = 0 or 5.5V TMIN to TMAX -0.1 TMIN to TMAX +25C Turn-Off Time tOFF TMIN to TMAX +25C Break-Before-Make Time Delay (MAX4739 Only) (Note 8) Skew (Note 8) Charge Injection tBBM TMIN to TMAX TMIN to TMAX +25C 1 0.15 5 -55 +25C -80 -80 +25C -110 300 0.03 9 15 MHz % pF pF dB dB 2 8 ns 20 40 80 100 40 50 ns ns SYMBOL CONDITIONS TA MIN TYP MAX UNITS MAX4737/MAX4738/MAX4739 tSKEW Q ns pC Off-Isolation (Note 9) VISO Crosstalk (Note 10) VCT On-Channel -3dB Bandwidth Total Harmonic Distortion NO_, NC_ Off-Capacitance Switch On-Capacitance DIGITAL I/O Input Logic High Voltage Input Logic Low Voltage Input Leakage Current BW THD CNO_(OFF), f = 1MHz, Figure 6 CNC_(OFF) CON f = 1MHz, Figure 6 VIH VIL IIN 1.4 0.5 +0.1 V V A _______________________________________________________________________________________ 3 4.5 Quad SPST Analog Switches in UCSP MAX4737/MAX4738/MAX4739 ELECTRICAL CHARACTERISTICS--Single +3V Supply (continued) (V+ = +2.7V to +3.6V, VIH = +1.4V, VIL = +0.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = +3.0V, TA = +25C, unless otherwise noted.) (Notes 3, 4) PARAMETER SUPPLY Supply Voltage Range Positive Supply Current V+ I+ V+ = 5.5V, VIN_ = 0V or V+ TMIN to TMAX TMIN to TMAX 1.8 5.5 1 V A SYMBOL CONDITIONS TA MIN TYP MAX UNITS ELECTRICAL CHARACTERISTICS--Single +5V Supply (V+ = +4.2V to +5.5V, VIH = +2.0V, VIL = +0.8V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = +5.0V, TA = +25C, unless otherwise noted.) (Notes 3, 4) PARAMETER Analog Signal Range ANALOG SWITCH +25C On-Resistance (Note 5) RON V+ = 4.2V; ICOM_ = 10mA; VNO_ or VNC_ = 3.5V V+ = 4.2V; ICOM_ = 10mA; VNO_ or VNC_ = 3.5V V+ = 4.2V; ICOM_ = 10mA; VNO_ or VNC_ = 1.0V, 2.0V, 3.5V V+ = 5.5V; VCOM_ = 1.0V, 4.5V; VNO_ or VNC_ = 4.5V, 1.0V V+ = 5.5V; VCOM_ = 1V, 4.5V; VNO_ or VNC_ = 4.5V, 1V V+ = 5.5V; VCOM_ = 1.0V, 4.5V; VNO_ or VNC_ = 1.0V, 4.5V, or floating TMIN to TMAX +25C On-Resistance Match Between Channels (Notes 5, 6) RON TMIN to TMAX +25C On-Resistance Flatness (Note 7) RFLAT(ON) TMIN to TMAX +25C NO_, NC_ Off-Leakage Current (Note 8) INO_(OFF), INC_(OFF) TMIN to TMAX +25C COM_ Off-Leakage Current (Note 8) ICOM_ (OFF) TMIN to TMAX +25C TMIN to TMAX +25C Turn-On Time tON VNO_, VNC_ = 3.0V; RL = 300, CL = 35pF, Figure 1 VNO_, VNC_ = 3.0V; RL = 300, CL = 35pF, Figure 1 TMIN to TMAX +25C Turn-Off Time tOFF TMIN to TMAX 20 -0.5 -1 -0.5 -1 -1 -2 0.01 0.01 0.01 0.4 0.1 1.7 3.0 35 0.3 0.4 1.2 1.5 +0.5 +1 +0.5 +1 +1 +2 nA nA nA SYMBOL VCOM_, VNO_, VNC_ CONDITIONS TA TMIN to TMAX MIN 0 TYP MAX V+ UNITS V COM_ On-Leakage Current (Note 8) DYNAMIC CHARACTERISTICS ICOM_(ON) 30 80 100 40 50 ns ns 4 _______________________________________________________________________________________ 4.5 Quad SPST Analog Switches in UCSP ELECTRICAL CHARACTERISTICS--Single +5V Supply (continued) (V+ = +4.2V to +5.5V, VIH = +2.0V, VIL = +0.8V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = +5.0V, TA = +25C, unless otherwise noted.) (Notes 3, 4) PARAMETER Break-Before-Make Time Delay (MAX4739 Only) (Note 8) Skew (Note 8) DIGITAL I/O Input Logic High Voltage Input Logic Low Voltage Input Leakage Current POWER SUPPLY Power-Supply Range Positive Supply Current V+ I+ V+ = 5.5V, VIN_ = 0V or V+ TMIN to TMAX TMIN to TMAX 1.8 5.5 1 V A VIH VIL IIN V+ = 5.5V, VIN_ = 0V or V+ TMIN to TMAX TMIN to TMAX TMIN to TMAX -0.1 2.0 0.8 +0.1 V V A SYMBOL tBBM CONDITIONS VNO_, VNC_ = 3.0V; RL = 300, CL = 35pF, Figure 2 RS = 39, CL = 50pF, Figure 3 TA +25C TMIN to TMAX TMIN to TMAX 1 0.15 2 MIN TYP 8 ns MAX UNITS MAX4737/MAX4738/MAX4739 tSKEW ns UCSP parts are 100% tested at +25C only, and guaranteed by design over the specified temperature range. TSSOP parts are 100% tested at TMAX and guaranteed by design over the specified temperature range. Note 4: The algebraic convention used in this data sheet is where the most negative value is a minimum and the most positive value is a maximum. Note 5: Guaranteed by design for UCSP parts. Note 6: RON = RON(MAX) - RON(MIN). Note 7: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges. Note 8: Guaranteed by design. Note 9: Off-Isolation = 20log10 (VCOM / VNO), VCOM = output, VNO = input to off switch. Note 10: Between any two switches. Note 3: _______________________________________________________________________________________ 5 4.5 Quad SPST Analog Switches in UCSP MAX4737/MAX4738/MAX4739 Typical Operating Characteristics (TA = +25C, unless otherwise noted.) ON-RESISTANCE vs. VCOM MAX4737/38/39 toc01 ON-RESISTANCE vs. VCOM MAX4737/38/39 toc02 ON-RESISTANCE vs. VCOM V+ = 5V MAX4737/38/39 toc03 10 6 V+ = 3V 5 8 V+ = 1.8V 5 4 RON () RON () V+ = 2.5V 4 V+ = 3V V+ = 4.2V TA = +25C 3 TA = +85C RON () 6 4 3 TA = +25C 2 TA = +85C 2 V+ = 5V 0 1 2 3 4 5 2 TA = -40C 1 0 0.5 1.0 1.5 VCOM (V) 2.0 2.5 3.0 1 TA = -40C 0 0 1 2 3 4 5 VCOM (V) 0 VCOM (V) LEAKAGE CURRENT vs. TEMPERATURE MAX4737/38/39 toc04a LEAKAGE CURRENT vs. TEMPERATURE MAX4737/38/39 toc04b CHARGE INJECTION vs. VCOM MAX4737/38/39 toc05 500 V+ = 3V 400 LEAKAGE CURRENT (pA) 1000 V+ = 5V 800 LEAKAGE CURRENT (pA) 50 40 CHARGE INJECTION (pC) CL = 1nF V+ = 5V 30 CL = 1nF V+ = 3V 300 COM ON-LEAKAGE COM OFF-LEAKAGE 600 COM ON-LEAKAGE COM OFF-LEAKAGE 400 200 20 100 200 10 0 -40 -15 10 35 60 85 TEMPERATURE (C) 0 -40 -15 10 35 60 85 TEMPERATURE (C) 0 0 1 2 3 4 5 VCOM (V) SUPPLY CURRENT vs. TEMPERATURE MAX4737/38/39 toc06 SUPPLY CURRENT vs. LOGIC LEVEL MAX4737/38/39 toc07 TURN-ON/OFF TIME vs. SUPPLY VOLTAGE MAX4737/38/39 toc08 6 5 SUPPLY CURRENT (nA) 4 V+ = 5V 3 2 1 0 -40 -15 10 35 60 V+ = 3V 100 100 80 SUPPLY CURRENT (A) V+ = 5V 60 80 tON/tOFF (ns) 60 tON tOFF 20 40 V+ = 3V 20 40 0 85 0 1 2 3 4 5 TEMPERATURE (C) LOGIC LEVEL (V) 0 1.5 2.5 3.5 4.5 5.5 SUPPLY VOLTAGE (V) 6 _______________________________________________________________________________________ 4.5 Quad SPST Analog Switches in UCSP MAX4737/MAX4738/MAX4739 Typical Operating Characteristics (continued) (TA = +25C, unless otherwise noted.) TURN-ON/OFF TIME vs. TEMPERATURE MAX4737/38/39 toc09 RISE/FALL-TIME DELAY vs. SUPPLY VOLTAGE MAX4737/38/39 toc10 RISE/FALL-TIME DELAY vs. TEMPERATURE OUTPUT RISE/FALL-TIME DELAY (ns) INPUT RISE/FALL TIME = 15ns FIGURE 3, CL = 50pF V+ = 4.2V 1.5 MAX4737/38/39 toc11 60 50 40 tON/tOFF (ns) 30 20 10 0 -40 -15 10 35 60 tOFF, V+ = 5.0V tOFF, V+ = 3.0V tON, V+ = 3.0V 3.0 OUTPUT RISE/FALL-TIME DELAY (ps) 2.5 2.0 1.5 RISE DELAY 1.0 0.5 0 FALL DELAY INPUT RISE/FALL TIME = 15ns FIGURE 3, CL = 50pF 2.0 tON, V+ = 5.0V 1.0 RISE DELAY 0.5 FALL DELAY 0 1.5 2.5 3.5 4.5 5.5 -40 -15 10 35 60 85 SUPPLY VOLTAGE (V) TEMPERATURE (C) 85 TEMPERATURE (C) RISE TIME TO FALL TIME MISMATCH vs. SUPPLY VOLTAGE MAX4737/38/39 toc12 RISE TIME TO FALL TIME MISMATCH vs. TEMPERATURE MAX4737/38/39 toc13 SKEW vs. SUPPLY VOLTAGE INPUT RISE/FALL TIME = 15ns FIGURE 3, CL = 50pF 300 SKEW (ps) MAX4737/38/39 toc14 400 INPUT RISE/FALL TIME = 15ns FIGURE 3, CL = 50pF 300 MISMATCH (ps) 200 INPUT RISE/FALL TIME = 15ns FIGURE 3, CL = 50pF V+ = 4.2V 150 MISMATCH (ps) 400 200 100 200 100 50 100 0 1.5 2.5 3.5 4.5 5.5 SUPPLY VOLTAGE (V) 0 -40 -15 10 35 60 85 TEMPERATURE (C) 0 1.5 2.5 3.5 4.5 5.5 SUPPLY VOLTAGE (V) SKEW vs. TEMPERATURE MAX4737/38/39 toc15 FREQUENCY RESPONSE V+ = 3V/5V 0 -20 ON-LOSS (dB) -40 -60 -80 -100 -120 CROSSTALK OFF-ISOLATION ON-LOSS MAX4737/38/39 toc16 200 INPUT RISE/FALL TIME = 15ns FIGURE 3, CL = 50pF V+ = 4.2V 150 SKEW (ps) 20 100 50 0 -40 -15 10 35 60 85 TEMPERATURE (C) -140 0.0001 0.01 1 100 FREQUENCY (MHz) _______________________________________________________________________________________ 7 4.5 Quad SPST Analog Switches in UCSP MAX4737/MAX4738/MAX4739 Typical Operating Characteristics (continued) (TA = +25C, unless otherwise noted.) TOTAL HARMONIC DISTORTION vs. FREQUENCY V+ = 3V RL = 600 MAX4737/38/39 toc17 LOGIC THRESHOLD vs. SUPPLY VOLTAGE MAX4737/38/39 toc18 1 2.0 1.6 LOGIC THRESHOLD (V) VTH+ 1.2 VTH0.8 THD (%) 0.1 0.4 0.01 10 100 1k FREQUENCY (Hz) 10k 100k 0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V) Pin Description PIN MAX4737 UCSP D2 -- D1 C1 -- B1 A1 A2 B3 A3 -- A4 B4 C4 -- D4 D3 C2 TSSOP 1 -- 2 3 -- 4 5 6 7 8 -- 9 10 11 -- 12 13 14 MAX4738 UCSP -- D2 D1 -- C1 B1 A1 A2 B3 -- A3 A4 B4 -- C4 D4 D3 C2 TSSOP -- 1 2 -- 3 4 5 6 7 -- 8 9 10 -- 11 12 11 14 MAX4739 UCSP D2 -- D1 -- C1 B1 A1 A2 B3 A3 -- A4 B4 -- C4 D4 D3 C2 TSSOP 1 -- 2 -- 3 4 5 6 7 8 -- 9 10 -- 11 12 11 14 NO1 NC1 COM1 NO2 NC2 COM2 IN2 IN3 GND NO3 NC3 COM3 COM4 NO4 NC4 IN4 IN1 V+ Analog-Switch Normally Open Terminal Analog-Switch Normally Closed Terminal Analog-Switch Common Terminal Analog-Switch Normally Open Terminal Analog-Switch Normally Closed Terminal Analog-Switch Common Terminal Logic-Control Digital Input Logic-Control Digital Input Ground. Connect to digital ground. Analog-Switch Normally Open Terminal Analog-Switch Normally Closed Terminal Analog-Switch Common Terminal Analog-Switch Common Terminal Analog-Switch Normally Open Terminal Analog-Switch Normally Closed Terminal Logic-Control Digital Input Logic-Control Digital Input Positive Analog Supply NAME FUNCTION 8 _______________________________________________________________________________________ 4.5 Quad SPST Analog Switches in UCSP Detailed Description The MAX4737/MAX4738/MAX4739 quad SPST analog switches operate from a single +1.8V to +5.5V supply. The MAX4737/MAX4738/MAX4739 offer excellent AC characteristics, <0.5nA leakage current, less than 1ns differential skew, and 15pF on-channel capacitance. All of these devices are CMOS-logic compatible with V+ to GND signal handling capability. The MAX4737/MAX4738/MAX4739 are USB-complaint switches that provide 4.5 (max) on-resistance and 15pF on-channel capacitance to maintain signal integrity. At 12Mbps (USB full-speed data rate specification), the MAX4737/MAX4738/MAX4739 introduce less than 2ns propagation delay between input and output signals and less than 0.5ns change in skew for the output signals (see Figure 4). The MAX4737 has four normally open (NO) switches, the MAX4738 has four normally closed (NC) switches, and the MAX4739 has two NO switches and two NC switches. Power-Supply Bypassing Power-supply bypassing improves noise margin and prevents switching noise from propagating from the V+ supply to other components. A 0.1F capacitor connected from V+ to GND is adequate for most applications. MAX4737/MAX4738/MAX4739 UCSP Package Considerations For general UCSP package information and PC layout considerations, please refer to the Maxim Application Note (Wafer-Level Chip-Scale Package). UCSP Reliability The chip-scale package (UCSP) represents a unique packaging form factor that may not perform equally to a packaged product through traditional mechanical reliability tests. UCSP reliability is integrally linked to the user's assembly methods, circuit board material, and usage environment. The user should closely review these areas when considering use of a UCSP package. Performance through Operating Life Test and Moisture Resistance remains uncompromised as it is primarily determined by the wafer-fabrication process. Mechanical stress performance is a greater consideration for a UCSP package. UCSPs are attached through direct solder contact to the user's PC board, foregoing the inherent stress relief of a packaged product lead frame. Solder joint contact integrity must be considered. Information on Maxim's qualification plan, test data, and recommendations are detailed in the UCSP application note, which can be found on Maxim's website at www.maxim-ic.com. Applications Information Digital Control Inputs The MAX4737/MAX4738/MAX4739 logic inputs accept up to +5.5V regardless of supply voltage. For example, with a +3.3V supply, IN_ can be driven low to GND and high to +5.5V allowing for mixing of logic levels in a system. Driving the control logic inputs rail-to-rail minimizes power consumption. For a +1.8V supply voltage, the logic thresholds are 0.5V (low) and 1.4V (high); for a +5V supply voltage, the logic thresholds are 0.8V (low) and 2.0V (high). Analog Signal Levels Analog signals that range over the entire supply voltage (V+ to GND) are passed with very little change in on-resistance (see Typical Operating Characteristics). The switches are bidirectional, so the NO_, NC_, and COM_ pins can be either inputs or outputs. _______________________________________________________________________________________ 9 4.5 Quad SPST Analog Switches in UCSP MAX4737/MAX4738/MAX4739 Test Circuits/Timing Diagrams MAX4737/ MAX4738/ MAX4739 V N_ NO_ OR NC_ RL IN_ LOGIC INPUT GND SWITCH OUTPUT 0V t ON CL VOUT 0.9 x V0UT V+ V+ COM_ LOGIC INPUT V OUT t OFF 0.9 x VOUT V IH V IL 50% VOUT = VCOM CL INCLUDES FIXTURE AND STRAY CAPACITANCE. RL RL - RON ( ) LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES THAT HAVE THE OPPOSITE LOGIC SENSE. Figure 1. Switching Time MAX4739 COM1 COM2 IN_ LOGIC INPUT GND V+ V+ VOUT1 VOUT2 RL2 CL2 RL1 V IH 50% V IL SWITCH OUTPUT 1 (VOUT1) SWITCH OUTPUT 2 (VOUT2) CL INCLUDES FIXTURE AND STRAY CAPACITANCE. 0V tD tD 0.9 x V0UT1 0V NO_ NC_ VCOM1 VCOM2 LOGIC INPUT CL1 0.9 x VOUT2 Figure 2. Break-Before-Make Interval 10 ______________________________________________________________________________________ 4.5 Quad SPST Analog Switches in UCSP MAX4737/MAX4738/MAX4739 Test Circuits/Timing Diagrams (continued) tri 50% TxD+ Rs A B CL INPUT A90% 50% 10% tfi INPUT A 10% tskew_i 90% tro 50% 90% TxDRs Rs = 39 CL = 50pF A- BCL OUTPUT B OUTPUT B- 10% tskew_o 90% 50% 10% tfo |tro - tri| DELAY DUE TO SWITCH FOR RISING INPUT AND RISING OUTPUT SIGNALS. |tfo - tfi| DELAY DUE TO SWITCH FOR FALLING INPUT AND FALLING OUTPUT SIGNALS. |tskew_o| CHANGE IN SKEW THROUGH THE SWITCH FOR OUTPUT SIGNALS. |tskew_i| CHANGE IN SKEW THROUGH THE SWITCH FOR INPUT SIGNALS. Figure 3. Input/Output Skew Timing Diagram ______________________________________________________________________________________ 11 4.5 Quad SPST Analog Switches in UCSP MAX4737/MAX4738/MAX4739 Test Circuits/Timing Diagrams (continued) V+ MAX4737/ MAX4738/ MAX4739 VOUT VOUT VOUT CL IN OFF ON OFF V+ RGEN NC_ OR NO_ GND IN_ VIL TO VIH COM_ V GEN IN OFF ON Q = (V OUT )(C L ) OFF LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES THAT HAVE THE OPPOSITE LOGIC SENSE. Figure 4. Charge Injection V+ C = 0.1F C = 0.1F SIGNAL GENERATOR 0dBm 50* V+ NC_ or NO_ V+ MAX4737/ MAX4738/ MAX4739 NO1 50 MAX4737/ MAX4738/ MAX4739 0V OR V+ IN_ SIGNAL GENERATOR 0dBm V+ COM1 IN1 0V TO V+ NO2 GND IN2 COM2 0V OR V+ ANALYZER COM_ GND ANALYZER N.C. *USED ONLY FOR OFF-ISOLATION TEST. Figure 5a. On-Loss and Off-Isolation Figure 5b. Crosstalk Test Circuit C = 0.1F V+ Chip Information TRANSISTOR COUNT: 361 PROCESS: CMOS MAX4737/ MAX4738/ MAX4739 IN_ 0V OR V+ V+ NC_ or NO_ CAPACITANCE METER COM_ f = 1MHz GND Figure 6. Channel Off/On-Capacitance 12 ______________________________________________________________________________________ 4.5 Quad SPST Analog Switches in UCSP Pin Configurations/Functional Diagrams/Truth Tables (continued) TOP VIEW MAX4737 NO1 1 COM1 2 NO2 3 COM2 4 IN2 5 IN3 6 GND 7 14 V+ 13 IN1 12 IN4 11 NO4 10 COM4 9 COM3 8 NO3 NC1 1 COM1 2 NC2 3 COM2 4 IN2 5 IN3 6 GND 7 MAX4737/MAX4738/MAX4739 MAX4738 14 V+ 13 IN1 12 IN4 11 NC4 10 COM4 9 COM3 8 NC3 NO1 1 COM1 2 NC2 3 COM2 4 IN2 5 IN3 6 GND 7 MAX4739 14 V+ 13 IN1 12 IN4 11 NC4 10 COM4 9 COM3 8 NO3 TSSOP INPUT LOW HIGH SWITCH STATE OFF ON INPUT LOW HIGH TSSOP SWITCH STATE ON OFF INPUT LOW HIGH TSSOP NO1, NO3 OFF ON NC2, NC4 ON OFF ______________________________________________________________________________________ 13 4.5 Quad SPST Analog Switches in UCSP MAX4737/MAX4738/MAX4739 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) 16L,UCSP.EPS 14 ______________________________________________________________________________________ 4.5 Quad SPST Analog Switches in UCSP Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) TSSOP4.40mm.EPS MAX4737/MAX4738/MAX4739 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15 (c) 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. |
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