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RF2132
2
Typical Applications
* 4.8V AMPS Cellular Handsets * 4.8V CDMA/AMPS Handsets * 4.8V JCDMA/TACS Handsets * Driver Amplifier in Cellular Base Stations * Portable Battery-Powered Equipment
LINEAR POWER AMPLIFIER
2
POWER AMPLIFIERS
Product Description
The RF2132 is a high power, high efficiency linear amplifier IC. The device is manufactured on an advanced Gallium Arsenide Heterojunction Bipolar Transistor (HBT) process, and has been designed for use as the final RF amplifier in dual-mode 4-cell CDMA/AMPS handheld digital cellular equipment, spread-spectrum systems, and other applications in the 800MHz to 950MHz band. The device is self-contained with 50 input and the output can be easily matched to obtain optimum power, efficiency, and linearity characteristics over varying supply and control voltages.
0.158 0.150 0.021 0.014
-A0.009 0.004
0.392 0.386
0.069 0.064
0.050
0.244 0.230 8 MAX 0 MIN 0.010 0.008
0.060 0.054
0.035 0.016
Optimum Technology Matching(R) Applied
Si BJT Si Bi-CMOS
u
Package Style: Standard Batwing
GaAs HBT SiGe HBT
GaAs MESFET Si CMOS
Features
* Single 4.2V to 5.0V Supply * Up to 29 dBm Linear Output Power * 29dB Gain With Analog Gain Control * 45% Linear Efficiency * On-board Power Down Mode * 800MHz to 950MHz Operation
VCC 1 NC 2 RF IN 3 GND 4 GND 5 GND 6 GND 7 PC 8
16 GND 15 RF OUT 14 RF OUT 13 GND 12 GND 11 RF OUT 10 RF OUT 9 GND
BIAS
Ordering Information
RF2132 RF2132 PCBA Linear Power Amplifier Fully Assembled Evaluation Board
Functional Block Diagram
RF Micro Devices, Inc. 7628 Thorndike Road Greensboro, NC 27409, USA
Tel (336) 664 1233 Fax (336) 664 0454 http://www.rfmd.com
Rev B9 010417
2-109
RF2132
Absolute Maximum Ratings Parameter
Supply Voltage (No RF) Supply Voltage (POUT<32dBm) Power Control Voltage (VPC) DC Supply Current Input RF Power Output Load VSWR Storage Temperature Junction Temperature
Rating
-0.5 to +8.0 -0.5 to +5.0 -0.5 to +5.0 or VCC 800 +12 10:1 -40 to +150 200
Unit
VDC VDC V mA dBm C C Caution! ESD sensitive device.
RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s).
2
POWER AMPLIFIERS
Parameter
Overall
Usable Frequency Range Linear Gain Total Linear Efficiency Efficiency at Max Output OFF Isolation Second Harmonic Maximum Linear Output Power Adjacent Channel Power Rejection @ 885 kHz Adjacent Channel Power Rejection @ 1.98 MHz Maximum CW Output Power Operating Case Temperature Ambient Operating Temperature Junction to Case Thermal Resistance Input VSWR Output Load VSWR
Specification
Min. Typ. Max.
Unit
Condition
T=25 C, VCC =4.8V, VPC =4.0V, Freq=824MHz to 849MHz
800 27 40 50 23
824 to 849 29 45 55 27 -30 28.5 -46
950 31
MHz dB % % dB dBc dBc
29 -44
-58 31.5 -30 -30 32
-56
dBc dBm C C C/W
VPC =0V,PIN =+6dBm Including Second Harmonic Trap IS-95A CDMA Modulation Pout = 28 dBm ACPR can be improved by trading off efficiency. Pout = 28 dBm
110 100 85 <2:1 10:1 100 10 0.5 Vcc 5.0 100 20
Pout = 31 dBm, Efficiency = 55%
No oscillations ns A V V V mA mA
Power Down
Turn On/Off Time Total Current VPC "OFF" Voltage VPC "ON" Voltage "OFF" State
0.2 3.6 4.2
4.0 4.8 40 15
Power Supply
Power Supply Voltage Idle Current Current into VPC pin Operating voltage VPC =4.0V "ON" State
2-110
Rev B9 010417
RF2132
Pin 1 Function VCC1 Description
Power supply for the driver stage, and interstage matching. Shunt inductance is required on this pin, which can be achieved by an inductor to VCC, with a decoupling capacitor on the VCC side. The value of the inductor is frequency dependent; 3.3nH is required for 830MHz, and 1.2nH for 950MHz. Instead of an inductor, a high impedance microstrip line can be used. Not Connected. RF input. This is a 50 input, but the actual input impedance depends on the interstage matching network connected to pin 1. An external DC blocking capacitor is required if this port is connected to a DC path to ground or a DC voltage. Ground connection. Keep traces physically short and connect immediately to the ground plane for best performance. Same as pin 4. Ground for stage 1. Keep traces physically short and connect immediately to ground plane for best performance. This ground should be isolated from the batwing and other ground contacts. See evaluation board layout. Same as pin 6. Power Control. When this pin is "low", all circuits are shut off. A "low" is typically 0.5V or less at room temperature. During normal operation this pin is the power control. Control range varies from about 2V for 0dBm to VCC for +31dBm RF output power. The maximum power that can be achieved depends on the actual output matching. PC should never exceed 5.0V or VCC, whichever is the lowest.
PC
Interface Schematic
VCC
RF IN From Bias Stages
4 5 6
GND GND GND
7 8
GND PC
To RF Transistors
9 10
GND RF OUT
Same as pin 4. RF Output and power supply for the output stage. The four output pins are combined, and bias voltage for the final stage is provided through these pins. The external path must be kept symmetric until combined to ensure stability. An external matching network is required to provide the optimum load impedance; see the application schematics for details. Same as pin 10. Same as pin 4. Same as pin 4. Same as pin 10. Same as pin 10. Same as pin 4. See pin 10. See pin 10.
RF OUT
From Bias Stages
11 12 13 14 15 16
RF OUT GND GND RF OUT RF OUT GND
See pin 10.
Rev B9 010417
2-111
POWER AMPLIFIERS
2 3
NC RF IN
2
See pin 1.
RF2132
Application Schematic
VCC 1 nF Vcc = 4.8 V Vpc = 4.0 V
2
POWER AMPLIFIERS
100 pF 1.8 nH 1 100 pF 2 3 4 5 18 k 6 BIAS 7 8 1 nF 11 10 9 12 pF 3.3 nH 100 pF RF OUT 4.3 pF 16 15 14 13 12 6.8 nH
100 pF RF IN 3 pF
VPC
Evaluation Board Schematic
(Download Bill of Materials from www.rfmd.com.)
Power supply filtering/bypassing for V cc Vcc = 4.8 V Vpc = 4.0 V C1 100 nF C2 11 F C3 1 F C4 1 nF C5 100 pF 1 C6 100 pF 2 3 4 5 6 7 P1-3 C12 3.3 F C13 1 nF C14 100 pF 8 16 P1-3 15 14 13 12 11 10 9 C10 12 pF C11 4.3 pF L3 3.3 nH C7 3 pF L2 6.8 nH P1-1 P1 1 2 3 VCC GND PC
P1-1
Interstage tuning (L1) for centering output frequency C8 33 pF
L1 1.8 nH
RF IN J1
Bias inductor for the amplifier output stage Harmonic trap: C7 series resonates with internal bondwires of pins 14 and 15 at 2f0 to effectively short out 2nd harmonic for optimum gain and efficiency C9 100 pF
Adds bias to the first amplifier stage for improved linearity
R1 18 k
BIAS
RF OUT J2
Matching network for optimum load impedance
Power supply filtering/bypassing for V PC
2-112
Rev B9 010417
RF2132
Evaluation Board Layout 2" x 2"
2
POWER AMPLIFIERS
Rev B9 010417
2-113
RF2132
RF2132 Evaluation Board Vcc = 4.8 V, Vpc = 4.0 V, Frequency = 836 MHz, IS-95A CDMA 90 80 70
ACPR 885 kHz ACPR (-dBc), Efficiency (%) 250 350
2
POWER AMPLIFIERS
ACPR 1.98 MHz
300
60 50
Current 200 Current (mA)
40 30
150
100
20
Total Efficiency 50
10 0 28 26 24 22 20 18 16 14 12 10
0
Pout (dBm)
2-114
Rev B9 010417

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