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BU2279F Multimedia ICs Clock generator for PC BU2279F BU2279F is an IC that generates multiple clocks from the built-in PLL by inputting standard clocks from outside. This IC is suitable for digital appliances. 54 MHz for video and 33.333MHz of digital system clock for CPU can be generated from widely used 13.5 MHz clock. Applications DVD recorder, PC External dimensions (Units : mm) 10.00.2 16 9 6.20.3 Features 1) Clock signals are generated by crystal oscillator. 2) SOP16 package. 3) Single power supply 3.3V. 4) No external components for PLL 4.40.2 1 8 1.50.1 0.150.1 0.1 0.11 1.27 0.40.1 SOP16 Absolute maximum rating*i Ta=25C*j Parameter Impressed voltage Input voltage Storage temperature range Power dissipation Symbol VDD VIN Pd Tstg Limits -0.5 ~ 7.0 -0.5 ~ VDD+0.5 500 -30 ~ 125 Unit V V mW C Ratio above does not guarantee the operation. When the condition is over Ta=25 C, dissipatioin is decreased 5mWper 1 C. Radiation resistance design is not used. Power dissipation is. Recommended operational conditions*i Ta=25C*j Parameter Power supply voltage Voltage range of "H" input Voltage range of "L" input Operation temperature range Maximum output load Symbol VDD VIH VIL Topr CL Min. 3.0 0.8VDD 0 -5 - Typ. - - - - - Max. 3.6 VDD 0.2VDD 70 15 Unit V V V C pF 0.3Min. 1/2 BU2279F Multimedia ICs Electric Characteristics (Unless any specification, Vcc=3.3V, Ta=25C, Crystal frequency=13.500MHz) Parameter Output "L" voltage Output "H" voltage Operation current VCLK SCLK Design assurances VCLK Duty SCLK Duty Jitter1 Jitter2 Rise time Fall time LOCK time of output Duty V Duty S Jstd1 Jstd2 tr tr tLOCK 45 48 - - - - - 50 53 80 400 2.5 2.5 - 55 58 - - - - 1 % % psec psec nsec nsec msec Measured at 1/2VDD Measured at 1/2VDD Jitter 1 Jitter MIN=MAX Symbol VOL VOH IDD VCLK SCLK Min. - 24 - - - Typ. - - 30 54.00 33.333 Max. 0.4 - 60 - - Unit V V mA MHz MHz IOL=4.0mA IOH=-4.0mA No load Xtal 160 20 2 Xtal 400 27 6 Conditions Remarks ) The output frequency is calculated from the input frequency of XTALIN. The value of output frequency above is the case of input frequency is 13.5MHz. The values of Jitter above are the center value of 10000 sampling by time interval analyzer. ) The time for output frequency to be stabled after the power supply become 3.0V. + + Application circuit Fixed to "L" 1 CTRL1 2 TEST1 OE CTRL3 TEST2 AVDD DVDD SCLK DVDD VCLK BU2279F 16 15 14 13 12 11 10 9 54MHz output 33.3MHz output Fixed to "L" Fixed to "L" 3 CTRL2 4 AGND 5 DGND 6 DVDD 0.1F 7 XTALIN 8 XTALOUT 0.1F 0.1F 0.1F Remarks) The IC is basically needed to be on the board. (Unless it is on the board, the characteristics are not guaranteed.) Decoupling capacitance(0.1F) is needed to be placed between 13PIN(AVDD) and 4PIN(AGND).Decoupling capacitance(0.1F)is needed to be placed between 16PIN(DVDD) 10PIN(DVDD), 12PIN(DVDD) and 5PIN(DGND) each. To adjust the frequency of crystal, place a certain value of capacitance(pF) between 7 or 8PIN and DGND. 2pin and 4pin are needed to be fixed to "OPEN" through the operation. 2/2 |
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