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4K x 36 BiCMOS DUAL-PORT STATIC RAM MODULE Integrated Device Technology, Inc. IDT7M1014 FEATURES * High-density 4K x 36 BiCMOS Dual-Port Static RAM module * Fast access times -- Commercial: 15, 20ns -- Military: 25, 30ns * Fully asynchronous read/write operation from either port * Surface mounted LCC packages allow through-hole module to fit on a ceramic PGA footprint * Single 5V (10%) power supply * Multiple GND pins and decoupling capacitors for maximum noise immunity * Inputs/outputs directly TTL-compatible DESCRIPTION The IDT7M1014 is a 4K x 36 asynchronous high-speed BiCMOS Dual-Port static RAM module constructed on a cofired ceramic substrate using 4 IDT7014 (4K x 9) asynchronous Dual-Port RAMs. The IDT7M1014 module is designed to be used as stand-alone 36-bit dual-port RAM. This module provides two independent ports with separate control, address, and I/O pins that permit independent and asynchronous access for reads or writes to any location in memory. The IDT7M1014 module is packaged in a 142-lead ceramic PGA (Pin Grid Array). Maximum access times as fast as 15ns and 25ns are available over the commercial and military temperature ranges respectively. All IDT military modules are constructed with semiconductor components manufactured in compliance with the latest revision of MIL-STD-883, Class B making them ideally suited to applications demanding the highest level of performance and reliability. FUNCTIONAL BLOCK DIAGRAM L_A0 - 11 L_I/O0 - 8 L_OEL IDT7014 4K x 9 R_A0 - 11 R_I/O0 - 8 R_OEL L_R/W0 L_I/O9 - 17 IDT7014 4K x 9 L_R/W1 L_I/O18 - 26 L_OEH IDT7014 4K x 9 R_R/W0 R_I/O9 - 17 R_R/W1 R_I/O18 - 26 R_OEH L_R/W2 L_I/O27 - 35 IDT7014 4K x 9 L_R/W3 R_R/W2 R_I/O27 - 35 R_R/W3 2819 drw 01 The IDT logo is a registered trademark of Integrated Device Technology, Inc. MILITARY AND COMMERCIAL TEMPERATURE RANGES (c)1996 Integrated Device Technology, Inc. DECEMBER 1995 DSC-2819/4 7.03 1 IDT7M1014 4K x 36 BiCMOS DUAL-PORT STATIC RAM MODULE MILITARY AND COMMERCIAL TEMPERATURE RANGES PIN CONFIGURATION 1 A B C D E F G H J K L M N GND L_I/O4 L_I/O8 L_I/O9 L_I/O12 L_I/O13 GND L_I/O14 L_I/O15 L_I/O20 L_I/O21 L_I/O23 GND 2 L_I/O3 L_I/O5 VCC L_I/O10 N.C. L_OE L L_R/W0 L_R/W2 L_I/O16 L_I/O19 VCC L_I/O24 L_I/O26 3 L_I/O2 L_I/O6 L_I/O7 L_I/O11 N.C. L_OE H L_R/W1 L_R/W3 L_I/O17 L_I/O18 L_I/O22 L_I/O25 L_I/O27 4 GND L_A 2 GND L_A 3 L_A 4 L_A5 GND L_A 6 L_A 7 GND L_A 8 L_I/O29 L_I/O28 L_A 10 L_A 9 L_I/O30 GND L_A 11 L_I/O31 L_I/O32 L_I/O33 GND R_I/O35 L_I/O35 L_I/O34 R_A11 R_I/O34 R_I/O33 R_I/O32 R_A10 R_I/O30 R_I/O31 GND 5 L_I/O1 L_A 1 N.C. GND 6 L_I/O0 L_A 0 N.C. 7 GND N.C. N.C. 8 R_I/O0 R_A0 N.C. GND 9 R_I/O1 R_A1 N.C. R_A3 10 GND R_A2 GND R_A4 R_A5 R_A6 GND R_A7 R_A8 GND R_A9 R_I/O29 R_I/O28 11 R_I/O2 R_I/O6 R_I/O7 R_I/O11 N.C. R_OE H R_R/W1 R_R/W3 R_I/O17 R_I/O18 R_I/O22 R_I/O25 R_I/O27 12 R_I/O3 R_I/O5 VCC R_I/O10 N.C. R_OE L R_R/W0 R_R/W2 R_I/O16 R_I/O19 VCC R_I/O24 R_I/O26 13 GND R_I/O4 R_I/O8 R_I/O9 R_I/O12 R_I/O13 GND R_I/O14 R_I/O15 R_I/O20 R_I/O21 R_I/O23 GND 2819 drw 02 2809 drw 02 PIN NAMES Left Port L_R/W 0-3 L_OE L, H L_A 0-11 L_I/O 0-35 VCC GND Right Port R_R/W 0-3 R_OE L, H R_A 0-11 R_I/O 0-35 Names Byte Read/Write Enables Word Output Enables Address Inputs Data Input/Outputs Power Ground 2819 tbl 01 7.03 2 IDT7M1014 4K x 36 BiCMOS DUAL-PORT STATIC RAM MODULE MILITARY AND COMMERCIAL TEMPERATURE RANGES ABSOLUTE MAXIMUM RATINGS(1) Symbol VTERM (2) Rating Terminal Voltage with Respect to GND Terminal Voltage Operating Temperature Temperature Under Bias Storage Temperature DC Output Current Commercial -0.5 to +7.0 Military -0.5 to +7.0 Unit V RECOMMENDED DC OPERATING CONDITIONS Symbol VCC GND VIH VIL Parameter Supply Voltage Supply Voltage Input HIGH Voltage Input LOW Voltage Min. 4.5 0 2.2 -0.5 (1) Typ. 5.0 0 -- -- Max. 5.5 0 6.0 0.8 Unit V V V V 2819 tbl 03 VTERM(3) TA TBIAS TSTG IOUT -0.5 to +7.0 0 to +70 -10 to +85 -55 to +125 50 -0.5 to +7.0 -55 to +125 -65 to +135 -65 to +150 50 V C C C mA NOTE: 1. VIL -3.0V for pulse width less than 20ns. NOTES: 2819 tbl 02 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. Inputs and VCC terminals only. 3. I/O terminals only. RECOMMENDED OPERATING TEMPERATURE AND SUPPLY VOLTAGE Grade Military Commercial Ambient Temperature -55C to +125C 0C to +70C GND 0V 0V VCC 5.0V 10% 5.0V 10% 2819 tbl 04 CAPACITANCE TABLE (TA = +25C, f = 1.0MHz) Symbol C_IN(1) C_IN(2) C_IN(3) COUT Parameter Input Capacitance (Address) Input Capacitance (Data, R/W) Input Capacitance (OE) Output Capacitance (Data) Conditions V_IN = 0V V_IN = 0V V_IN = 0V V_OUT = 0V Max. 50 15 25 15 Unit pF pF pF pF 2819 tbl 05 NOTE: 1. This parameter is guaranteed by design but not tested. 7.03 3 IDT7M1014 4K x 36 BiCMOS DUAL-PORT STATIC RAM MODULE MILITARY AND COMMERCIAL TEMPERATURE RANGES DC ELECTRICAL CHARACTERISTICS (VCC = 5V 10%, TA = -55C to +125C or 0C to +70C) Symbol |ILI| |ILO| VOL VOH Parameter Input Leakage VIN = GND to VCC OE Test Conditions VCC = Max. VCC = Max. VCC = Min. IOL = 4mA VCC = Min. IOH = -4mA Min. -- -- -- 2.4 Max. 40 10 0.4 -- Unit A A V V 2819 ttbl 06 Output Leakage VIH, VOUT = GND to VCC Output LOW Voltage Output HIGH Voltage DC ELECTRICAL CHARACTERISTICS (VCC = 5V 10%, TA = -55C to +125C or 0C to +70C) Symbol ICC Parameter Operating Current Test Conditions VCC = Max., Outputs Open, f = fMAX (1) Min. -- Max. 1040 Unit mA NOTE: 2819 tbl 07 1. At f=fMAX, address and data inputs (except OE) are cycling at the maximum frequency of read cycle of 1/tRC, and using "AC TEST CONDITIONS" of input levels of GND to 3V. AC TEST CONDITIONS Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels Output Load GND to 3.0V 3ns 1.5V 1.5V See Figures 1-3 2819 tbl 08 +5 V 8 7 480 DATAOUT 255 5 pF* 6 TAA (Typical, ns) 5 4 3 2 2819 drw 03 1 *Including scope and jig. Figure 1. Output Load (For tCHZ, tCLZ, tOHZ, tOLZ, tWHZ, tOW) 20 40 60 80 100 120 140 160 180 200 CAPACITANCE (pF) 2819 drw 04b DATA OUT Zo = 50 50 1.5V 2819 drw 04a Figure 3. Alternate Lumped Capacitive Load, Typical Derating Figure 2. Alternate Output Load 7.03 4 IDT7M1014 4K x 36 BiCMOS DUAL-PORT STATIC RAM MODULE MILITARY AND COMMERCIAL TEMPERATURE RANGES AC ELECTRICAL CHARACTERISTICS (VCC = 5V 10%, TA = -55C to +125C or 0C to +70C) 7M1014SxxG -15 Symbol Parameter Min. Max. Min. Read Cycle tRC tAA tOE tOH tOLZ (1) 7M1014SxxGB -20 Max. Min. -25 Max. -30 Min. Max. Unit Read Cycle Time Address Access Time Output Enable Access Time Output Hold from Address Change Output Enable to Output in Low-Z Output Disable to Output in Hi-Z 15 -- -- 3 0 -- -- 15 8 -- -- 7 20 -- -- 3 0 -- -- 20 10 -- -- 9 25 -- -- 3 0 -- -- 25 12 -- -- 11 30 -- -- 3 0 -- -- 30 15 -- -- 13 ns ns ns ns ns ns tOHZ(1) Write Cycle tWC tAW tAS tWP tWR tDW tDH tWHZ (1) Write Cycle Time Address Valid to End of Write Address Set-Up Time Write Pulse Width Write Recovery Time Data Valid to End of Write Data Hold Time Write Enable to Output in Hi-Z Output Active from End of Write Write Pulse to Data Delay Write Data Valid to Read Data Delay 15 14 0 12 1 10 0 -- 0 -- -- -- -- -- -- -- -- -- 7 -- 30 25 20 15 0 15 2 12 0 -- 0 -- -- -- -- -- -- -- -- -- 9 -- 40 30 25 20 0 20 2 15 0 -- 0 -- -- -- -- -- -- -- -- -- 11 -- 45 35 30 25 0 25 2 20 0 -- 0 -- -- -- -- -- -- -- -- -- 13 -- 50 40 ns ns ns ns ns ns ns ns ns ns ns 2819 tbl 09 tOW(1) tWDD tDDD(1) NOTES: 1. This parameter is guaranteed by design but not tested. 2. Port-to-Port delay through the RAM cells from the writing port to the reading port. TIMING WAVEFORM OF READ CYCLE NO. 1 (EITHER SIDE) (1,2) tRC ADDRESS tAA DATAOUT tOH 2819 drw 05 tOH NOTES: 1. R/W is HIGH for Read Cycles. 2. OE VIL. 7.03 5 IDT7M1014 4K x 36 BiCMOS DUAL-PORT STATIC RAM MODULE MILITARY AND COMMERCIAL TEMPERATURE RANGES TIMING WAVEFORM OF READ CYCLE NO. 2 (EITHER SIDE) tOE (1, 2) OE tOLZ DATAOUT (3) tOHZ DATA VALID (3) TIMING WAVEFORM OF READ WITH PORT-TO-PORT DELAY tWC ADDRR (1) 2819 drw 06 MATCH tWP R/WR tDW DATAIN R VALID ADDRL tWDD DATAOUT L MATCH VALID tDDD NOTES: 1. R/W is HIGH for Read Cycles. 2. Adress valid prior to OE transition LOW. 3. This parameter is guaranteed by design but not tested. 2819 drw 07 7.03 6 IDT7M1014 4K x 36 BiCMOS DUAL-PORT STATIC RAM MODULE MILITARY AND COMMERCIAL TEMPERATURE RANGES TIMING WAVEFORM OF WRITE CYCLE (EITHER SIDE) tWC ADDRESS (1,2) tOHZ (3) OE tAW tAS R/ tWP tWR W tWHZ tOW (4) DATAOUT (4) tDW DATAIN DATA VALID tDH NOTES: 1. R/W is HIGH during all address transitions. 2. If OE is LOW during the write cycle, the write pulse width must be the larger of tWP or (tWZ + tDW) to allow the I/O drivers to turn off and data to be placed on the bus for the required tDW. If OE is HIGH, this requirement does not apply, and the write pulse can be as short as the specified tWP. 3. This parameter is guaranteed by design but not tested. 4. During this period, the I/O pins are in the output state and input signals must not be applied. 2819 drw 08 7.03 7 IDT7M1014 4K x 36 BiCMOS DUAL-PORT STATIC RAM MODULE MILITARY AND COMMERCIAL TEMPERATURE RANGES PACKAGE DIMENSIONS TOP VIEW 1.327 1.353 SIDE VIEW 0.045 0.055 0.015 0.021 1.327 1.353 0.100 TYP 0.195 MAX 0.125 0.135 PIN A1 0.050 TYP BOTTOM VIEW 2819 drw 10 ORDERING INFORMATION IDT XXXX Device Type A Power 999 Speed A Package A Process/ Temperature Range BLANK B Commercial (0C to +70C) Military (-55C to +125C) Semiconductor Components compliant to MIL-STD883, Class B Ceramic PGA (Pin Grid Array) (Commercial Only) (Commercial Only) (Military Only) (Military Only) Standard Power 4K x 36 BiCMOS Dual-Port static RAM Module 2819 drw 10 G 15 20 25 30 S 7M1014 Speed in Nanoseconds 7.03 8 |
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