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SNR008
8M-bit Mask ROM
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1. 2. 3. 4. 5. 6. 7. 7.1 7.2 8.
Contents
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INTRODUCTION............................................................................................................... 3 FEATURES ....................................................................................................................... 3 PIN ASSIGNMENTS ......................................................................................................... 3 Memory mapping for AD Bus Interface......................................................................... 4 ABSOLUTE MAXIMUM RATINGS................................................................................... 5 ELECTRICAL CHARACTERISTICS ................................................................................ 5 Application circuit ........................................................................................................... 6 AD Bus Interface (with SNC710) .................................................................................. 6 Standard ROM interface (with SNL310) ....................................................................... 7 BONDING PAD ................................................................................................................. 8
Ver. 1.3
1
August 29, 2003
SNR008
8M-bit Mask ROM AMENDENT HISTORY
Version Ver 1.0 Ver 1.1 Date March 11, 2003 April 18, 2003 V1.0 first issue Modify the pin assignment table Add bonding pad information & application circuit Ver 1.2 Ver 1.3 April 21, 2003 August 29, 2003 Modify application circuit & bonding pad information Modify operation current from typ.4mA -> MAX. 4mA Modify access time Max = 200ns in Electrical Characteristic Description
Ver. 1.3
2
August 29, 2003
SNR008
8M-bit Mask ROM
1. INTRODUCTION
The SNR008 is a signal power, 8M-bit, read only memory. It is organized as 1M bytes, operates for single 3V power supply, support static standby mode. The SNR008 embedded two different interfaces, one is a standard 8-bit interface bus which compatible with SNL310, another one is a special 8-bit AD (address/data) bus which compatible with SNC710. SNR008 offers automatic power-down, with power-down controlled by the chip enable "CE\". When chip enable goes to high, SNR008 will entry power-down mode in order to save the power consumption.
2. FEATURES
Power supply: 2.4V ~ 3.6V Memory Size: 8M-bit Totally static operation Embedded a standard 8-bit bus interface compatible with SNL310 or a 8-bit AD (address/data) bus interface compatible with SNC710 Access time: 200ns @3V
3. PIN ASSIGNMENTS
Symbol TYPE A[8..19] A[7] A[6] A[5] A[4] A[3] A[2] A[1] A[0] D[0..7] CEB OEB VDD GND I/O Standard ROM interface I 1: Standard ROM type I Standard ROM Address [8..19] I Standard ROM Address A7 I Standard ROM Address A6 I Standard ROM Address A5 I Standard ROM Address A4 I Standard ROM Address A3 I Standard ROM Address A2 I Standard ROM Address A1 I Standard ROM Address A0 I/O Standard ROM Data [0..7] I Standard ROM Chip Enable I Standard ROM Output Enable P 3.3volt Positive Power supply P Ground AD Bus interface 0: AD Bus interface NC TESTM Bank Select 4 Bank Select 3 Bank Select 2 Bank Select 1 Bank Select 0 ALECLK READY Address/Data bus [0..7] Chip Enable NC 3.3volt Positive Power supply Ground
Ver. 1.3
3
August 29, 2003
SNR008
8M-bit Mask ROM
4. Memory mapping for AD Bus Interface
For 8-bit AD (address/data) bus interface, all the address and data communication between SNC710 and SNR008 are through data bus D[0..7]. SNC710 allows user to connect maximum 2 external mask ROM, and SNR008 has 5 bank select pins (BS0~BS4) to specify the memory region of each mask ROM.
BS4~BS0 00100 00101 00110 00111 01000 01001 01010 01011 01100 01101 01110 01111 10000 10001 Address Region 0x0200000 ~ 0x027FFFF 0x0280000 ~ 0x02FFFFF 0x0300000 ~ 0x037FFFF 0x0380000 ~ 0x03FFFFF 0x0400000 ~ 0x047FFFF 0x0480000 ~ 0x04FFFFF 0x0500000 ~ 0x057FFFF 0x0580000 ~ 0x05FFFFF 0x0600000 ~ 0x067FFFF 0x0680000 ~ 0x06FFFFF 0x0700000 ~ 0x077FFFF 0x0780000 ~ 0x07FFFFF 0x0800000 ~ 0x087FFFF 0x0880000 ~ 0x08FFFFF BS4~BS0 10010 10011 10100 10101 10110 10111 11000 11001 11010 11011 11100 11101 11110 11111 Address Region 0x0900000 ~ 0x097FFFF 0x0980000 ~ 0x09FFFFF 0x0A00000 ~ 0x0A7FFFF 0x0A80000 ~ 0x0AFFFFF 0x0B00000 ~ 0x0B7FFFF 0x0B80000 ~ 0x0BFFFFF 0x0C00000 ~ 0x0C7FFFF 0x0C80000 ~ 0x0CFFFFF 0x0D00000 ~ 0x0D7FFFF 0x0D80000 ~ 0x0DFFFFF 0x0E00000 ~ 0x0E7FFFF 0x0E80000 ~ 0x0EFFFFF 0x0F00000 ~ 0x0F7FFFF 0x0F80000 ~ 0x0FFFFFF
Table-1 Note: For the address region 0x00000~0x01FFFFF are reserved, and the setting of bank select pins BS4~BS0 CAN'T be the range 0000~0x0011.
Ver. 1.3
4
August 29, 2003
SNR008
8M-bit Mask ROM
5. ABSOLUTE MAXIMUM RATINGS
Items Supply Voltage Input Voltage Operating Temperature Storage Temperature Symbol VDD-V VIN TOP TSTG Min -0.3 GND-0.3 0 -55.0 Max 6.0 VDD+0.3 55 125.0 Unit. V V o C o C
6. ELECTRICAL CHARACTERISTICS
Item Operating Voltage Standby current Operating Current Address access time Sym. VDD ISBY IOPR tAA Min. 2.4 Typ. 1.5 4 Max. 3.6 2.0 200 Unit V uA ns VDD=3V, no load Vdd=3V mA VDD=3V, no load Condition
Ver. 1.3
5
August 29, 2003
SNR008
8M-bit Mask ROM
7. Application circuit
7.1 AD Bus Interface (with SNC710)
VDD3V
U1 9 45 VDD3V 58 220K 51 49 0.1uF 48 20 15pF 16MHZ SPEAKER 15pF 44 46 24 23 25 TR1 TR2 TR3 TR4 TR5 TR6 TR7 TR8 10 11 14 15 16 17 18 19 BP0 BN0 VO VDD GND P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST TEST CKSEL EXTM VDD VDD VDD
SNC710 CVDD CVDD CVDD LXIN 12 33 53 22 47uF AD0 AD1 AD2 AD3 GND AD4 AD5 AD6 AD7 VDD3V CE_ READY ALECLK GND GND GND VDD3V GND GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 U1
LXOUT P0.0 P0.1 P0.2
21 50 54 55 56 57 60 61 62 1 2 3 4 5 6 7 8 42 41 40 39 37 36 35 34 32 31 30 29 28 VDD3V 330 330 330 330 330 330 330 330
26
P0.3 XIN P0.4 P0.5 P0.6 P0.7 P0.8 P0.9 P0.10 P0.11 P0.12 P0.13 P0.14 P0.15 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 CEB CEIN READY ALECLK CLKIN
27
XOUT
AD0 AD1 AD2 AD3 GND AD4 AD5 AD6 AD7 VDD CEB READY ALECLK GND BS0 BS1 BS2 BS3 BS4 TESTM
ROM#1 0x200000-0x27FFFF
SNR008 3V 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 U2
VDD3V
Extension ROM card
VDD3V VDD3V
CONN 18
CONN 18
AD0 AD1 AD2 AD3 GND AD4 AD5 AD6 AD7 VDD3V CE_ READY ALECLK GND VDD3V GND VDD3V GND GND
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
ROM Interface
AD0 AD1 AD2 AD3 GND AD4 AD5 AD6 AD7 VDD CEB READY ALECLK GND BS0 BS1 BS2 BS3 BS4 TESTM
ROM#2 0x280000-0x2FFFFF
13 38 43 47 52 59
GND GND GND GND GND GND
SNR008
VDD3V
Ver. 1.3
6
August 29, 2003
VDD3V
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
TYPE NC VDD NC NC NC NC NC NC NC NC NC NC NC NC
VDD3V
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
TYPE NC VDD NC NC NC NC NC NC NC NC NC NC NC NC
SNR008
8M-bit Mask ROM 7.2 Standard ROM interface (with SNL310)
VDD
U1 SNL310 3 19 VDD VDD VDD VDD VDD VDD RST CKSEL TESTM P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7 P2.8 P2.9 P2.10 P2.11 P2.12 P2.13 P2.14 P2.15 P3.0 P3.1 P3.2 P3.3 P3.4 P3.5 P3.6 P3.7 P3.8 P3.9 P3.10 P3.11 P3.12 P3.13 P3.14 P3.15 GND GND GND GND 90 89 88 87 86 82 81 80 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 61 59 58 57 56 55 54 51 41 46 84 50 LXOUT 1 CVDD CVDD LXIN 26
VDD
VDD
15pF
85 2 Y2 C4
VDD
37 48 R1 220K RST C1 0.1uF 60 79 83 52 53 15pF 15pF C2 16MHZ SPEAKER A16 A17 A18 A19 A20 A21 RDB D0 D1 D2 D3 D4 D5 D6 D7 Y1 7 C3 47 49 4 25 24 23 22 21 20 18 16 15 14 13 12 11 10 9 8 5 17 28
1.5V C6 47uF 1.5V
C5 P2_0 P2_1 P2_2 P2_3 P2_4 P2_5 P2_6 P2_7 P2_8 P2_9 P2_10 P2_11 P2_12 P2_13 P2_14 P2_15
32768HZ 15pF
VDD U2 VDD VDD D0 D1 D2 D3 D4 D5 D6 D7 1 2 3 4 6 7 8 9 AD0/D0 AD1/D1 AD2/D2 AD3/D3 AD4/D4 AD5/D5 AD6/D6 AD7/D7 READYB/A0 ALECLK/A1 BS0/A2 BS1A3 BS2/A4 BS3/A5 BS4/A6 TESTM/A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 10 23 12 13 15 16 17 18 19 20 24 25 26 27 28 29 30 31 32 33 34 35 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19
VDD
6
XIN
C7 0.1uF
XOUT
BP0 BN0 VO P5.0 P5.1 P5.2 P5.3 P5.4 P5.5 P5.6 P5.7 P5.8 P5.9 P5.10 P5.11 P5.12 P5.13 P5.14 P5.15 GND GND GND
CEB RDB CEB VDD
11 22 21
CEB OEB GND 5 GND 14 TYPE
SNR008
A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
27 29 30 31 32 33 34 35 36 38 39 40 42 43 44 45
P4.15 P4.14 P4.13 P4.12 P4.11 P4.10 P4.9 P4.8 P4.7 P4.6 P4.5 P4.4 P4.3 P4.2 P4.1 P4.0
Ver. 1.3
7
August 29, 2003
SNR008
8M-bit Mask ROM
8. BONDING PAD
35 A19 34 A18 33 A17 32 A16 31 A15 30 A14 29 A13 28 A12 (0.00,0.00) 27 A11 26 A10 25 A9 24 A8 23 VDD 22 OEB 21 TYPE
1 AD0/D0
2 AD1/D1
3 AD2/D2
4 AD3/D3
5 GND
6
7 AD5/D5
8 AD6/D6
9 10 11 12 13 14 15 16 17 18 19 20 AD7/D7 BS0/A2 READY/A0 ALECLK/A1 TESTM/A7 BS1/A3 BS4/A6 CEB GND VDD
Note: The substrate MUST be connected to Vss in PCB layout.
Ver. 1.3
8
August 29, 2003
SNR008
8M-bit Mask ROM
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Ver. 1.3
9
August 29, 2003

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