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QS5805T/AT/BT GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER
INDUSTRIAL TEMPERATURE RANGE
GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER
FEATURES:
- - 10 output, low skew signal buffer Guaranteed low skew: * 0.7ns output skew (same bank) * 0.9ns output skew (different bank) * 1ns part-to-part skew Input hysteresis for better noise margin Monitor output Undershoot clamp diodes on all inputs Std., A, and B speed grades Available in QSOP and SOIC packages
QS5805T/AT/BT
DESCRIPTION:
The QS5805T clock buffer/driver circuits can be used for clock buffering schemes where low skew is a key parameter. This device offers two banks of five non-inverting outputs. This device provides low propagation delay buffering with on-chip skew of 0.7ns for same-transition, same-bank signals. The QS5805T is characterized for operation at -40C to +85C.
- - - - -
FUNCTIONAL BLOCK DIAGRAM
OEA 5 INA OA 5 OA 1
MON 5 INB OB 5 OB 1
OEB
INDUSTRIAL TEMPERATURE RANGE
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c 1999 Integrated Device Technology, Inc.
JULY 2000
DSC-5267
QS5805T/AT/BT GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
VCCA OA1 OA2 OA3 G NDA OA4 OA5 G N DQ O EA INA 1 2 3 4 5 6 7 8 9 10 SO20-2 SO20-8 20 19 18 17 16 15 14 13 12 11 VCCB O B1 O B2 O B3 G NDB O B4 O B5 MON O EB INB
ABSOLUTE MAXIMUM RATINGS
Symbol VTERM(2) VTERM(3) VAC IOUT TSTG TJ Description Supply Voltage to Ground DC Output Voltage VOUT DC Input Voltage VIN AC Input Voltage (pulse width 20ns) DC Input Diode Current VIN < 0 DC Output Current Max. Sink Current/Pin Storage Temperature Junction Temperature
(1) Unit V V V V mA mA C C
Max. - 0.5 to +7 - 0.5 to +7 - 0.5 to +7 -3 -20 120 - 65 to +150 150
QSOP/ SOIC TOP VIEW
NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. Vcc Terminals. 3. All terminals except Vcc.
CAPACITANCE
Pins CIN COUT
(TA = +25OC, f = 1.0MHz, VIN = 0V)
Max. (1) 6 9 Unit pF pF
Typ. 4 7
NOTE: 1. This parameter is guaranteed but not production tested.
PIN DESCRIPTION
Pin Names OEA, OEB INA, INB OAn, OBn MON I/O I I O O Description Output Enable Inputs Clock Inputs Clock Outputs Unbuffered Monitor Output
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QS5805T/AT/BT GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Industrial: TA = -40C to +85C, VCC = 5.0V 10%
Symbol VIH VIL VIC VOH VOL IIN IOFF IOZ IOS VT Parameter Input HIGH Voltage Input LOW Voltage Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage Input Leakage Current Input/Output Power Off Leakage Output Leakage Current Short Circuit Current Input Hysteresis
(2,3) (3)
Test Conditions Guaranteed Logic HIGH for All Inputs Guaranteed Logic LOW for All Inputs Vcc = Min., IIN = -18mA Vcc = Min., IOH = -24mA Vcc = Min., IOH = -32mA Vcc = Min., IOL = 64mA Vcc = Max., VIN = Vcc or GND Vcc = 0V, VIN or VOUT = Vcc or GND Vcc = Max., VOUT = Vcc or GND Vcc = Max., VOUT = GND VTLH - VTHL for All Inputs
Min. 2 -- -- 2.4 2 -- -- -- --
Typ.(1) -- -- -0.7 -- -- -- -- -- -- -- 0.2
Max. -- 0.8 -1.2 -- -- 0.55 1 1 1 -250 --
Unit V V V V V V A A A mA V
-60
--
NOTES: 1. Typical values are at VCC = 5.0V, TA = 25C. 2. Not more than one output should be used to test this high power condition. Duration is less than one second. 3. Guaranteed by design but not tested.
POWER SUPPLY CHARACTERISTICS
Symbol ICC ICC ICCD IC Parameter Quiescent Power Supply Current Supply Current per Input HIGH Dynamic Power Supply Current per Output (2) Total Power Supply Current Examples (2,4) Test Conditions (1) VCC = Max., VIN = GND or Vcc VCC = Max., VIN = 3.4V, fI = 0MHz VCC = Max., VIN = GND or Vcc Outputs Enabled, 50% duty cycle VCC = Max., OEA = OEB = GND 50% duty cycle, fI = 10MHz Five outputs toggling Unused inputs = GND or Vcc VCC = Max., OEA = OEB = GND 50% duty cycle, fI = 2.5MHz All outputs toggling Typ. (3) 0.005 1 0.08 VIN = GND or Vcc VIN = GND or 3.4V 4 4.5 Max. 0.5 2.5 0.18 9.5 10.8 Unit mA mA mA/MHz mA
VIN = GND or Vcc VIN = GND or 3.4V
2.2 3.2
5.5 8
NOTES: 1. For conditions shown as Min. or Max., use the appropriate values specified under DC Electrical Characteristics. 2. Guaranteed by design but not tested. CL = 0pF. 3. Typical values are for reference only. Conditions are VCC = 5.0V, TA = 25C. 4. IC = ICC + (ICC)(DH)(NT) + ICCD (fO)(NO) where: DH = Input Duty Cycle NT = Number of TTL HIGH inputs at DH (one or two) fO = Output Frequency NO = Number of outputs at fO
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QS5805T/AT/BT GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER
INDUSTRIAL TEMPERATURE RANGE
SKEW CHARACTERISTICS OVER OPERATING RANGE
TA = -40C to +85C, VCC = 5.0V 10% CLOAD = 50pF; RLOAD = 500
QS5805T Symbol tSK(01) tSK(02) tSK(P) tSK(T) Parameter (1) Skew between two outputs, same transition, same bank Skew between two outputs, same transition, different banks Pulse Skew; opposite transition skew, same output (tPHL - tPLH) Part-to-part skew (2) Min. -- -- -- -- Max. 0.7 0.9 0.7 1.5 QS5805AT Min. -- -- -- -- Max. 0.7 0.9 0.7 1 QS5805BT Min. -- -- -- -- Max. 0.7 0.9 0.7 1 Unit
ns ns ns ns
NOTES: 1. Skew parameters are guaranteed across temperature range, but not tested. Skew parameters apply to propagation delays only. 2. tSK(T) only applies to devices of the same transition, part type, temperature, power supply voltage, loading, package, and speed grade.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
TA = -40C to +85C, VCC = 5.0V 10% CLOAD = 50pF; RLOAD = 500
QS52805T Symbol tPLH tPHL tPZL tPZH tPLZ tPHZ tR tF Parameter (1) Propagation Delay (2) Output Enable Time Output Disable Time Output Rise Time, 0.8V to 2V (3) Output Fall Time, 2V to 0.8V (3) Min. 1.5 1.5 1.5 -- -- Max. 6.5 8 7 1.5 1.5 QS52805AT Min. 1.5 1.5 1.5 -- -- Max. 5.8 8 7 1.5 1.5 QS5805BT Min. 1.5 1.5 1.5 -- -- Max. 5 7 6 1.5 1.5 Unit
ns ns ns ns ns
NOTES: 1. Minimums guaranteed but not production tested. 2. The propagation delay other range indicated by Min. and Max. specifications results from process and environmental variables. These propagation delays do not imply limit skew. 3. This parameter is guaranteed but not tested.
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QS5805T/AT/BT GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
Parameter Tested
Switch Position
tPLZ, tPZL All Others VCC VIN Pulse Generator 50 DUT 50pF 500 VOUT 500
Closed Open
6.0 V
Pulse generator for all pulses: f 1.0MHz; tF 2.5ns; tR 2.5ns
PROPAGATION DELAY
3V INPUT tPLH tPHL VOH 2.0V 1.5V 0.8V VOL tR tF 1.5V 0V INPUT
PULSE SKEW -- tSK(P)
3V 1.5V 0V tPLH OUTPUT tPHL VOH 1.5V VOL tSK(p) = tPHL - tPLH
OUTPUT
OUTPUT SKEW (SAME BANK) -- tSK(O1)
3V INPUT tPLH1 tPHL1 VOH OUTPUT 1 1.5V VOL tSK(01) OUTPUT 2 tSK(01) VOH 1.5V VOL tPLH2 tPHL2 1.5V 0V INPUT
OUPUT SKEW (DIFFERENT BANKS) -- tSK(O2)
3V 1.5V 0V tPLHA tPHLA VOH OUTPUT A 1.5V VOL tSK(02) OUTPUT B tSK(02) VOH 1.5V VOL tPLHB tPHLB
tSK(01) = tPLH2 - tPLH1 or tPHL2 - tPHL1
tSK(02) = tPLHB - tPLHA or tPHLB - tPHLA
ENABLE AND DISABLE TIMES
ENABLE CONTROL INPUT tPZL OUTPUT NORMALLY LOW SWITCH CLOSED tPZH OUTPUT NORMALLY HIGH SWITCH OPEN 1.5V 0V tPLZ 3V 1.5V 0.3V VOL tPHZ 0.3V VOH PART 2 OUTPUT PART 1 OUTPUT DISABLE 3V 1.5V 0V INPUT
PART-TO-PART SKEW -- tSK(T)
3V 1.5V 0V tPLH1 tPHL1 VOH 1.5V VOL tSK(t) tSK(t) VOH 1.5V VOL tPLH2 tPHL2
tSK(t) = tPLH2 - tPLH1 or tPHL2 - tPHL1
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QS5805T/AT/BT GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER
INDUSTRIAL TEMPERATURE RANGE
ORDERING INFORMATION
QS XXXX Device Type XX Package
Q SO
Quarter Size Small Outline Package (SO20-8) Small Outline IC (SO20-2)
5805T 5805AT 5805BT
Guaranteed Low Skew CMOS Clock Driver/Buffer
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