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+3 V/+5 V/5 V CMOS 4- and 8-Channel Analog Multiplexers ADG658/ADG659 FEATURES 2 V to 6 V dual supply 2 V to 12 V single supply Automotive temperature range -40C to +125C <0.1 nA leakage currents 45 on resistance over full signal range Rail-to-rail switching operation Single 8-to-1 multiplexer ADG658 Differential 4-to-1 multiplexer ADG659 16-lead LFCSP/TSSOP/QSOP packages Typical power consumption <0.1 W TTL/CMOS compatible inputs Package upgrades to 74HC4051/74HC4052 and MAX4051/MAX4052/MAX4581/MAX4582 demultiplexers and have an input range that extends to the supplies. All channels exhibit break-before-make switching action, preventing momentary shorting when switching channels. All digital inputs have 0.8 V to 2.4 V logic thresholds, ensuring TTL/CMOS logic compatibility when using single +5 V or dual 5 V supplies. The ADG658 and ADG659 are available in 16-lead TSSOP/ QSOP packages and 16-lead 4 mm x 4 mm LFCSP packages. PRODUCT HIGHLIGHTS 1. Single- and dual-supply operation. The ADG658 and ADG659 offer high performance and are fully specified and guaranteed with 5 V, +5 V, and +3 V supply rails. 2. Automotive temperature range -40C to +125C. 3. Low power consumption, typically <0.1 W. 4. 16-lead 4 mm x 4 mm LFCSP packages, 16-lead TSSOP package and 16-lead QSOP package. APPLICATIONS Automotive applications Automatic test equipment Data acquisition systems Battery-powered systems Communication systems Audio and video signal routing Relay replacement Sample-and-hold systems Industrial control systems FUNCTIONAL BLOCK DIAGRAM ADG658 S1 S1A DA S4A D S1B DB S8 1 OF 8 DECODER S4B 1 OF 4 DECODER ADG659 GENERAL DESCRIPTION The ADG658 and ADG659 are low voltage, CMOS analog multiplexers comprised of eight single channels and four differential channels, respectively. The ADG658 switches one of eight inputs (S1-S8) to a common output, D, as determined by the 3-bit binary address lines A0, A1, and A2. The ADG659 switches one of four differential inputs to a common differential output, as determined by the 2-bit binary address lines A0 and A1. An EN input on both devices is used to enable or disable the device. When disabled, all channels are switched off. These parts are designed on an enhanced process that provides lower power dissipation yet gives high switching speeds. These parts can operate equally well as either multiplexers or A0 A1 A2 EN A0 A1 EN SWITCHES SHOWN FOR A LOGIC 1 INPUT Figure 1. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 (c) 2004 Analog Devices, Inc. All rights reserved. 03273-0-001 ADG658/ADG659 TABLE OF CONTENTS Specifications: Dual Supply ............................................................. 3 Specifications: Single Supply 5V..................................................... 5 Specifications: Single Supply 2.7 to 3.6 V...................................... 7 Absolute Maximum Ratings............................................................ 9 ESD Caution.................................................................................. 9 Pin Configuration and Function Descriptions........................... 11 Typical Performance Characteristics ........................................... 13 Test Circuits ................................................................................ 16 Outline Dimensions ....................................................................... 19 Ordering Guide .......................................................................... 20 REVISION HISTORY 7/04--Data Sheet Changed from Rev. 0 to Rev. A Updated Format.............................................................. Universal Added QSOP Package Outline .................................................. 20 Changes to Ordering Guide ....................................................... 20 3/03--Rev. 0: Initial Version Rev. A | Page 2 of 20 ADG658/ADG659 SPECIFICATIONS: DUAL SUPPLY VDD = +5 V 10%, VSS = -5 V 10%, GND = 0 V, unless otherwise noted.1 Table 1. B Version -40C to +85C Y Version -40C to+125C VSS to VDD 45 75 1.3 3 10 16 0.005 0.2 0.005 0.2 0.1 0.005 0.2 0.1 90 3.2 17 100 3.5 18 Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match between Channels (RON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) ADG658 ADG659 Channel ON Leakage ID, IS (ON) ADG658 ADG659 DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS2 tTRANS tON (EN) tOFF (EN) Break-Before-Make Time Delay, tBBM Charge Injection Off Isolation Total Harmonic Distortion, THD + N Channel-to-Channel Crosstalk (ADG659) -3 dB Bandwidth ADG658 ADG659 CS (OFF) CD (OFF) ADG658 ADG659 +25C Unit V typ max typ max typ max nA typ nA max nA typ nA max nA max nA typ nA max nA max V min V max A typ A max pF typ ns typ ns max ns typ ns max ns typ ns max ns typ ns min pC typ pC max dB typ % typ dB typ MHz typ MHz typ pF typ pF typ pF typ Test Conditions/Comments VDD = +4.5 V, VSS = -4.5 V VS = 4.5 V, IS = 1 mA; Test Circuit 1 VS = 3.5 V, IS = 1 mA VDD = +5 V, VSS = -5 V; VS = 3 V, IS = 1 mA VDD = +5.5 V, VSS = -5.5 V VD = 4.5 V, VS = m 4.5 V; Test Circuit 2 VD = 4.5 V, VS = m 4.5 V; Test Circuit 3 VD = VS = 4.5 V; Test Circuit 4 5 5 2.5 5 2.5 2.4 0.8 0.005 1 2 80 115 80 115 30 45 50 2 4 -90 0.025 -90 210 400 4 23 12 VIN = VINL or VINH 140 140 50 165 165 55 10 RL = 300 , CL = 35 pF VS = 3 V; Test Circuit 5 RL = 300 , CL = 35 pF VS = 3 V; Test Circuit 7 RL = 300 , CL = 35 pF VS = 3 V; Test Circuit 7 RL = 300 , CL = 35 pF VS1 = VS2 = 3 V; Test Circuit 6 VS = 0 V, RS = 0 , CL = 1 nF; Test Circuit 8 RL = 50 , CL = 5 pF, f = 1 MHz; Test Circuit 9 RL = 600 , 2 V p-p, f = 20 Hz to 20 kHz RL = 50 , CL = 5 pF, f = 1 MHz; Test Circuit 11 RL = 50 , CL = 5 pF; Test Circuit 10 f = 1 MHz f = 1 MHz f = 1 MHz Rev. A | Page 3 of 20 ADG658/ADG659 B Version -40C to +85C Y Version -40C to+125C Parameter CD, CS (ON) ADG658 ADG659 POWER REQUIREMENTS IDD ISS +25C 28 16 0.01 Unit pF typ pF typ A typ A max A typ A max Test Conditions/Comments f = 1 MHz f = 1 MHz VDD = +5.5 V, VSS = -5.5 V Digital Inputs = 0 V or 5.5 V Digital Inputs = 0 V or 5.5 V 1 0.01 1 1 2 Temperature range is as follows: B Version: -40C to +85C. Y Version: -40C to +125C. Guaranteed by design; not subject to production test. Rev. A | Page 4 of 20 ADG658/ADG659 SPECIFICATIONS: SINGLE SUPPLY 5V VDD = 5 V 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.1 Table 2. B Version -40C to +85C Y Version -40C to +125C 0 to VDD 85 150 4.5 8 13 160 9 14 200 10 16 Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match between Channels (RON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) ADG658 ADG659 Channel ON Leakage ID, IS (ON) ADG658 ADG659 DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS2 tTRANS tON (EN) tOFF (EN) Break-Before-Make Time Delay, tBBM Charge Injection Off Isolation Channel-to-Channel Crosstalk (ADG659) -3 dB Bandwidth ADG658 ADG659 CS (OFF) CD (OFF) ADG658 ADG659 +25C Unit V typ max typ max typ Test Conditions/Comments VDD = 4.5 V, VSS = 0 V VS = 0 V to 4.5 V, IS = 1 mA; Test Circuit 1 VS = 3.5 V, IS = 1 mA VDD = 5 V, VSS = 0 V VS = 1.5 V to 4 V, IS = 1 mA VDD = 5.5 V VS = 1 V/4.5 V, VD = 4.5 V/1 V; Test Circuit 2 VS = 1 V/4.5 V, VD = 4.5 V/1 V; Test Circuit 3 VS = VD = 1 V or 4.5 V, Test Circuit 4 0.005 0.2 0.005 0.2 0.1 0.005 0.2 0.1 5 5 2.5 5 2.5 2.4 0.8 nA typ nA max nA typ nA max nA max nA typ nA max nA max V min V max A typ A max pF typ ns typ ns max ns typ ns max ns typ ns max ns typ ns min pC typ pC max dB typ dB typ 0.005 1 2 120 200 120 190 35 50 100 0.5 1 -90 -90 VIN = VINL or VINH 270 245 60 300 280 70 10 RL = 300 , CL = 35 pF VS = 3 V; Test Circuit 5 RL = 300 , CL = 35 pF VS = 3 V; Test Circuit 7 RL = 300 , CL = 35 pF VS = 3 V; Test Circuit 7 RL = 300 , CL = 35 pF VS1 = VS2 = 3 V; Test Circuit 6 VS = 2.5 V, RS = 0 , CL = 1 nF; Test Circuit 8 RL = 50 , CL = 5 pF, f = 1 MHz; Test Circuit 9 RL = 50 , CL = 5 pF; f = 1 MHz; Test Circuit 11 RL = 50 , CL = 5 pF; Test Circuit 10 f = 1 MHz f = 1 MHz f = 1 MHz 180 330 5 29 15 MHz typ MHz typ pF typ pF typ pF typ Rev. A | Page 5 of 20 ADG658/ADG659 CD, CS (ON) ADG658 ADG659 POWER REQUIREMENTS IDD 30 16 0.01 1 pF typ pF typ A typ A max f = 1 MHz f = 1 MHz VDD = 5.5 V Digital Inputs = 0 V or 5.5 V 1 2 Temperature range is as follows: B Version: -40C to +85C. Y Version: -40C to +125C. Guaranteed by design; not subject to production test. Rev. A | Page 6 of 20 ADG658/ADG659 SPECIFICATIONS: SINGLE SUPPLY 2.7 TO 3.6 V VDD = 2.7 to 3.6 V, VSS = 0 V, GND = 0 V, unless otherwise noted.1 Table 3. B Version -40C to +85C Y Version -40C to +125C 0 to VDD 185 300 2 4.5 0.005 0.2 0.005 0.2 0.1 0.005 0.2 0.1 350 6 400 7 Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match between Channels (RON) LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) ADG658 ADG659 Channel ON Leakage ID, IS (ON) ADG658 ADG659 DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS2 tTRANS tON (EN) tOFF (EN) Break-Before-Make Time Delay, tBBM Charge Injection Off Isolation Channel-to-Channel Crosstalk (ADG659) -3 dB Bandwidth ADG658 ADG659 CS (OFF) CD (OFF) ADG658 ADG659 CD, CS (ON) ADG658 ADG659 +25C Unit V typ max typ max nA typ nA max nA typ nA max nA max nA typ nA max nA max V min V max A typ A max pF typ ns typ ns max ns typ ns max ns typ ns max ns typ ns min pC typ pC max dB typ dB typ Test Conditions/Comments VDD = 2.7 V, VSS = 0 V VS = 0 V to 2.7 V, IS = 0.1 mA; Test Circuit 1 VS = 1.5 V, IS = 0.1 mA VDD = 3.3 V VS = 1 V/3 V, VD = 3 V/1 V; Test Circuit 2 VS = 1 V/3 V, VD = 3 V/1 V; Test Circuit 3 VS = VD = 1 V or 3 V, Test Circuit 4 5 5 2.5 5 2.5 2.0 0.5 0.005 1 2 200 370 230 370 50 80 200 1 2 -90 -90 VIN = VINL or VINH 440 440 90 490 490 110 10 RL = 300 , CL = 35 pF VS = 1.5 V; Test Circuit 7 RL = 300 , CL = 35 pF VS = 1.5 V; Test Circuit 7 RL = 300 , CL = 35 pF VS = 1.5 V; Test Circuit 7 RL = 300 , CL = 35 pF VS1 = VS2 = 1.5 V; Test Circuit 6 VS = 1.5 V, RS = 0 , CL = 1 nF; Test Circuit 8 RL = 50 , CL = 5 pF, f = 1 MHz; Test Circuit 9 RL = 50 , CL = 5 pF; f = 1 MHz; Test Circuit 11 RL = 50 , CL = 5 pF; Test Circuit 10 f = 1 MHz f = 1 MHz f = 1 MHz f = 1 MHz f = 1 MHz 160 300 5 29 15 30 16 MHz typ MHz typ pF typ pF typ pF typ pF typ pF typ Rev. A | Page 7 of 20 ADG658/ADG659 B Version -40C to +85C Y Version -40C to +125C Parameter POWER REQUIREMENTS IDD +25C 0.01 Unit A typ A max Test Conditions/Comments VDD = 3.6 V Digital Inputs = 0 V or 3.6 V 1 1 2 Temperature range is as follows: B Version: -40C to +85C. Y Version: -40C to +125C. Guaranteed by design; not subject to production test. Rev. A | Page 8 of 20 ADG658/ADG659 ABSOLUTE MAXIMUM RATINGS TA = 25C, unless otherwise noted. Table 4. Parameters VDD to VSS VDD to GND VSS to GND Analog Inputs1 Digital Inputs1 Ratings 13 V -0.3 V to +13 V +0.3 V to -6.5 V VSS -0.3 V to VDD +0.3 V GND -0.3 V to VDD +0.3 V or 10 mA, whichever occurs first 40 mA 20 mA -40C to +125C -40C to +85C -65C to +150C 150C 104C/W 150.4C/W Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Peak Current, S or D (Pulsed at 1 ms, 10% duty cycle max) Continuous Current, S or D Operating Temperature Range Automotive (Y Version) Industrial (B Version) Storage Temperature Range Junction Temperature JA Thermal Impedance, 16-Lead QSOP JA Thermal Impedance, 16-Lead TSSOP JA Thermal Impedance (4-Layer Board), 16-Lead LFCSP Lead Temperature, Soldering Vapor Phase (60 sec) Infrared (15 sec) ESD 70C/W 215C 220C 5.5 kV 1 Over voltages at AX, EN, S, or D are clamped by internal diodes. Current should be limited to the maximum ratings. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. A | Page 9 of 20 ADG658/ADG659 Table 5. ADG658 Truth Table A2 X1 0 0 0 0 1 1 1 1 A1 X 0 0 1 1 0 0 1 1 A0 X 0 1 0 1 0 1 0 1 EN 1 0 0 0 0 0 0 0 0 Switch Condition NONE 1 2 3 4 5 6 7 8 1 X = Don't Care Table 6. ADG659 Truth Table A1 X1 0 0 1 1 A0 X 0 1 0 1 EN 1 0 0 0 0 On Switch Pair NONE 1 2 3 4 1 X = Don't Care Rev. A | Page 10 of 20 ADG658/ADG659 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS S5 1 S7 2 D3 S8 4 16 15 14 VDD S3 S2 S1B 1 S3B 2 DB 3 S4B 4 16 15 14 VDD S3A S2A TOP VIEW 13 S1 S6 5 (Not to Scale) 12 S4 EN 6 VSS 7 11 10 9 ADG658 TOP VIEW 13 DA S2B 5 (Not to Scale) 12 S1A EN 6 VSS 7 11 10 9 ADG659 A0 A1 A2 S4A 03273-0-002 03273-A-003 A0 A1 GND 8 GND 8 Figure 2. 16-Lead TSSOP/QSOP S3B S1B VDD 12 S2 16 15 14 13 16 15 14 13 D1 S8 2 S6 3 EN 4 ADG658 TOP VIEW (Not to Scale) 11 S1 10 S4 9 A0 DB 1 S4B 2 S2B 3 EN 4 S3A 12 S2A 11 DA 10 S1A 9 S4A 8 S7 S5 VDD S3 ADG659 TOP VIEW (Not to Scale) 5 6 7 8 5 6 7 A2 A1 GND EXPOSED PAD FLOATING Figure 3. 4 mm x 4 mm LFCSP Table 7. Functional Descriptions Parameter VDD VSS IDD ISS GND S D AX EN VD (VS) RON RON RFLAT(ON) IS (OFF) ID (OFF) ID, IS (ON) VINL VINH IINL (IINH) CS (OFF) CD (OFF) Description Most Positive Power Supply Potential. Most Negative Power Supply Potential. Positive Supply Current. Negative Supply Current. Ground (0 V) Reference. Source Terminal. May be an input or output. Drain Terminal. May be an input or output. Logic Control Input. Active Low Digital Input. When high, device is disabled and all switches are OFF. When low, AXlogic inputs determine ON switch. Analog Voltage on Terminals D, S. Ohmic Resistance between D and S. On Resistance Match between Any Two Channels, i.e., RONmax - RONmin. Flatness is defined as the difference between the maximum and minimum value of ON Resistance as measured over the specified analog signal range. Source Leakage Current with the Switch OFF. Drain Leakage Current with the Switch OFF. Channel Leakage Current with the Switch ON. Maximum Input Voltage for Logic 0. Minimum Input Voltage for Logic 1. Input Current of the Digital Input. OFF Switch Source Capacitance. Measured with reference to ground. OFF Switch Drain Capacitance. Measured with reference to ground. Rev. A | Page 11 of 20 GND VSS VSS A1 A0 ADG658/ADG659 Parameter CD, CS (ON) CIN tON tOFF tBBM Charge Injection Off Isolation Crosstalk Bandwidth On Response Insertion Loss Description ON Switch Capacitance. Measured with reference to ground. Digital Input Capacitance. Delay between Applying the Digital Control Input and the Output Switching ON. See Test Circuit 7. Delay between Applying the Digital Control Input and the Output Switching OFF. ON Time. Measured between 80% points of both switches when switching from one address state to another. Measure of the Glitch Impulse Transferred from the Digital Input to the Analog Output during Switching. Measure of Unwanted Signal Coupling through an OFF Switch. Measure of Unwanted Signal Coupled through from One Channel to Another as a Result of Parasitic Capacitance. The Frequency at which the Output is Attenuated by 3 dB. The Frequency Response of the ON Switch. The Loss Due to the ON Resistance of the Switch. Rev. A | Page 12 of 20 ADG658/ADG659 TYPICAL PERFORMANCE CHARACTERISTICS 100 90 80 VDD, VSS = 2.7V ON RESISTANCE () TA = 25C 140 +125C 120 +85C 100 80 +25C 60 40 20 -40C ON RESISTANCE () 70 60 50 40 30 20 10 03273-0-006 VDD, VSS = 3V VDD, VSS = 5.5V VDD, VSS = 4.5V VDD, VSS = 5V 0 -5.5 0 -3.5 -1.5 0.5 VD, VS (V) 2.5 4.5 0 0.5 1.0 1.5 2.0 2.5 3.0 VD, VS (V) 3.5 4.0 4.5 5.0 Figure 4. On Resistance vs. VD (VS) for Dual Supply 250 VDD = 2.7V 200 ON RESISTANCE () Figure 7. On Resistance vs. VD (VS) for Different Temperatures (Single Supply) 300 TA = 25C 250 +85C +125C ON RESISTANCE () 200 150 VDD = 3V VDD = 3.3V 150 +25C 100 -40C 50 100 VDD = 4.5V VDD = 5.5V VDD = 5V 50 03273-0-007 VDD = 12V 0 0 2 4 6 VD, VS (V) VDD = 10V 8 10 12 VDD = 3V VSS = 0V 0 0 0.5 1.0 1.5 VD, VS (V) 2.0 2.5 3.0 03273-0-010 03273-0-011 Figure 5. On Resistance vs. VD (VS) for Single Supply 100 90 80 +125C Figure 8. On Resistance vs. VD (VS) for Different Temperatures (Single Supply) 1.5 1.0 0.5 VDD = 5V VSS = -5V VD = 4V VS = 4V IS (OFF) ON RESISTANCE () 70 60 50 40 +85C CURRENT (nA) +25C 0 -0.5 -1.0 -1.5 ID (OFF) -40C 30 20 10 0 -5 -4 -3 -2 0 -1 1 VD, VS (V) 2 3 4 5 VDD = +5V VSS = -5V IS, ID (ON) -2.0 03273-0-008 -2.5 0 20 40 60 80 TEMPERATURE (C) 100 120 Figure 6. On Resistance vs. VD (VS) for Different Temperatures (Dual Supply) Figure 9. Leakage Current vs. Temperature (Dual Supply) Rev. A | Page 13 of 20 03273-0-009 VDD = 5V VSS = 0V ADG658/ADG659 1.5 1.0 0.5 CURRENT (nA) 350 VDD = +5V VSS = 0V VD = 4V VS = 1V VSS = 0V IS (OFF) 300 250 VDD = 3V 0 TIME (ns) ID (OFF) -0.5 -1.0 -1.5 -2.0 -2.5 0 20 40 60 80 TEMPERATURE (C) 100 120 VDD = +3V VSS = 0V VD = 2.4V VS = 1V IS, ID (ON) 200 150 100 50 VDD = 5V tON VDD = 3V 03273-0-012 tOFF 0 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (C) Figure 10. Leakage Current vs. Temperature (Single Supply) 14 TA = 25C 12 10 8 6 dB 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 Figure 13. tON/tOFF Times vs. Temperature (Single Supply) QINJ (PC) 4 2 0 -2 -4 -5 VDD = +5V VSS = 0V 03273-0-013 VDD = +5V VSS = -5V -13 -14 -15 VDD = +5V VSS = -5V TA = 25C 100k 1M 10M FREQUENCY (Hz) 100M 03273-0-016 03273-0-017 -4 -3 -2 -1 0 VS (V) 1 2 3 4 5 Figure 11. Charge Injection vs. Source Voltage 140 120 100 TIME (ns) 80 Figure 14. ON Response vs. Frequency (ADG658) 0 -2 -4 -6 VDD = +5V VSS = -5V tON -8 -10 dB -12 -14 60 tOFF 40 20 0 -40 03273-0-014 -16 -18 -20 -22 -24 100k 1M 10M FREQUENCY (Hz) 100M VDD = +5V VSS = -5V TA = 25C -20 0 20 40 60 TEMPERATURE (C) 80 100 120 Figure 12. tON/tOFF Times vs. Temperature (Dual Supply) Figure 15. ON Response vs. Frequency (ADG659) Rev. A | Page 14 of 20 03273-0-015 VDD = 5V ADG658/ADG659 0 VDD = +5V VSS = -5V TA = 25C 10000 VSS = 0V -20 1000 VDD = 12V 100 IDD (A) VDD = 5V -40 dB -60 10 -80 1 VDD = 3V -100 0.1 -120 100k 1M 10M FREQUENCY (Hz) 100M 03273-0-018 0.01 0 2 4 6 V(EN) (V) 8 10 12 Figure 16. OFF Isolation vs. Frequency Figure 19. VDD Current vs. Logic Level 0 -10 -20 -30 -40 -50 dB 3.0 VDD = -5V VSS = +5V TA = 25C LOGIC THRESHOLD VOLTAGE (V) 2.5 2.0 -60 -70 -80 -90 1.5 1.0 -100 -110 -120 03273-0-019 0.5 -130 100k 1M 10M FREQUENCY (Hz) 100M 0 0 2 4 6 VDD (V) 8 10 12 Figure 17. Crosstalk vs. Frequency Figure 20. Logic Threshold Voltage vs. Supply Voltage 100 600 IN AND OUT VDD = +5V VSS = -5V TA = 25C 10 THD + N (%) 1 0.1 0.01 20 50 100 200 500 1k 2k 5k 10k 20k FREQUENCY (Hz) Figure 18. THD + Noise 03273-0-020 Rev. A | Page 15 of 20 03273-0-022 03273-0-021 ADG658/ADG659 TEST CIRCUITS IDS VDD VSS VDD VSS ID (OFF) A VO 03273-0-025 V1 S1 S2 D S VS D VS 03273-0-023 S8 EN GND LOGIC 1 RON = V1/I DS Figure 23. Test Circuit 3. ID (OFF) Figure 21. Test Circuit 1. ON Resistance VDD VDD S1 IS (OFF) A VS VDD S1 S2 S8 VD 03273-0-024 VSS VSS ID (ON) A VD 03273-0-026 VDD VSS VSS D EN S8 VS D GND EN GND LOGIC 1 Figure 24. Test Circuit 4. ID (ON) Figure 22. Test Circuit 2. IS (OFF) VDD VDD A2 VIN 50 A1 A0 VSS VSS S1 S2-S7 VS1 ADDRESS DRIVE (VIN) 3V 50% 0V VS8 VOUT RL 300 CL 35pF VOUT VS8 03273-0-027 50% ADG658* EN GND S8 D VS1 90% 90% * SIMILAR CONNECTION FOR ADG659 tTRANSITION tTRANSITION Figure 25. Test Circuit 5. Switching Time of Multiplexer, tTRANSITION Rev. A | Page 16 of 20 ADG658/ADG659 VDD VDD A2 VIN 50 A1 A0 VSS VSS S1 S2-S7 VS ADDRESS DRIVE (VIN) 3V 0V ADG658* EN GND S8 D RL 300 CL 35pF VOUT VOUT 80% 80% 03273-0-028 * SIMILAR CONNECTION FOR ADG659 tBBM Figure 26. Test Circuit 6. Break-Before-Make Delay, tBBM VDD VSS 3V VSS S1 S2-S8 VS ENABLE DRIVE (VIN) 0V 50% 50% VDD A2 A1 A0 tOFF (EN) VO VOUT RL 300 CL 35pF OUTPUT 0V 03273-0-029 ADG658* EN VIN 50 GND D 0.9VO 0.9VO * SIMILAR CONNECTION FOR ADG659 tON (EN) Figure 27. Test Circuit 7. Enable Delay, tON (EN), tOFF (EN) VDD VSS A2 VDD A1 VSS LOGIC INPUT (VIN) D CL 1nF VOUT 3V A0 ADG658* RS VS VIN S EN GND 0V VOUT QINJ = CL x VOUT VOUT * SIMILAR CONNECTION FOR ADG659 Figure 28. Test Circuit 8. Charge Injection Rev. A | Page 17 of 20 03273-0-030 ADG658/ADG659 VDD 0.1 F VSS 0.1 F NETWORK ANALYZER 50 S D LOGIC 1 EN GND VOUT RL 50 03273-0-031 VDD 0.1F VSS 0.1F VDD A2 A1 A0 VSS VDD A2 A1 S A0 VSS 50 VS D VOUT RL 50 03273-0-032 50 VS EN GND OFF ISOLATION = 20 LOG VOUT VS INSERTION LOSS = 20 LOG VOUT WITH SWITCH VOUT WITHOUT SWITCH Figure 29. Test Circuit 9. Off Isolation Figure 30. Test Circuit 10. Bandwidth VDD 0.1 F VSS 0.1 F A1 A0 NETWORK ANALYZER 50 VS VDD VSS EN NETWORK ANALYZER VOUT ADG659 50 S1A S1B DB DA GND DA DB RL 50 CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG VOUT VS Figure 31. Test Circuit 11. Channel-to-Channel Crosstalk Rev. A | Page 18 of 20 03273-0-033 ADG658/ADG659 OUTLINE DIMENSIONS 5.10 5.00 4.90 16 9 4.50 4.40 4.30 1 8 6.40 BSC PIN 1 1.20 MAX 0.20 0.09 0.65 BSC 0.30 0.19 COPLANARITY 0.10 SEATING PLANE 8 0 0.75 0.60 0.45 0.15 0.05 COMPLIANT TO JEDEC STANDARDS MO-153AB Figure 32. 16-Lead Thin Shrink Small Outline Package [TSSOP] ( RU-16) Dimensions shown in millimeters 4.0 BSC SQ 0.60 MAX 0.60 MAX 13 12 16 1 PIN 1 INDICATOR 2.25 2.10 SQ 1.95 PIN 1 INDICATOR 0.65 BSC TOP VIEW 3.75 BSC SQ 0.75 0.60 0.50 EXPOSED PAD (BOTTOM VIEW) 9 8 5 4 0.25 MIN 1.95 BSC 12 MAX 1.00 0.85 0.80 0.80 MAX 0.65 TYP 0.05 MAX 0.02 NOM 0.35 0.28 0.25 0.20 REF COPLANARITY 0.08 SEATING PLANE COMPLIANT TO JEDEC STANDARDS MO-220-VGGC Figure 33. 16-Lead Lead Frame Chip Scale Package [LFCSP] (CP-16-4) Dimensions shown in millimeters Rev. A | Page 19 of 20 ADG658/ADG659 0.193 BSC 16 9 0.154 BSC 1 8 0.236 BSC PIN 1 0.065 0.049 0.069 0.053 0.010 0.025 0.004 BSC COPLANARITY 0.004 0.012 0.008 SEATING PLANE 0.010 0.006 8 0 0.050 0.016 COMPLIANT TO JEDEC STANDARDS MO-137AB Figure 34. 16-Lead Shrink Small Outline Package [QSOP] (RQ-16) Dimensions shown in millimeters ORDERING GUIDE Model ADG658YRU ADG658YRU-REEL7 ADG658YCP ADG658YCP-REEL7 ADG658YRQ ADG658YRQ-REEL ADG658YRQ-REEL7 ADG659YRU ADG659YRU-REEL7 ADG659YCP ADG659YCP-REEL7 ADG659YCPZ1 ADG659YCPZ-REEL71 ADG659YRQ ADG659YRQ-REEL ADG659YRQ-REEL7 1 Temperature Range -40C to +125C -40C to +125C -40C to +85C -40C to +85C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +125C -40C to +125C -40C to +125C Package Description Thin Shrink Small Outline Package (TSSOP) Thin Shrink Small Outline Package (TSSOP) Lead Frame Chip Scale Package (LFCSP) Lead Frame Chip Scale Package (LFCSP) Shrink Small Outline Package (QSOP) Shrink Small Outline Package (QSOP) Shrink Small Outline Package (QSOP) Thin Shrink Small Outline Package (TSSOP) Thin Shrink Small Outline Package (TSSOP) Lead Frame Chip Scale Package (LFCSP) Lead Frame Chip Scale Package (LFCSP) Lead Frame Chip Scale Package (LFCSP) Lead Frame Chip Scale Package (LFCSP) Shrink Small Outline Package (QSOP) Shrink Small Outline Package (QSOP) Shrink Small Outline Package (QSOP) Package Option RU-16 RU-16 CP-16 CP-16 RQ-16 RQ-16 RQ-16 RU-16 RU-16 CP-16 CP-16 CP-16 CP-16 RQ-16 RQ-16 RQ-16 Z = Pb-free part. (c) 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C03273-0-7/04(A) Rev. A | Page 20 of 20 This datasheet has been download from: www..com Datasheets for electronics components. |
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