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| a FEATURES 1.8 V to 5.5 V Single Supply 2.5 V Dual Supply 3 ON Resistance 0.75 ON Resistance Flatness 100 pA Leakage Currents 14 ns Switching Times Single 8-to-1 Multiplexer ADG758 Differential 4-to-1 Multiplexer ADG759 20-Lead 4 mm 4 mm Chip Scale Package Low Power Consumption TTL-/CMOS-Compatible Inputs For Functionally Equivalent Devices in 16-Lead TSSOP Package, See ADG708/ADG709 APPLICATIONS Data Acquisition Systems Communication Systems Relay Replacement Audio and Video Switching Battery-Powered Systems GENERAL DESCRIPTION 3 , 4-/8-Channel Multiplexers in Chip Scale Package ADG758/ADG759 FUNCTIONAL BLOCK DIAGRAMS ADG758 S1 S1A DA S4A D S1B DB S8 1 OF 8 DECODER S4B 1 OF 4 DECODER ADG759 A0 A1 A2 EN A0 A1 EN PRODUCT HIGHLIGHTS The ADG758 and ADG759 are low voltage, CMOS analog multiplexers comprising eight single channels and four differential channels, respectively. The ADG758 switches one of eight inputs (S1-S8) to a common output, D, as determined by the 3-bit binary address lines A0, A1, and A2. The ADG759 switches one of four differential inputs to a common differential output as determined by the 2-bit binary address lines A0 and A1. An EN input on both devices is used to enable or disable the device. When disabled, all channels are switched OFF. Low power consumption and an operating supply range of 1.8 V to 5.5 V make the ADG758 and ADG759 ideal for battery-powered, portable instruments. All channels exhibit break-before-make switching action preventing momentary shorting when switching channels. These switches are designed on an enhanced submicron process that provides low power dissipation yet gives high switching speed, very low ON resistance and leakage currents. ON resistance is in the region of a few ohms and is closely matched between switches and very flat over the full signal range. These parts can operate equally well as either multiplexers or demultiplexers and have an input signal range that extends to the supplies. The ADG758 and ADG759 are available in 20-lead chip scale packages. 1. Small 20-Lead 4 mm x 4 mm Chip Scale Packages (CSP). 2. Single/Dual Supply Operation. The ADG758 and ADG759 are fully specified and guaranteed with 3 V and 5 V singlesupply and 2.5 V dual-supply rails. 3. Low RON (3 Typical). 4. Low Power Consumption (<0.01 W). 5. Guaranteed Break-Before-Make Switching Action. REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 2002 ADG758/ADG759-SPECIFICATIONS1 (V B Version Parameter ANALOG SWITCH Analog Signal Range ON Resistance (RON) ON Resistance Match Between Channels (RON) ON Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) Channel ON Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS tTRANSITION 2 DD =5V 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.) +25 C -40 C to +85 C 0 V to VDD Unit V typ max typ max typ max nA typ nA max nA typ nA max nA typ nA max V min V max A typ A max pF typ ns typ ns max ns typ ns min ns typ ns max ns typ ns max pC typ dB typ dB typ dB typ dB typ MHz typ pF typ pF typ pF typ pF typ pF typ A typ A max Test Conditions/Comments 3 4.5 5 0.4 0.8 1.2 VS = 0 V to VDD, IDS = 10 mA; Test Circuit 1 VS = 0 V to VDD, IDS = 10 mA VS = 0 V to VDD, IDS = 10 mA VDD = 5.5 V VD = 4.5 V/1 V, VS = 1 V/4.5 V; Test Circuit 2 VD = 4.5 V/1 V, VS = 1 V/4.5 V; Test Circuit 3 VD = VS = 1 V, or 4.5 V, Test Circuit 4 0.75 0.01 0.1 0.01 0.1 0.01 0.1 0.3 0.75 0.75 2.4 0.8 0.005 0.1 2 14 25 8 1 14 25 7 12 3 -60 -80 -60 -80 55 13 85 42 96 48 0.001 1.0 VIN = VINL or VINH Break-Before-Make Time Delay, tD tON (EN) tOFF (EN) Charge Injection Off Isolation Channel-to-Channel Crosstalk -3 dB Bandwidth CS (OFF) CD (OFF) ADG758 ADG759 CD, CS (ON) ADG758 ADG759 POWER REQUIREMENTS IDD RL = 300 , CL = 35 pF; Test Circuit 5 VS1 = 3 V/0 V, VS8 = 0 V/3 V RL = 300 , CL = 35 pF VS = 3 V; Test Circuit 6 RL = 300 , CL = 35 pF VS = 3 V; Test Circuit 7 RL = 300 , CL = 35 pF VS = 3 V; Test Circuit 7 VS = 2.5 V, RS = 0 , CL = 1 nF; Test Circuit 8 RL = 50 , CL = 5 pF, f = 10 MHz RL = 50 , CL = 5 pF, f = 1 MHz; Test Circuit 9 RL = 50 , CL = 5 pF, f = 10 MHz RL = 50 , CL = 5 pF, f = 1 MHz; Test Circuit 10 RL = 50 , CL = 5 pF; Test Circuit 11 f = 1 MHz f = 1 MHz f = 1 MHz f = 1 MHz f = 1 MHz VDD = 5.5 V Digital Inputs = 0 V or 5.5 V NOTES 1 Temperature range is as follows: B Version: -40C to +85C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice. -2- REV. A ADG758/ADG759 SPECIFICATIONS1 (V Parameter ANALOG SWITCH Analog Signal Range ON Resistance (RON) ON Resistance Match Between Channels (RON) LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) Channel ON Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS tTRANSITION 2 DD =3V 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.) B Version -40 C to +85 C 0 V to VDD +25 C Unit V typ max typ max nA typ nA max nA typ nA max nA typ nA max V min V max A typ A max pF typ ns typ ns max ns typ ns min ns typ ns max ns typ ns max pC typ dB typ dB typ dB typ dB typ MHz typ pF typ pF typ pF typ pF typ pF typ A typ A max Test Conditions/Comments 8 11 12 0.4 1.2 VS = 0 V to VDD, IDS = 10 mA; Test Circuit 1 VS = 0 V to VDD, IDS = 10 mA VDD = 3.3 V VS = 3 V/1 V, VD = 1 V/3 V; Test Circuit 2 VS = 3 V/1 V, VD = 1 V/3 V; Test Circuit 3 VS = VD = 1 V or 3 V; Test Circuit 4 0.01 0.1 0.01 0.1 0.01 0.1 0.3 0.75 0.75 2.0 0.8 0.005 0.1 2 18 30 8 1 18 30 8 15 3 -60 -80 -60 -80 55 13 85 42 96 48 0.001 1.0 VIN = VINL or VINH Break-Before-Make Time Delay, tD tON (EN) tOFF (EN) Charge Injection Off Isolation Channel-to-Channel Crosstalk -3 dB Bandwidth CS (OFF) CD (OFF) ADG758 ADG759 CD, CS (ON) ADG758 ADG759 POWER REQUIREMENTS IDD RL = 300 , CL = 35 pF; Test Circuit 5 VS1 = 2 V/0 V, VS2 = 0 V/2 V RL = 300 , CL = 35 pF VS = 2 V; Test Circuit 6 RL = 300 , CL = 35 pF VS = 2 V; Test Circuit 7 RL = 300 , CL = 35 pF VS = 2 V; Test Circuit 7 VS = 1.5 V, RS = 0 , CL = 1 nF; Test Circuit 8 RL = 50 , CL = 5 pF, f = 10 MHz RL = 50 , CL = 5 pF, f = 1 MHz; Test Circuit 9 RL = 50 , CL = 5 pF, f = 10 MHz RL = 50 , CL = 5 pF, f = 1 MHz; Test Circuit 10 RL = 50 , CL = 5 pF; Test Circuit 11 f = 1 MHz f = 1 MHz f = 1 MHz f = 1 MHz f = 1 MHz VDD = 3.3 V Digital Inputs = 0 V or 3.3 V NOTES 1 Temperature ranges are as follows: B Version: -40C to +85C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice. REV. A -3- ADG758/ADG759-SPECIFICATIONS1 DUAL SUPPLY (V Parameter ANALOG SWITCH Analog Signal Range ON Resistance (RON) ON Resistance Match Between Channels (RON) ON Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) Channel ON Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS tTRANSITION 2 DD = +2.5 V 10%, VSS = -2.5 V B Version +25 C 10%, GND = 0 V, unless otherwise noted.) -40 C to +85 C VSS to VDD Unit V typ max typ max typ max nA typ nA max nA typ nA max nA typ nA max V min V max A typ A max pF typ ns typ ns max ns typ ns min ns typ ns max ns typ ns max pC typ dB typ dB typ dB typ dB typ MHz typ pF typ pF typ pF typ pF typ pF typ A typ A max A typ A max Test Conditions/Comments 2.5 4.5 5 0.4 0.8 1.0 VS = VSS to VDD, IDS = 10 mA; Test Circuit 1 VS = VSS to VDD, IDS = 10 mA VS = VSS to VDD, IDS = 10 mA VDD = +2.75 V, VSS = -2.75 V VS = +2.25 V/-1.25 V, VD = -1.25 V/+2.25 V; Test Circuit 2 VS = +2.25 V/-1.25 V, VD = -1.25 V/+2.25 V; Test Circuit 3 VS = VD = +2.25 V/-1.25 V; Test Circuit 4 0.6 0.01 0.1 0.01 0.1 0.01 0.1 0.3 0.75 0.75 1.7 0.7 0.005 2 14 0.1 VIN = VINL or VINH 25 Break-Before-Make Time Delay, tD tON (EN) tOFF (EN) Charge Injection Off Isolation 8 1 14 25 8 3 -60 -80 -60 -80 55 13 85 42 96 48 0.001 1.0 ISS 0.001 1.0 NOTES 1 Temperature range is as follows: B Version: -40C to +85C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice. 15 Channel-to-Channel Crosstalk -3 dB Bandwidth CS (OFF) CD (OFF) ADG758 ADG759 CD, CS (ON) ADG758 ADG759 POWER REQUIREMENTS IDD RL = 300 , CL = 35 pF; Test Circuit 5 VS = 1.5 V/0 V; Test Circuit 5 RL = 300 , CL = 35 pF VS = 1.5 V; Test Circuit 6 RL = 300 , CL = 35 pF VS = 1.5 V; Test Circuit 7 RL = 300 , CL = 35 pF VS = 1.5 V; Test Circuit 7 VS = 0 V, RS = 0 , CL = 1 nF; Test Circuit 8 RL = 50 , CL = 5 pF, f = 10 MHz RL = 50 , CL = 5 pF, f = 1 MHz; Test Circuit 9 RL = 50 , CL = 5 pF, f = 10 MHz RL = 50 , CL = 5 pF, f = 1 MHz; Test Circuit 10 RL = 50 , CL = 5 pF; Test Circuit 11 f = 1 MHz f = 1 MHz f = 1 MHz f = 1 MHz f = 1 MHz VDD = +2.75 V Digital Inputs = 0 V or 2.75 V VSS = -2.75 V Digital Inputs = 0 V or 2.75 V -4- REV. A ADG758/ADG759 ABSOLUTE MAXIMUM RATINGS 1 (TA = 25C, unless otherwise noted.) VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +7 V VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to -3.5 V Analog Inputs2 . . . . . . . . . . . . . . VSS - 0.3 V to VDD +0.3 V or 30 mA, Whichever Occurs First Digital Inputs2 . . . . . . . . . . . . . . . . . . -0.3 V to VDD +0.3 V or 30 mA, Whichever Occurs First Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA (Pulsed at 1 ms, 10% Duty Cycle max) Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA Operating Temperature Range Industrial (B Version) . . . . . . . . . . . . . . . . -40C to +85C Storage Temperature Range . . . . . . . . . . . . -65C to +150C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150C Chip Scale Package, JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 32C/W Lead Temperature, Soldering Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220C NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. 2 Overvoltages at EN, A, S, or D will be clamped by internal diodes. Current should be limited to the maximum ratings given. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADG758/ADG759 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE Table I. ADG758 Truth Table PIN CONFIGURATIONS NC NC A0 A1 A2 A2 X 0 0 0 0 1 1 1 1 A1 X 0 0 1 1 0 0 1 1 A0 X 0 1 0 1 0 1 0 1 EN 0 1 1 1 1 1 1 1 1 Switch Condition NONE 1 2 3 4 5 6 7 8 20 19 18 17 16 EN 1 VSS 2 S1 3 S2 4 S3 5 6 S4 PIN 1 IDENTIFIER 15 GND 14 VDD 13 S5 12 S6 11 S7 ADG758 TOP VIEW (Not to Scale) 7 D 8 NC 9 NC 10 S8 X = Don't Care Table II. ADG759 Truth Table NC = NO CONNECT EXPOSED PAD TIED TO SUBSTRATE, VSS NC NC A1 X 0 0 1 1 X = Don't Care A0 X 0 1 0 1 EN 0 1 1 1 1 ON Switch Pair NONE 1 2 3 4 EN 1 VSS 2 S1A 3 S2A 4 S3A 5 20 19 18 17 16 PIN 1 IDENTIFIER NC A0 A1 15 GND 14 VDD 13 S1B 12 S2B 11 S3B ADG759 TOP VIEW (Not to Scale) 6 S4A 7 DA 8 NC 9 DB 10 S4B NC = NO CONNECT EXPOSED PAD TIED TO SUBSTRATE, VSS ORDERING GUIDE Model ADG758BCP ADG759BCP Temperature Range -40C to +85C -40C to +85C Package Description 20-Lead Chip Scale Package (CSP) 20-Lead Chip Scale Package (CSP) Package Option CP-20 CP-20 REV. A -5- ADG758/ADG759 TERMINOLOGY VDD VSS GND S D IN RON RFLAT(ON) IS (OFF) ID (OFF) ID, IS (ON) VD (VS) CS (OFF) CD (OFF) CD, CS (ON) CIN tTRANSITION tON (EN) tOFF (EN) tOPEN Off Isolation Crosstalk Charge Injection On Response On Loss VINL VINH IINL (IINH) IDD ISS Most Positive Power Supply Potential Most Negative Power Supply in a dual-supply application. In single-supply applications, this should be tied to ground at the device. Ground (0 V) Reference Source Terminal. May be an input or output. Drain Terminal. May be an input or output. Logic Control Input Ohmic Resistance between D and S Flatness is defined as the difference between the maximum and minimum value of ON resistance as measured over the specified analog signal range. Source Leakage Current with the Switch OFF Drain leakage Current with the Switch OFF Channel Leakage current with the Switch ON Analog Voltage on Terminals D, S OFF Switch Source Capacitance. Measured with reference to ground. OFF Switch Drain Capacitance. Measured with reference to ground. ON Switch Capacitance. Measured with reference to ground. Digital Input Capacitance Delay Time measured between the 50% and 90% points of the digital inputs and the switch ON condition when switching from one address state to another. Delay Time between the 50% and 90% points of the EN digital input and the switch ON condition. Delay Time between the 50% and 90% points of the EN digital input and the switch OFF condition. OFF Time measured between the 80% points of both switches when switching from one address state to another. A measure of unwanted signal coupling through an OFF switch. A measure of unwanted signal which is coupled through from one channel to another as a result of parasitic capacitance. A measure of the glitch impulse transferred from the digital input to the analog output during switching. The Frequency Response of the ON Switch. The Loss Due to the ON Resistance of the Switch Maximum Input Voltage for Logic "0" Minimum Input Voltage for Logic "1" Input Current of the Digital Input Positive Supply Current Negative Supply Current -6- REV. A Typical Performance Characteristics- ADG758/ADG759 8 7 6 VDD = 2.7V TA = 25 C VSS = 0V 8 7 6 VDD = 3V VSS = 0V ON RESISTANCE - 5 VDD = 3.3V 4 VDD = 4.5V 3 2 1 0 0 1 2 3 4 VD, VS, DRAIN OR SOURCE VOLTAGE - V 5 VDD = 5.5V ON RESISTANCE - +85 C 5 4 -40 C 3 2 1 0 0 0.5 1.0 1.5 2.0 2.5 VD OR VS - DRAIN OR SOURCE VOLTAGE - V 3.0 +25 C TPC 1. ON Resistance as a Function of VD (VS) for Single Supply TPC 4. ON Resistance as a Function of VD (VS) for Different Temperatures, Single Supply 8 TA = 25 C 7 6 ON RESISTANCE - 8 7 6 ON RESISTANCE - VDD = +2.5V VSS = -2.5V 5 4 3 2 1 0 -3.0 -2.5 -2.0 -1.5 -1.0 -0.5 VDD = +2.75V VSS = -2.75V 0 0.5 1.0 1.5 2.0 2.5 3.0 5 4 +25 C 3 2 1 0 -3.0 -2.5 -2.0 -1.5 -1.0 -0.5 -40 C +85 C VDD = +2.25V VSS = -2.25V 0 0.5 1.0 1.5 2.0 2.5 3.0 VD OR VS - DRAIN OR SOURCE VOLTAGE - V VD OR VS - DRAIN OR SOURCE VOLTAGE - V TPC 2. ON Resistance as a Function of VD (VS) for Dual Supply 8 7 6 VDD = 5V VSS = 0V TPC 5. ON Resistance as a Function of VD (VS) for Different Temperatures, Dual Supply 0.12 VDD = 5V VSS = 0V TA = 25 C ID (ON), VS = VD 0.08 ON RESISTANCE - 5 4 +25 C 3 2 -40 C 1 0 0 1 2 3 4 VD OR VS - DRAIN OR SOURCE VOLTAGE - V 5 +85 C CURRENT - nA 0.04 0.00 -0.04 IS (OFF) -0.08 ID (OFF) -0.12 0 1 2 3 VS, (VD = VDD - VS) - V 4 5 TPC 3. ON Resistance as a Function of VD (VS) for Different Temperatures, Single Supply TPC 6. Leakage Currents as a Function of VD (VS) REV. A -7- ADG758/ADG759 0.12 VDD = 3V VSS = 0V TA = 25 C 0.35 0.30 0.25 VDD = 3V VSS = 0V 0.08 CURRENT - nA CURRENT - nA 0.04 ID (ON), VS = VD 0.20 0.15 0.10 0.05 ID (OFF) 0.00 -0.04 IS (OFF) ID (OFF) -0.08 0.00 IS (OFF) 25 35 45 55 65 TEMPERATURE - C ID (ON) 75 85 -0.12 0 0.5 1.0 1.5 2.0 VS, (VD = VDD - VS) - V 2.5 3.0 -0.05 15 TPC 7. Leakage Currents as a Function of VD (VS) TPC 10. Leakage Currents as a Function of Temperature 0.12 VDD = +2.5V VSS = -2.5V TA = 25 C 10m TA = 25 C 1m VDD = +2.5V VSS = -2.5V 0.08 CURRENT - nA 0.04 ID (ON), VS = VD 100 CURRENT - A 10 VDD = +5V 1 VDD = +3V 100n 0.00 -0.04 IS (OFF) -0.08 ID (OFF) 10n 1n 10 -0.12 -3.0 -2.5 -2.0 -1.5 -1.0 -0.5 0 0.5 1.0 VS, (VD = VDD - VS) - V 1.5 2.0 2.5 3.0 100 1k 10k 100k FREQUENCY - Hz 1M 10M TPC 8. Leakage Currents as a Function of VD (VS) TPC 11. Supply Current vs. Input Switching Frequency 0.35 0.30 0.25 VDD = 5V, VSS = 0V VDD = +2.5V, VSS = -2.5V 0 VDD = 5V TA = 25 C -20 ATTENUATION - dB ID (ON) 75 85 CURRENT - nA -40 0.20 0.15 0.10 0.05 0.00 IS (OFF) -0.05 15 25 35 45 55 65 TEMPERATURE - C ID (OFF) -60 -80 -100 -120 30k 100k 1M FREQUENCY - Hz 10M 100M TPC 9. Leakage Currents as a Function of Temperature TPC 12. OFF Isolation vs. Frequency -8- REV. A ADG758/ADG759 0 VDD = 5V TA = 25 C -20 20 TA = 25 C 10 VDD = 5V VSS = 0V ATTENUATION - dB -40 QINJ - pC 0 VDD = 3V VSS = 0V -60 -10 -80 -20 VDD = +2.5V VSS = -2.5V -100 -30 -120 30k 100k 1M FREQUENCY - Hz 10M 100M -40 -3 -2 -1 0 1 2 VOLTAGE - V 3 4 5 TPC 13. Crosstalk vs. Frequency TPC 15. Charge Injection vs. Source Voltage 0 VDD = 5V TA = 25 C -5 ATTENUATION - dB -10 -15 -20 30k 100k 1M FREQUENCY - Hz 10M 100M TPC 14. ON Response vs. Frequency REV. A -9- ADG758/ADG759 Test Circuits IDS VDD V1 S1 S2 S VS D S8 VS RON = V1/IDS GND EN 0.8V D VDD VSS VSS ID (OFF) A VD Test Circuit 1. ON Resistance Test Circuit 3. ID (OFF) VDD VDD S1 S2 S8 VD GND VSS VSS NC S1 S8 VDD VSS VSS ID (ON) D 2.4V A VDD IS(OFF) A VS D 0.8V NC VD EN GND NC = NO CONNECT EN Test Circuit 2. IS (OFF) Test Circuit 4. ID (ON) VDD VDD A2 VIN 50 A1 A0 VSS VSS S1 S2 THRU S7 S8 D GND RL 300 CL 35pF VS8 VOUT VS1 ADDRESS DRIVE (VIN) 3V 50% 0V 50% ADG758* 2.4V EN VS1 90% VOUT 90% VS8 *SIMILAR CONNECTION FOR ADG759 tTRANSITION tTRANSITION Test Circuit 5. Switching Time of Multiplexer, tTRANSITION VDD VDD A2 VIN 50 A1 A0 VSS VSS S1 S2 THRU S7 S8 D GND RL 300 CL 35pF VOUT VS 3V ADDRESS DRIVE (VIN) 0V ADG758* 2.4V EN VOUT 80% 80% tOPEN *SIMILAR CONNECTION FOR ADG759 Test Circuit 6. Break-Before-Make Delay, tOPEN -10- REV. A ADG758/ADG759 VDD VDD A2 A1 A0 S2 THRU S8 VSS VSS S1 VS 3V ENABLE DRIVE (VIN) 0V 50% 50% tOFF (EN) V0 0.9V0 0.9V0 ADG758* EN VIN 50 GND D RL 300 CL 35pF VOUT OUTPUT 0V tON (EN) *SIMILAR CONNECTION FOR ADG759 Test Circuit 7. Enable Delay, tON (EN), tOFF (EN) VDD A2 VDD A1 A0 RS VS VIN S EN GND VSS VSS 3V LOGIC INPUT (VIN) 0V ADG758* D CL 1nF VOUT VOUT QINJ = CL VOUT VOUT *SIMILAR CONNECTION FOR ADG759 Test Circuit 8. Charge Injection VDD 0.1 F VSS 0.1 F NETWORK ANALYZER 0.1 F VDD VSS 0.1 F NETWORK ANALYZER VDD A2 A1 A0 S VSS VDD A2 A1 S A0 VSS 50 D 50 VS VOUT 2.4V 50 VS D VOUT 2.4V EN GND RL 50 EN GND RL 50 OFF ISOLATION = 20 LOG VOUT VS INSERTION LOSS = 20 LOG VOUT WITH SWITCH VOUT WITHOUT SWITCH Test Circuit 9. OFF Isolation VDD 0.1 F VSS 0.1 F Test Circuit 11. Bandwidth Power-Supply Sequencing A2 VDD A1 A0 NETWORK ANALYZER 50 VS 50 S1 S2 S8 GND VSS EN 2.4V NETWORK ANALYZER RL 50 VOUT ADG758* D When using CMOS devices, care must be taken to ensure correct power-supply sequencing. Incorrect power-supply sequencing can result in the device being subjected to stresses beyond the maximum ratings listed in the data sheet. Digital and analog inputs should always be applied after power supplies and ground. For single-supply operation, VSS should be tied to GND as close to the device as possible. *SIMILAR CONNECTION FOR ADG759 CHANNEL-TO-CHANNEL VOUT CROSSTALK = 20 LOG VS Test Circuit 10. Channel-to-Channel Crosstalk REV. A -11- ADG758/ADG759 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 20-Lead Chip Scale Package (CP-20) 0.024 (0.60) 0.017 (0.42) 0.009 (0.24) 0.024 (0.60) 0.017 (0.42) 16 0.009 (0.24) 15 0.148 (3.75) BSC SQ 0.012 (0.30) 0.009 (0.23) 0.007 (0.18) 0.030 (0.75) 0.024 (0.60) 0.020 (0.50) 11 10 0.157 (4.0) BSC SQ 0.010 (0.25) MIN 20 1 PIN 1 INDICATOR TOP VIEW BOTTOM VIEW 6 5 0.089 (2.25) 0.083 (2.10) SQ 0.077 (1.95) 12 MAX 0.035 (0.90) MAX 0.033 (0.85) NOM SEATING PLANE 0.020 (0.50) BSC 0.028 (0.70) MAX 0.026 (0.65) NOM 0.080 (2.00) REF 0.008 (0.20) REF 0.002 (0.05) 0.0004 (0.01) 0.0 (0.0) Revision History Location Data Sheet changed from REV. 0 to REV. A. Page Edits to General Description section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Update Outline Drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 -12- REV. A PRINTED IN U.S.A. C02371-0-5/02(A) |
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