View APL5551KI-TR_642970.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

APL5551
Dual Channel 500mA/500mA Regulator + Reset IC
Features
* * Low Quiescent Current : 110A (No load) Low Dropout Voltage : VDROP1 = 450mV @ 500mA VDROP2 = 500mV @ 500mA * Fixed Output Voltage : VOUT1 = 3.3V/500mA VOUT2 = 2.8V/500mA * * * * * * * * * Stable with 4.7F Output Capacitor Stable with Aluminum, Tantalum or Ceramic Capacitors Built in Thermal Protection Fast Transient Response Short Setting Time SOP-8, SOP-8-P with Thermal Pad Packages Adjustment-free Reset Detection Voltage : 3.9V typ Easy to Set Delay Time from Voltage Detection to Reset Release Lead Free Available (RoHS Compliant)
General Description
The APL5551 is a dual-channel regulator with reset function (specific voltage monitoring), and internal delay circuit, set to detect 3.9V. Maximum input voltage is 6V, and both output1 and output2 can deliver up to 450mA. The typical dropout voltage of both channel is 500mV at 500mA loading. Design with an internal P-channel MOSFET pass transistor, the APL5551 maintains a low supply current. Other features include, thermal-shutdown protection, current limit protection to ensure specified output current. The APL5551 comes in miniature SOP-8 and SOP-8-P packages.
Pin Configuration
SOP-8 (Top View)
VIN VOUT1 Cd VDET
SOP-8-P( Top View)
VIN VOUT1 Cd VDET
1 2 3 4
8 7 6 5
CONT GND RESET VOUT2
1 2 3 4
8 7 6 5
CONT GND RESET VOUT2
Applications
* Optical Storage System
= Thermal Pad (connected to GND plane for better heat dissipation)
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Oct., 2005 1 www.anpec.com.tw
APL5551
Ordering and Marking Information
APL5551
Lead Free Code Handling Code Temp. Range Package Code Detection Voltage APL5551 K / KA: APL5551 XXXXX Package Code K : SOP-8 Temp. Range I : -40 to 85 C Handling Code TR : Tape & Reel Lead Free Code L : Lead Free Device KA : SOP-8-P
Blank : Original Device
XXXXX - Date Code
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS and compatible with both SnPb and lead-free soldiering operations. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J STD-020C for MSL classification at lead-free peak reflow temperature.
Pin Description
PIN No. 1 2 3 4 5 6 7 8 Name VIN VOUT1 Cd VDET VOUT2 RESET GND CONT I I/O I O O I O O Voltage supply input pin. Regulator output pin. Delay time capacitor pin, RESET pin output delay time can be set by the capacitor connected to the Cd pin. tPLH = 130000C, tPLH : transmission delay time (s), C:capacitor value (F) Input pin of voltage detection. Regulator output pin. Input voltage detection output pin , high = VDETVS GND pin VOUT1 on/off-control pin, VOUT1 will be turn off when CONT pull to low. Description
Absolute Maximum Ratings
Symbol VIN, VOUT CONT VDET RTH,JA Parameter Input Voltage or Out Voltage VOUT1 Shutdown Control Pin RESET Pin Supply Voltage Thermal Resistance - Junction to Ambient SOP-8 SOP-8-P
2
Rating 6.5 6.5 6.5 150 80
Unit V V V C/W
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Oct., 2005
www.anpec.com.tw
APL5551
Absolute Maximum Ratings (Cont.)
Symbol RTH,JC Parameter Thermal Resistance - Junction to Case SOP-8 SOP-8-P Power Dissipation at TA = 55C (Note) SOP-8 SOP-8-P Operating Junction Temperature Control Section Power Transistor TSTG TL Storage Temperature Range Lead Temperature (Soldering, 10 second) Rating 30 5 0.7 1.4 0 to 125 0 to 170 -65 to +150 260 C C Unit C/W
PD TJ
W
C
Note: When mounted on a (Copper foil area 60%, 60x45x1.6tmm) glass exoxy board.
Electrical Characteristics
Unless otherwise noted these specifications apply over full temperature , VIN = 5V, CIN = 1F, COUT1 = 4.7F, COUT2 = 4.7F, CONT = VIN, TA = -40 to 85C . Typical values refer to TA = 25C .
APL5551 Min. Typ. Max. 6 IOUT1 = 0mA, IOUT2 = 0mA CONT = low, IOUT2 = 0mA VCONT = VIN 1.6 -0.3 VDET = 5V VIN = 5V VIN = 5V 500 VOUT+0.5V< VIN<6.0V, IOUT = 10mA VIN = 5V, 0mA < IOUT < IMAX
3
Symbol VIN IQ
Parameter Input Voltage Quiescent Current Shutdown Supply Current Shutdown Input Bias current High Threshold Voltage Low Threshold Voltage VDET Input Current Output Voltage Circuit Current Limit Load Current
Test Conditions
Unit V A A A V A V mA mA
100 70
200 140 0.1 VIN+0.3 0.4
ICONT VCONT ICCQ VOUT1 ILIMIT IOUT
20 3.234 3.3 800 4 25
40 3.366
Regulator1
REGLINE Line Regulation REGLOAD Load Regulation
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Oct., 2005
6 60
mV mV
www.anpec.com.tw
APL5551
Electrical Characteristics (Cont.)
Unless otherwise noted these specifications apply over full temperature , VIN = 5V, CIN = 1F, COUT1 = 4.7F, COUT2 = 4.7F, CONT = VIN, TA = -40 to 85C . Typical values refer to TA = 25C .
Symbol Parameter Dropout Voltage (VOUT (Nominal) = 3.3V Version) Ripple Rejection Over Temperature Shutdown Over Temperature Shutdown Hysteresis
(Note)
Test Conditions
APL5551 Min. Typ. 450 45 155 55 170 15 100 4.7 0.01 1 2.8 800 500 4 25 500 45 55 170 6 60 650 2.856 200 Max. 600
Unit
VDROP PSRR OTS
IOUT = 500mA F
mV dB C C ppm/C F V mA mA mV mV mV dB C C
1kHz, 1Vpp at I OUT = 50mA
Hysteresis
TC COUT Regulator2 VOUT2 ILIMIT IOUT
Output Voltage T = -20 ~ 80C Temperature Coefficient a Output Capacitor ESR Output Voltage Circuit Current Limit Load Current V OUT +0.5V< VIN<6.0V, IOUT = 10mA V IN =5V, 0mA< IOUT < IMAX IOUT = 500mA F1kHz, 1Vpp at I OUT = 50mA
(Note)
V IN = 5V VIN = 5V
2.744
REG LINE Line Regulation REG LOAD Load Regulation VDROP PSRR OTS Dropout Voltage (VOUT (Nominal) = 2.8V Version) Ripple Rejection Over Temperature Shutdown Over Temperature Shutdown Hysteresis
Hysteresis
15 100 4.7 0.01 1 3.9 100 130
4
TC COUT
Output Voltage T = -20 ~ 80C Temperature Coefficient a Output Capacitor ESR
200
ppm/C F V ppm/C
RESET / RESET VS VS/T VS Detection Voltage Vs Temperature Coefficient Hysteresis Voltage VDET = HaL T a = -20~+80C VDET = HaL 3.822 3.978
180
230
mV
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Oct., 2005
www.anpec.com.tw
APL5551
Electrical Characteristics (Cont.)
Unless otherwise noted these specifications apply over full temperature , VIN = 5V, CIN = 1F, COUT1 = 4.7F, COUT2 = 4.7F, CONT = VIN, TA = -40 to 85C . Typical values refer to TA = 25C .
APL5551 Min. Typ. Max.
Symbol RESET / RESET V OL IOH IOL1 IOL2 tPLH tPLH1 tPHL VOPL
Parameter
Test Conditions
Unit
Low-level Output Voltage Output Leakage Current Output Current1 Output Current2
VDET = 3.9V, RL = 4.7k VDET = 5V VDET = 3.9V, VRESET = 0.4V VDET = 3.9V, VRESET = 0.4V T A = -20 ~ +80C VDET = 3.7Va5V, Cd = 0.1 F 10 8
22 0.5 14 14 42 8 13 4 0.95
60 1
mV A mA mA
"H" Transmission Delay Time Cd = 0 F Reset Delay Time "L" Transmission Delay Time Cd = 0 F Threshold Operating Voltage VRESET = 0.4V
90 18 90 1.25
s ms s V
Application Circuit
VIN 1F 4.7k RL VDET RESET Cd APL5551
VOUT1
GND
VOUT2 CONT COUT2 4.7F
COUT1 4.7F
0.1F
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Oct., 2005
5
www.anpec.com.tw
APL5551
Timing Chart
VIN. VDET 5V Vs Vs
RESET 5V
tPLH + tPLH1
0V CONT H
L VOUT1 5V
0V VOUT2 5V
0V
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Oct., 2005
6
www.anpec.com.tw
APL5551
Typical Characteristics
Quiescent Current vs. Input Voltage
160
Quiescent Current vs. Output Current
450 400
IOUT1=IOUT2=0mA
140
VIN = 4V
Quiescent Current (A)
120 100 80 60 40 20 0 0 1 2 3 4 5 6
Quiescent Current (A)
350 300 250 200 150 100 50 0 0 100 200 300 400 500
Input Voltage (V)
Output Current (mA)
Output Voltage vs. Input Voltage
3.5
3
Output Voltage(V)
Output Voltage vs. Input Voltage
IOUT2=0mA
IOUT1=0mA
3
2.5
VOUT1
Output Voltage (V)
2.5 2 1.5 1 0.5 0 0 1 2 3 4 5
2 1.5 1 0.5 0 0 2
VOUT2
4
6
Input Voltage (V)
Input Voltage(V)
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Oct., 2005
7
www.anpec.com.tw
APL5551
Typical Characteristics
Output Voltage vs .Temperature
3.305 3.3 3.295
VOUT1(V) VOUT2(V)
3.29 3.285 3.28 3.275 -30 10 50 90 130 -10 30 70 110 150
Ambient Temperature(C)
2.81 2.805 2.8 2.795 2.79 2.785 2.78 2.775 2.77 2.765 -40 0 20 60 100140 -20 40 80 120160
Ambient Temperature(C)
Output Voltage vs .Temperature
Dropout Voltage vs. Output Current
600
Dropout Voltage (mV)
PSRR vs. Frequency
+0 -10 -20
VIN = 5V IOUT1 = IOUT2 = 50mA
500 300 200 100 0 0 100200300400500
Output Current (mA) PSRR (dB)
400
VOUT2
-30 -40 -50 -60 -70 -80 10 100 1k 10k 100k
VOUT1,VOUT2
VOUT1
Frequency (Hz)
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Oct., 2005
8
www.anpec.com.tw
APL5551
Typical Characteristics
Load-Transient Response
Load-Transient Response
VOUT1(200mV/div)
VOUT2(200mV/div)
IL1=1mA ~ 500mA COUT1=4.7F(Aluminum) Tr=1s
IL2=1mA ~ 500mA COUT2=4.7F(Aluminum) Tr=1s
Time (0.1m/div)
Time(0.1m/div)
Line-Transient Response
Shutdown Response
RLOAD = 100
VIN = 4.5 ~ 5.5V
VOUT1 (2v/div)
VOUT1(20mV/div) IOUT1=10mA COUT1=4.7uF
VOUT2
VOUT2(20mV/div) IOUT2=10mA COUT2=4.7uF
CONT(2v/div)
Time(20s/div)
Time (1ms/div)
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Oct., 2005
9
www.anpec.com.tw
APL5551
Typical Characteristics
2 1.8 1.6 1.4 1.2 SOP-8-P 1 0.8 SOP-8 0.6 0.4 0.2 0 25 50 75 100 150 125 175
Ambient Temperature (C)
Power Dissipation vs. Ambient Temperature
Power On
VIN(2V/diV) Cd=0.1uF
Power Dissipation(W)
VOUT1(2V/div)
VOUT2(2V/div)
RESET(5V/div)
Time(5ms/div)
Power Off
VIN(2V/diV) Cd=0.1uF
VOUT1(2V/div)
VOUT2(2V/div)
RESET(5V/div)
Time(0.2s/div)
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Oct., 2005
10
www.anpec.com.tw
APL5551
Application Information
Capacitor Selection and Regulator Stability The APL5551 uses at least a 1F capacitor on the input. This capacitor can use Aluminum, Tantalum or Ceramic capacitors. Input capacitor with large value and low ESR provides better PSRR and line-transient response. The output capacitor also can use Aluminum, Tantalum or Ceramic capacitors, and it' minimum s values is recommended 4.7F, ESR muse be above 0.01. Large output capacitor values can reduce noise and improve load-transient response, stability, and PSRR. Note that some ceramic dielectrics exhibit large capacitance and ESR variation with Temperature. If use this capacitor, it may be necessary to use 4.7F or more to ensure stability at temperature below -10C. Load-Transient Considerations The APL5551 load-transient response graphs in Typical Characteristics show the transient response. A step change in the load current from 1mA to 500mA at 1 second will cause less than 200mV transient spike. Large output capacitor' value and low ESR can reduce s transient spike. Shutdown/Enable The APL5551 has an active high enable function. Force CONT high (>1.6V) enables the VOUT1, CONT low (<0.4V) disables the VOUT1 and VOUT2 can not be affected by CONT. In shutdown mode, the quiescent current can reduce to 70A. The CONT pin cannot be floating, a floating CONT pin may cause an indeterminate state on the output. If it is no use, connect to VIN for normal operation. RESET The RESET pin is asserted whenever VDET falls below the reset threshold voltage or if CONT is forced low at some special IC (refer timing chart and pin description). The reset function ensures the microprocessor is properly reset and powers up into a known condition after a power failure. RESET will remain valid with VIN as low as 0.95V. The RESET output is a simple opendrain N channel MOSET structure. A pull-up resistor must be used to pull this output up to some voltage. For most application, this voltage will be the same power supply that supplies VIN to the APL5551. The APL5551is relatively immune to negative-going glitches below the reset threshold. Typically reset delay time is 13ms while using 0.1F at Cd pin. If more transient immunity is needed, a Cd capacitor can be placed as larger as possible. Input-Output (Dropout) Voltage The minimun input-output voltage differential (dropout) determines the lowest usable supply voltage. The dropout voltage is a function of drain-to-source on resistance multiplied by the load current. Current Limit APL5551 includes two separate current-limit circuitry for each linear regulator. The current limit protection, which sense the current flows the P-channel MOSFET, and controls the output voltage. The point where limiting occurs is IOUT=800mA. The output can be shorted to ground for an indefinite amount of time without damaging to the part. Thermal Protection Thermal protection limits total power dissipation in the APL5551. When the junction temperature exceeds TJ=+170C, the thermal sensor generate a logic signal to turn off the pass transistor and let IC to cool. When the IC' junction temperature cools by 15C, the s thermal sensor will turn the pass transistor on again, resulting in a pulsed output during continuous thermal protection. Thermal protection is designed to protect the IC in the event of fault conditions. For continual
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Oct., 2005
11
www.anpec.com.tw
APL5551
Application Information
Thermal Protection (Cont.) operation, do not exceed the junction temperature rating of TJ=+150C. Operating Region and Power Dissipation The thermal resistance of the case and circuit board, ambient and junction air temperature, and the rate of air flow all control the APL5551 maximum power dissipation. The power dissipation across the device is P = IOUT (VIN-VOUT). The maximum power dissipation is: PMAX = (TJ-TA) / (JB +BA )
118 mil
applications. The thermal pad is soldered to the top ground pad and is connected to the internal or bottom ground plane by several vias. The printed circuit board (PCB) forms a heat sink and dissipates most of the heat into ambient air. The vias are recommended to have proper size to retain solder, helping heat conduction.
102 mil
SOP-8-P
where TJ-TA is the temperature difference between the junction and ambient air. JB is the thermal resistance of the package, BA is the thermal resistance through the printed circuit board, copper traces, and other materials to the surrounding air. The GND pin provides an electrical connection to ground and channeling heat away. Connect the GND pin to ground using a large pad or ground plane as a heat sink, it can improve maximize thermal dissipation. For example: The SOP8 package has maximum power dissipation 0.7W at TA= 55C and 1.4W at SOP-8-P (see Power dissipation vs Ambient Temperature). VIN = 5V, IOUT = 250mA, VOUT1 = 3.3V, VOUT2 = 2.8V, PD = [(5-3.3)V+(5-2.8)V] x 250mA = 0.975W the PD = 0.975W According the power dissipation issue, we should adapt the SOP-8-P package. It could reduce the thermal resistance to maintain the IC longer life. See figure 1. The SOP-8-P utilizes a bottom thermal pad to minimize the thermal resistance of the package, making the package suitable for high current
Thermal pad Top ground pad
Die
Ambient Air
Vias
Internal ground plane
Printed circuit board
Figure 1
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Oct., 2005
12
www.anpec.com.tw
APL5551
Packaging Information
SOP-8 pin ( Reference JEDEC Registration MS-012)
E
H
e1 D
e2
A1
A
1 L
0.004max.
Dim A A1 D E H L e1 e2 1
Millimeters Min. 1.35 0.10 4.80 3.80 5.80 0.40 0.33 1.27BSC 0 8 0 Max. 1.75 0.25 5.00 4.00 6.20 1.27 0.51 Min. 0.053 0.004 0.189 0.150 0.228 0.016 0.013
0.015X45
Inches Max. 0.069 0.010 0.197 0.157 0.244 0.050 0.020 0.50BSC 8
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Oct., 2005
13
www.anpec.com.tw
APL5551
Packaging Information
SOP-8-P pin ( Reference JEDEC Registration MS-012)
E1 D1
E
H
e1 D
e2
A1
A
1 L
0.004max.
Dim A A1 D D1 E E1 H L e1 e2 1
Millimeters Min. 1.35 0 4.80 3.00REF 3.80 2.60REF 5.80 0.40 0.33 1.27BSC 8 6.20 1.27 0.51 0.228 0.016 0.013 4.00 0.150 Max. 1.75 0.15 5.00 Min. 0.053 0 0.189
0.015X45
Inches Max. 0.069 0.006 0.197 0.118REF 0.157 0.102REF 0.244 0.050 0.020 0.50BSC 8
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Oct., 2005
14
www.anpec.com.tw
APL5551
Physical Specifications
Terminal Material Lead Solderability Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb), 100%Sn Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3.
Reflow Condition
TP
(IR/Convection or VPR Reflow)
tp Critical Zone T L to T P
Ramp-up
Temperature
TL Tsmax
tL
Tsmin Ramp-down ts Preheat
25
t 25 C to Peak
Time
Classification Reflow Profiles
Profile Feature Average ramp-up rate (TL to TP) Preheat - Temperature Min (Tsmin) - Temperature Max (Tsmax) - Time (min to max) (ts) Time maintained above: - Temperature (TL) - Time (tL) Peak/Classificatioon Temperature (Tp) Time within 5C of actual Peak Temperature (tp) Ramp-down Rate Sn-Pb Eutectic Assembly 3C/second max. 100C 150C 60-120 seconds 183C 60-150 seconds See table 1 10-30 seconds Pb-Free Assembly 3C/second max. 150C 200C 60-180 seconds 217C 60-150 seconds See table 2 20-40 seconds
6C/second max. 6C/second max. 6 minutes max. 8 minutes max. Time 25C to Peak Temperature Notes: All temperatures refer to topside of the package .Measured on the body surface.
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Oct., 2005 15 www.anpec.com.tw
APL5551
Classification Reflow Profiles (Cont.)
Table 1. SnPb Entectic Process - Package Peak Reflow Temperature s 3 3 Package Thickness Volume mm Volume mm <350 350 <2.5 mm 240 +0/-5C 225 +0/-5C 2.5 mm 225 +0/-5C 225 +0/-5C
Table 2. Pb-free Process - Package Classification Reflow Temperatures 3 3 3 Package Thickness Volume mm Volume mm Volume mm <350 350-2000 >2000 <1.6 mm 260 +0C* 260 +0C* 260 +0C* 1.6 mm - 2.5 mm 260 +0C* 250 +0C* 245 +0C* 2.5 mm 250 +0C* 245 +0C* 245 +0C* *Tolerance: The device manufacturer/supplier shall assure process compatibility up to and including the stated classification temperature (this means Peak reflow temperature +0C. For example 260C+0C) at the rated MSL level.
Reliability Test Program
Test item SOLDERABILITY HOLT PCT TST ESD Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B,A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD 78 Description 245C, 5 SEC 1000 Hrs Bias @125C 168 Hrs, 100%RH, 121C -65C~150C, 200 Cycles VHBM > 2KV, VMM > 200V 10ms, 1tr > 100mA
Carrier Tape
t P P1 D
Po E
F W
Bo
Ao
Ko D1
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Oct., 2005
16
www.anpec.com.tw
APL5551
Carrier Tape (Cont.)
T2
J C A B
T1
Application
A 330 1
B 62 +1.5 D
C
J
T1 12.4 0.2 P1 2.0 0.1
T2 2 0.2 Ao 6.4 0.1
W 12 0. 3 Bo 5.2 0. 1
P 8 0.1 Ko
E 1.750.1 t
12.75+ 0.15 2 0.5 D1 Po
SOP- 8/-P
F 5.5 1
1.55 +0.1 1.55+ 0.25 4.0 0.1
2.1 0.1 0.30.013
(mm)
Cover Tape Dimensions
Application SOP- 8/-P Carrier Width 12 Cover Tape Width 9.3 Devices Per Reel 2500
Customer Service
Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 7F, No. 137, Lane 235, Pac Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, R. O. C. Tel : 886-2-89191368 Fax : 886-2-89191369
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Oct., 2005
17
www.anpec.com.tw

▲Up To Search▲

Price & Availability of APL5551KI-TR

	To Download APL5551KI-TR Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .