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| (R) EL1511 Data Sheet April 10, 2007 FN7016.2 Medium Power Differential Line Driver The EL1511 is a dual operational amplifier designed for customer premise line driving in DMT ADSL solutions. This device features a high drive capability of 360mA while consuming only 7.5mA of supply current per amplifier and operating from a single 5V to 15V supply. This driver achieves a typical distortion of less than -85dBc, at 150kHz into a 25 load. The EL1511 is available in the thermallyenhanced 16 Ld SOIC (0.150") and a 16 Ld QFN (4x4mm) packages. The EL1511 is specified for operation over the full -40C to +85C temperature range. Electrical characteristics are given for typical 15V supply operation. The EL1511 has two control pins, C0 and C1, which allow the selection of full IS power, 3/4-IS, 1/2-IS, and power-down modes. The EL1511 is ideal for ADSL, SDSL, and HDSL2 line driving applications for single power supply, high voltage swing, and low power. The EL1511 maintains excellent distortion and load driving capabilities even in the lowest power settings. Features * Drives up to 360mA from a +15V supply * 24VP-P differential output drive into 25 and 26VP-P differential output drive into 100 * -85dBc typical driver output distortion at full output at 150kHz * Low quiescent current of 3.5mA per amplifier at 1/2-IS current mode * Disable down to 1.5mA * Pb-free plus anneal available (RoHS compliant) Applications * ADSL CSA line driving * ADSL full rate CPE line driving * G.SHDSL, HDSL2 line driver * Video distribution amplifier * Video twisted-pair line driver Pinouts EL1511 [16 LD SO (0.150")] TOP VIEW 16 OUTA NC 1 VOUTA 2 VIN-A 3 GND* 4 GND* 5 VIN+A 6 GND 7 VS- 8 POWER CONTROL LOGIC + + 16 VS+ 15 VOUTB NC 1 14 VIN-B INA- 2 13 GND* INA+ 3 12 GND* GND 4 NC 5 11 VIN+B 10 C1 9 C0 EL1511 (16 LD QFN) TOP VIEW 13 OUTB 12 NC 11 INB10 INB+ 9 C1 C0 8 14 VS+ VS- 7 15 NC NC 6 AMP A + AMP B + POWER CONTROL LOGIC NOTE: * These GND pins are heat spreaders 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2003, 2005, 2007. All Rights Reserved All other trademarks mentioned are the property of their respective owners. EL1511 Ordering Information PART NUMBER EL1511CS EL1511CS-T7 EL1511CS-T13 EL1511CSZ (See Note) EL1511CSZ-T7 (See Note) EL1511CSZ-T13 (See Note) EL1511CL EL1511CL-T7 EL1511CL-T13 EL1511CLZ (See Note) EL1511CLZ-T7 (See Note) EL1511CLZ-T13 (See Note) PART MARKING EL1511CS EL1511CS EL1511CS EL1511CSZ EL1511CSZ EL1511CSZ 1511CL 1511CL 1511CL 1511CLZ 1511CLZ 1511CLZ TAPE & REEL 7" 13" 7" 13" 7" 13" 7" 13" PACKAGE 16 Ld SO (0.150") 16 Ld SO (0.150") 16 Ld SO (0.150") 16 Ld SO (0.150") (Pb-Free) 16 Ld SO (0.150") (Pb-Free) 16 Ld SO (0.150") (Pb-Free) 16 Ld QFN 16 Ld QFN 16 Ld QFN 16 Ld QFN (Pb-Free) 16 Ld QFN (Pb-Free) 16 Ld QFN (Pb-Free) PKG. DWG. # MDP0027 MDP0027 MDP0027 MDP0027 MDP0027 MDP0027 MDP0046 MDP0046 MDP0046 MDP0046 MDP0046 MDP0046 NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 2 FN7016.2 April 10, 2007 EL1511 Absolute Maximum Ratings (TA = +25C) VS+ to VS- Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . 16.5V VS+ Voltage to Ground . . . . . . . . . . . . . . . . . . . . . . -0.3V to +16.5V VS- Voltage to Ground . . . . . . . . . . . . . . . . . . . . . . . . -16.5V to 0.3V Input C0/C1 to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7V VIN+ Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VS- to VS+ Current into any Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8mA Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . 75mA Operating Temperature Range . . . . . . . . . . . . . . . . .-40C to +85C Storage Temperature Range . . . . . . . . . . . . . . . . . .-60C to +150C Operating Junction Temperature . . . . . . . . . . . . . . .-40C to +150C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Electrical Specifications PARAMETER AC PERFORMANCE BW HD dG d SR VS = 7.5V, RF = 1.5k, RL = 100 to mid supply, TA = +25C unless otherwise specified. DESCRIPTION CONDITIONS MIN TYP MAX UNIT -3dB Bandwidth Total Harmonic Distortion Differential Gain Differential Phase Slewrate AV = +4 f = 150kHz, VO = 16VP-P, RL = 25 AV = +2, RL = 37.5 AV = +2, RL = 37.5 VOUT from -3V to +3V 70 -85 0.15 0.1 500 MHz dBc % V/s DC PERFORMANCE VOS VOS ROL Offset Voltage VOS Mismatch Transimpedance VOUT from -4.5V to +4.5V -20 -10 0.7 1.4 20 10 2.5 mV mV M INPUT CHARACTERISTICS IB+ IBIBeN iN VIH VIL IIH1 IIH0 IIL Non-Inverting Input Bias Current Inverting Input Bias Current IB- Mismatch Input Noise Voltage -Input Noise Current Input High Voltage Input Low Voltage Input High Current for C1 Input High Current for C0 Input Low Current for C1or C0 C0 and C1 inputs C0 and C1 inputs C1 = 5V C0 = 5V C1 = 0V, C0 = 0V 0.2 0.1 -1 2.3 1.5 8 4 1 -5 -30 -30 2.8 19 5 30 30 A A A nV/ Hz pA/ Hz V V A A A OUTPUT CHARACTERISTICS VOUT Loaded Output Swing (single ended) VS = 7.5, RL = 100 to GND VS = 7.5, RL = 25 to GND IOUT SUPPLY VS IS+ (Full Power) IS- (Full Power) IS+ (3/4 Power) Supply Voltage Positive Supply Current per Amplifier Negative Supply Current per Amplifier Positive Supply Current per Amplifier Single supply All outputs at 0V, C0 = C1 = 0V All outputs at 0V, C0 = C1 = 0V All outputs at 0V, C0 = 5V, C1 = 0V 5 7 -6.4 5.3 15 9.25 -8.75 7.25 V mA mA mA Output Current RL = 0 6.3 5.7 6.5 6.0 450 V V mA 3 FN7016.2 April 10, 2007 EL1511 Electrical Specifications PARAMETER IS- (3/4 Power) IS+ (1/2 Power) IS- (1/2 Power) VS = 7.5V, RF = 1.5k, RL = 100 to mid supply, TA = +25C unless otherwise specified. (Continued) DESCRIPTION Negative Supply Current per Amplifier Positive Supply Current per Amplifier Negative Supply Current per Amplifier CONDITIONS All outputs at 0V, C0 = 5V, C1 = 0V All outputs at 0V, C0 = 0V, C1 = 5V All outputs at 0V, C0 = 0V, C1 = 5V All outputs at 0V, C0 = C1 = 5V All outputs at 0V, C0 = C1 = 5V All outputs at 0V MIN TYP -4.7 3.3 -2.7 0.6 0 0.6 MAX -6.75 5.75 -5.2 1.025 -0.525 1 UNIT mA mA mA mA mA mA IS+ (Power Down) Positive Supply Current per Amplifier IS- (Power Down) IGND Negative Supply Current per Amplifier GND Supply Current per Amplifier Pin Descriptions EL1511CS 16 Ld SO (0.150") 1 2, 15 EL1511CL 16 Ld QFN 1, 5, 6, 12, 15 13, 16 PIN NAME NC OUT PIN FUNCTION Not Connected Output VS+ EQUIVALENT CIRCUIT OUT VSCIRCUIT 1 3, 14 2, 11 VIN- Inverting Input VS+ IN+ IN- VSCIRCUIT 2 4, 5, 7, 12, 13 6, 11 8 9 4 3, 10 7 8 GND VIN+ VSC0 Ground Pins Non-inverting Input Negative Supply Power Control IBIAS 1.8V + - Q1 Q3 500 C0 VS+ Reference Circuit 2 Q2 CIRCUIT 3 10 9 C1 Power Control Reference Circuit 3 4 FN7016.2 April 10, 2007 EL1511 Typical Performance Curves 28 24 GAIN (dB) 20 16 12 8 100K RF=2k VS=6V AV=10 RL=100 RF=1.5k RF=1k GAIN (dB) 14 10 6 2 100K RF=2k 22 18 VS=6V AV=5 RL=100 RF=1.5k RF=1k 1M 10M 100M 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 1. DIFFERENTIAL FREQUENCY RESPONSE (FULL POWER MODE) FIGURE 2. DIFFERENTIAL FREQUENCY RESPONSE (FULL POWER MODE) 28 24 GAIN (dB) 20 16 12 8 100K RF=2k VS=6V AV=10 RL=100 RF=1.5k 22 18 GAIN (dB) 14 RF=2k 10 6 2 100K VS=6V AV=5 RL=100 RF=1k RF=1.5k RF=1k 1M 10M 100M 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 3. DIFFERENTIAL FREQUENCY RESPONSE (3/4 POWER MODE) FIGURE 4. DIFFERENTIAL FREQUENCY RESPONSE (3/4 POWER MODE) 28 24 GAIN (dB) 20 RF=2k 16 12 8 100K VS=6V AV=10 RL=100 RF=1.5k 22 18 RF=1k GAIN (dB) 14 RF=2k 10 6 2 100K VS=6V AV=5 RL=100 RF=1k RF=1.5k 1M 10M 100M 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 5. DIFFERENTIAL FREQUENCY RESPONSE (1/2 POWER MODE) FIGURE 6. DIFFERENTIAL FREQUENCY RESPONSE (1/2 POWER MODE) 5 FN7016.2 April 10, 2007 EL1511 Typical Performance Curves (Continued) 28 24 GAIN (dB) 20 16 12 8 100K RF=1.5k RF=2k 6 2 100K VS=7.5V AV=10 RL=100 RF=1k GAIN (dB) 14 10 22 18 VS=7.5V AV=5 RL=100 RF=1.5k RF=1k RF=2k 1M 10M 100M 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 7. DIFFERENTIAL FREQUENCY RESPONSE (FULL POWER MODE) FIGURE 8. DIFFERENTIAL FREQUENCY RESPONSE (FULL POWER MODE) 28 24 GAIN (dB) 20 16 12 8 100K RF=1.5k RF=2k VS=7.5V AV=10 RL=100 22 18 GAIN (dB) 14 10 6 2 100K RF=2k VS=7.5V AV=5 RL=100 RF=1.5k RF=1k RF=1k 1M 10M 100M 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 9. DIFFERENTIAL FREQUENCY RESPONSE (3/4 POWER MODE) FIGURE 10. DIFFERENTIAL FREQUENCY RESPONSE (3/4 POWER MODE) 28 24 GAIN (dB) 20 RF=2k 16 12 8 100K VS=7.5V AV=10 RL=100 RF=1.5k GAIN (dB) RF=1k 22 18 14 RF=2k 10 6 2 100K VS=7.5V AV=5 RL=100 RF=1k RF=1.5k 1M 10M 100M 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 11. DIFFERENTIAL FREQUENCY RESPONSE (1/2 POWER MODE) FIGURE 12. DIFFERENTIAL FREQUENCY RESPONSE (1/2 POWER MODE) 6 FN7016.2 April 10, 2007 EL1511 Typical Performance Curves (Continued) 30 26 22 18 GAIN (dB) 14 10 6 2 -2 -6 VS=6V RF=1.5k AV=5 RL=100 1M 10M 100M CL=0pF CL=22pF CL=10pF GAIN (dB) 14 CL=0pF 6 -2 VS=7.5V RF=1.5k AV=5 RL=100 1M 10M 100M 22 CL=10pF CL=22pF 30 -10 100K -10 100k FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 13. DIFFERENTIAL FREQUENCY RESPONSE vs CL (FULL POWER MODE) FIGURE 14. DIFFERENTIAL FREQUENCY RESPONSE vs CL (FULL POWER MODE) 30 26 22 18 GAIN (dB) 14 10 6 2 -2 -6 VS=6V RF=1.5k AV=5 RL=100 1M 10M 100M CL=0pF CL=10pF GAIN (dB) CL=22pF 30 22 14 CL=0pF 6 -2 VS=7.5V RF=1.5k AV=5 RL=100 1M 10M 100M CL=22pF CL=10pF -10 100K -10 100K FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 15. DIFFERENTIAL FREQUENCY RESPONSE vs CL (3/4 POWER MODE) FIGURE 16. DIFFERENTIAL FREQUENCY RESPONSE vs CL (3/4 POWER MODE) 30 26 22 18 GAIN (dB) 14 10 6 2 -2 -6 VS=6V RF=1.5k AV=5 RL=100 1M 10M 100M CL=0pF GAIN (dB) CL=22pF CL=10pF 30 22 14 CL=0pF 6 -2 VS=7.5V RF=1.5k AV=5 RL=100 1M 10M 100M CL=22pF CL=10pF -10 100K -10 100K FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 17. DIFFERENTIAL FREQUENCY RESPONSE vs CL (1/2 POWER MODE) FIGURE 18. DIFFERENTIAL FREQUENCY RESPONSE vs CL (1/2 POWER MODE) 7 FN7016.2 April 10, 2007 EL1511 Typical Performance Curves (Continued) 70 60 BANDWIDTH (MHz) 50 3/4 POWER 40 30 20 2.5 3.5 4.5 5.5 6.5 7.5 1/2 POWER AV=5 RF=1.5k RL=100 FULL POWER -45 -50 -55 THD (dB) -60 -65 -70 -75 1/2 POWER -80 -85 2 2.5 3 3.5 4 4.5 5 5.5 6 VS (V) VOP-P (V) 3/4 POWER VS=2.5V AV=5 RF=2k RL=100 f=150kHz FULL POWER FIGURE 19. DIFFERENTIAL BANDWIDTH vs SUPPLY VOLTAGE FIGURE 20. DIFFERENTIAL TOTAL HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE 16 12 PEAKING (dB) 1/2 POWER 8 4 0 -4 2.5 THD (dB) AV=5 RF=1.5k RL=100 -45 -50 -55 -60 -65 -70 -75 -80 FULL POWER -85 -90 3.5 4.5 5.5 6.5 7.5 2 4 6 8 10 12 14 16 18 20 VS (V) VOP-P (V) FULL POWER 3/4 POWER 1/2 POWER VS=6V AV=5 RF=1.5k RL=100 f=150kHz 3/4 POWER FIGURE 21. DIFFERENTIAL PEAKING vs SUPPLY VOLTAGE FIGURE 22. DIFFERENTIAL TOTAL HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE -10 -20 -30 ISOLATION (dB) -40 -50 -60 -70 -80 -90 -100 -110 10k AB BA THD (dB) -30 -40 -50 -60 FULL POWER -70 3/4 POWER -80 -90 100k 1M FREQUENCY (Hz) 10M 100M 2 6 10 14 VOP-P (V) 18 22 26 1/2 POWER VS=7.5V AV=5 RF=1.5k RL=100 f=150kHz FIGURE 23. CHANNEL ISOLATION vs FREQUENCY FIGURE 24. DIFFERENTIAL TOTAL HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE 8 FN7016.2 April 10, 2007 EL1511 Typical Performance Curves (Continued) -45 -50 -55 -60 HD (dB) -65 -70 -75 -80 -85 -90 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 VOP-P (V) HD2 VS=2.5V AV=5 RF=2k RL=100 f=1MHz HD3 HD (dB) -45 -50 -55 -60 -65 -70 -75 -80 -85 2 4 6 8 10 12 14 16 18 20 VOP-P (V) HD2 VS=6V AV=5 RF=1.5k RL=100 f=1MHz HD3 FIGURE 25. DIFFERENTIAL HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE (FULL POWER MODE) FIGURE 26. DIFFERENTIAL HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE (FULL POWER MODE) -45 -50 -55 -60 HD (dB) -65 -70 -75 -80 -85 -90 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 VOP-P (V) HD2 VS=2.5V AV=5 RF=2k RL=100 f=1MHz HD3 HD (dB) -45 -50 -55 -60 -65 -70 -75 -80 -85 2 4 6 8 10 12 14 16 18 20 VOP-P (V) HD2 VS=6V AV=5 RF=1.5k RL=100 f=1MHz HD3 FIGURE 27. DIFFERENTIAL HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE (3/4 POWER MODE) FIGURE 28. DIFFERENTIAL HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE (3/4 POWER MODE) -50 -55 -60 HD (dB) -65 -70 -75 -80 -85 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 VOP-P (V) HD2 VS=2.5V AV=5 RF=2k RL=100 f=1MHz HD3 HD (dB) -45 -50 -55 -60 -65 -70 -75 -80 -85 2 4 6 8 10 12 14 16 18 20 VOP-P (V) HD2 VS=6V AV=5 RF=1.5k RL=100 f=1MHz HD3 FIGURE 29. DIFFERENTIAL HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE (1/2 POWER MODE) FIGURE 30. DIFFERENTIAL HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE (1/2 POWER MODE) 9 FN7016.2 April 10, 2007 EL1511 Typical Performance Curves (Continued) -30 -40 -50 HD (dB) -60 HD3 -70 HD2 -80 -90 2 6 10 14 VOP-P (V) 18 22 26 -75 -80 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 VOP-P (V) VS=7.5V AV=5 RF=1.5k RL=100 f=1MHz THD (dB) -45 -50 -55 -60 -65 -70 1/2 POWER 3/4 POWER FULL POWER VS=2.5V AV=5 RF=2k RL=100 f=1MHz FIGURE 31. DIFFERENTIAL HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE (FULL POWER MODE) FIGURE 32. DIFFERENTIAL TOTAL HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE -30 -40 -50 HD (dB) -60 -70 HD2 -80 -90 2 6 10 14 VOP-P (V) 18 22 26 VS=7.5V AV=5 RF=1.5k RL=100 f=1MHz THD (dB) -45 -50 -55 -60 -65 -70 -75 -80 -85 2 4 6 8 10 12 14 16 18 20 VOP-P (V) FULL POWER 3/4 POWER VS=6V AV=5 RF=1.5k RL=100 f=1MHz 1/2 POWER HD3 FIGURE 33. DIFFERENTIAL HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE (3/4 POWER MODE) FIGURE 34. DIFFERENTIAL TOTAL HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE -30 -40 -50 HD (dB) -60 -70 HD2 -80 -90 2 6 10 14 VOP-P (V) 18 22 26 VS=7.5V AV=5 RF=1.5k RL=100 f=1MHz HD3 THD (dB) -30 -40 -50 -60 -70 FULL POWER -80 3/4 POWER -90 2 6 10 14 VOP-P (V) 18 22 26 VS=7.5V AV=5 RF=1.5k RL=100 f=1MHz 1/2 POWER FIGURE 35. DIFFERENTIAL HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE (1/2 POWER MODE) FIGURE 36. DIFFERENTIAL TOTAL HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE 10 FN7016.2 April 10, 2007 EL1511 Typical Performance Curves (Continued) 0.14 0.12 0.1 dG (%) 0.08 1/2 POWER 0.06 0.04 0.02 0 1 1.5 2 2.5 3 3.5 4 400ns/DIV NUMBER OF 150 LOADS 3/4 POWER FULL POWER CH 1 C0, C1 CH 1=2V/DIV CH 2=2V/DIV VS=6V AV=2 RF=1.5k CH 2 VOUT FIGURE 37. DIFFERENTIAL GAIN FIGURE 38. DISABLE TIME 0.15 0.14 0.13 0.12 dP () 0.11 0.1 0.09 FULL POWER 0.08 0.07 1 1.5 2 2.5 3 3.5 4 40ns/DIV NUMBER OF 150 LOADS 3/4 POWER CH 1 C0, C1 VS=6V AV=2 RF=1.5k 1/2 POWER CH 2 CH 1=2V/DIV CH 2=2V/DIV VOUT FIGURE 39. DIFFERENTIAL PHASE FIGURE 40. ENABLE TIME 16 14 12 IS (mA) 10 8 6 4 2 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 7.5 VS (V) IS+ (1/2 POWER) IS+ (1/2 POWER) IS- (3/4 POWER) IS+ (3/4 POWER) INPUT BIAS CURRENT (A) IS+ (FULL POWER) IS- (FULL POWER) 10 8 6 4 2 0 -2 -4 -6 -8 -10 -50 -25 0 25 50 75 100 125 150 IB+ IB- DIE TEMPERATURE (C) FIGURE 41. SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE 42. INPUT BIAS CURRENT vs TEMPERATURE 11 FN7016.2 April 10, 2007 EL1511 Typical Performance Curves (Continued) 16 SUPPLY CURRENT (mA) FULL POWER 3/4 POWER OFFSET VOLTAGE (mV) 14 12 10 8 6 4 2 0 -50 -25 0 25 DISABLED 50 75 100 125 150 1/2 POWER 7 6 5 4 3 2 1 0 -1 -2 -3 -50 -25 0 25 50 75 100 125 150 DIE TEMPERATURE (C) DIE TEMPERATURE (C) FIGURE 43. POSITIVE SUPPLY CURRENT vs TEMPERATURE FIGURE 44. OFFSET VOLTAGE vs TEMPERATURE 5.2 RL=100 OUTPUT VOLTAGE (V) 5.1 50.5 5 4.95 4.9 4.85 4.8 -50 -25 0 25 50 75 100 125 150 TRANSIMPEDANCE (M) 5.15 3 2.5 2 1.5 1 0.5 0 -50 -25 0 25 50 75 100 125 150 DIE TEMPERATURE (C) DIE TEMPERATURE (C) FIGURE 45. OUTPUT VOLTAGE vs TEMPERATURE FIGURE 46. TRANSIMPEDANCE vs TEMPERATURE 520 510 SLEW RATE (V/s) 500 PSRR (dB) 490 480 470 460 450 440 -50 -25 0 25 50 75 100 125 150 30 20 10 0 -10 -20 -30 -40 -50 -60 -70 10K 100K 1M FREQUENCY (Hz) 10M 100M PSRRPSRR+ DIE TEMPERATURE (C) FIGURE 47. SLEW RATE vs TEMPERATURE FIGURE 48. POWER SUPPLY REJECTION vs FREQUENCY 12 FN7016.2 April 10, 2007 EL1511 Typical Performance Curves (Continued) 100 VOLTAGE NOISE (nV/Hz), CURRENT NOISE (pA/Hz) OUTPUT IMPEDANCE () 100 10 1 0.1 0.01 0.001 10K VS=6V AV=1 RF=1.5k IB10 eN IB+ 1 10 100 1K 10K 100K 1M 10M 100M 100K 1M FREQUENCY (Hz) 10M 100M FREQUENCY (Hz) FIGURE 49. VOLTAGE AND CURRENT NOISE vs FREQUENCY FIGURE 50. OUTPUT IMPEDANCE vs FREQUENCY (ALL POWER LEVELS) USING EL1511CS/EL1511CL DEMOBOARD, 2"X2" (4-LAYER) DEMOBOARD WITH HEATSINK VIA INTERNAL GROUND PLANE 37C/W 47C/W SO 10M 1M MAGNITUDE () 100k 10k 1k GAIN PHASE 50 0 -50 -100 -150 -200 -250 PHASE () POWER DISSIPATION (W) 4 3.5 3 2.5 2 1.5 1 0.5 QF N 16 16 (0. 15 0" ) 100 100 1K 10K 100K 1M 10M -300 100M 0 -40 -20 0 20 40 60 80 100 FREQUENCY (Hz) AMBIENT TEMPERATURE (C) FIGURE 51. TRANSIMPEDANCE (ROL) vs FREQUENCY FIGURE 52. PACKAGE POWER DISSIPATION AND THERMAL RESISTANCE JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY (4-LAYER) TEST BOARD, QFN EXPOSED DIEPAD SOLDERED TO PCB PER JESD51-5 4 POWER DISSIPATION (W) 3.5 3 2.5 2 1.5 1 0.5 0 0 25 50 75 85 100 125 150 AMBIENT TEMPERATURE (C) 40 QF N1 6 C /W 3.125W FIGURE 53. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE 13 FN7016.2 April 10, 2007 EL1511 Applications Information Product Description The EL1511 is a dual operational amplifier designed for customer premise driver functions in DMT ADSL solutions and is built using Elantec's proprietary complimentary bipolar process. Due to the current feedback architecture, the EL1511 closed-loop 3dB bandwidth is dependent on the value of the feedback resistor. First the desired bandwidth is selected by choosing the feedback resistor, RF, and then the gain is set by picking the gain resistor, RG. The curves at the beginning of the Typical Performance Curves section show the effect of varying both RF and RG. Power Dissipation The EL1511 amplifier combines both high speed and large output current drive capability at a moderate supply current in very small packages. It is possible to exceed the maximum junction temperature allowed under certain supply voltage, temperature, and loading conditions. To ensure that the EL1511 remains within its absolute maximum ratings, the following discussion will help to avoid exceeding the maximum junction temperature. The maximum power dissipation allowed in a package is determined by its thermal resistance and the amount of temperature rise according to: T JMAX - T AMAX P DMAX = ------------------------------------------- JA Power Supply Bypassing and Printed Circuit Board Layout As with any high frequency device, good printed circuit board layout is necessary for optimum performance. Ground plane construction is highly recommended. Lead lengths should be as short as possible, below 1/4. The power supply pins must be well bypassed to reduce the risk of oscillation. A 1.0F tantalum capacitor in parallel with a 0.01F ceramic capacitor is adequate for each supply pin. For good AC performance, parasitic capacitances should be kept to a minimum, especially at the inverting input (see Capacitance at the Inverting Input section). This implies keeping the ground plane away from this pin. Carbon resistors are acceptable, while use of wire-wound resistors should not be used because of their parasitic inductance. Similarly, capacitors should be low inductance for best performance. Use of sockets, particularly for the SO (0.150") package, should be avoided. Sockets add parasitic inductance and capacitance which will result in peaking and overshoot. The maximum power dissipation actually produced by an IC is the total quiescent supply current times the total power supply voltage plus the power in the IC due to the load, or: V OUT P DMAX = 2 x V S + ( V S - V OUT ) x --------------RL where IS is the supply current. (To be more accurate, the quiescent supply current flowing in the output driver transistor should be subtracted from the first term because, under loading and due to the class AB nature of the output stage, the output driver current is now included in the second term.) In general, an amplifier's AC performance degrades at higher operating temperature and lower supply current. Unlike some amplifiers, the EL1511 maintains almost constant supply current over temperature so that AC performance is not degraded as much over the entire operating temperature range. Capacitance at the Inverting Input Due to the topology of the current feedback amplifier, stray capacitance at the inverting input will affect the AC and transient performance of the EL1511 when operating in the non-inverting configuration. In the inverting gain mode, added capacitance at the inverting input has little effect since this point is at a virtual ground and stray capacitance is therefore not "seen" by the amplifier. Estimating Line Driver Power Dissipation in ADSL CPE Application The below figure shows a typical ADSL CPE line driver implementation. The average line power requirement for the ADSL CPE application is 13dBM (20mW) into a 100W line. The average line voltage is 1.41VRMS. The ADSL DMT peak to average ratio (crest factor) of 5.3 implies peak voltage of 7.5V into the line. Using a differential drive configuration and transformer coupling with standard back termination, a transformer ratio of 1:2 is selected. With 1:2 transformer ratio, the impedance across the driver side of the transformer is 25, the average voltage is 0.705VRMA and the average current is 28.2mA. The power dissipated in the EL1511 is a combination of the quiescent power and the output stage power when driving the line: PD = P quiescent + P output-stage PD = V S x I Q + ( V S - 2 x V OUT-RMS ) x I OUT-RMS Feedback Resistor Values The EL1511 has been designed and specified with RF = 1.5k for AV = +5. This value of feedback resistor yields relatively flat frequency response with <1.5dB peaking out to 60MHz. As is the case with all current feedback amplifiers, wider bandwidth, at the expense of slight peaking, can be obtained by reducing the value of the feedback resistor. Inversely, larger values of feedback resistor will cause rolloff to occur at a lower frequency. By reducing RF to 1k, bandwidth can be extended to 70MHz with 3.0dB of peaking. See the curves in the Typical Performance Curves section which show 3dB bandwidth and peaking vs frequency for various feedback resistors. 14 In the 1/2 power mode, the EL1511 consumes typically 6.6mA quiescent current and still able to maintain very low distortion. The distortion results are shown in typical FN7016.2 April 10, 2007 EL1511 performance section of the data sheet. When driving a load, a large portion (about 50%) of the quiescent current becomes output load current: PD = 12 x ( 6.6mA x 50% ) + ( 12V - 2 x 0.705 ) x 28.2mA where: PD = 338mW Assuming a maximum ambient temperature of 85C and keeping the junction temperature less than 150C, the maximum thermal resistance from junction to ambient required is: 150 - 85 JA = --------------------- = 192C/W 338mW TOP (16 Ld QFN) With proper layout, the EL1511CS package can achieve 47C/W, well below the thermal resistance required by the application. TX+ + - VS+ RT 12.5 TXFR 1:2 100 From AFE 2RG 464 TX- VSRF INTERNAL GROUND PLANE (16 Ld QFN) 1.5k + - VS+ RT 12.5 VSRF 1.5k PCB Layout Considerations for Thermal Packages The EL1511 die is packaged in two different thermal efficient packages, the 16 Ld SO and 16 Ld QFN packages. The 16 Ld SO package has the same dimensions as standard 0.15" wide narrow body 16 Ld SO package with a special fused lead frame that extends out through the center ground pins. Both packages can use PCB surface metal vias areas and internal ground planes, to spread heat away from the package. The larger the PCB area the lower the junction temperature of the device will be. In XDSL applications, multiple layer circuit boards with internal ground plane are generally used. 13 mil vias are recommended to connect the metal area under the device with the internal ground plane. Examples of the PCB layouts are shown in the figures below that result in thermal resistance JA of 37C/W for the QFN package and 47C/W for the SO package. The thermal resistance is obtained with the EL1511CL and CS demo boards. The demo board is a 4-layer board built with 2oz. copper and has a dimension of 4in2. Note, the user must follow the thermal layout guideline to achieve these results. A separate Application Note for the QFN package and layout recommendations is also available. TOP (16 Ld SO) INTERNAL GROUND PLANE (16 Ld SO) 15 FN7016.2 April 10, 2007 EL1511 QFN (Quad Flat No-Lead) Package Family A D N (N-1) (N-2) B MDP0046 QFN (QUAD FLAT NO-LEAD) PACKAGE FAMILY (COMPLIANT TO JEDEC MO-220) MILLIMETERS SYMBOL QFN44 QFN38 A 0.90 0.02 0.25 0.20 7.00 5.10 7.00 5.10 0.50 0.55 44 11 11 0.90 0.02 0.25 0.20 5.00 3.80 7.00 5.80 0.50 0.40 38 7 12 QFN32 0.90 0.02 0.23 0.20 8.00 0.90 0.02 0.22 0.20 5.00 TOLERANCE 0.10 +0.03/-0.02 0.02 Reference Basic Reference Basic Reference Basic 0.05 Reference Reference Reference NOTES 8 8 4 6 5 1 2 3 A1 PIN #1 I.D. MARK E b c D D2 E (N/2) 5.80 3.60/2.48 8.00 6.00 2X 0.075 C E2 2X 0.075 C 5.80 4.60/3.40 0.80 0.53 32 8 8 0.50 0.50 32 7 9 e L N ND TOP VIEW N LEADS 0.10 M C A B (N-2) (N-1) N b NE L PIN #1 I.D. 3 1 2 3 MILLIMETERS SYMBOL QFN28 QFN24 A A1 b c 0.90 0.02 0.25 0.20 4.00 2.65 5.00 3.65 0.50 0.40 28 6 8 0.90 0.02 0.25 0.20 4.00 2.80 5.00 3.80 0.50 0.40 24 5 7 QFN20 0.90 0.02 0.30 0.20 5.00 3.70 5.00 3.70 0.65 0.40 20 5 5 0.90 0.02 0.25 0.20 4.00 2.70 4.00 2.70 0.50 0.40 20 5 5 QFN16 0.90 0.02 0.33 0.20 4.00 2.40 4.00 2.40 0.65 0.60 16 4 4 TOLERANCE NOTES 0.10 +0.03/ -0.02 0.02 Reference Basic Reference Basic Reference Basic 0.05 Reference Reference Reference 4 6 5 (E2) NE 5 (N/2) D D2 (D2) BOTTOM VIEW 7 E E2 e L e C SEATING PLANE 0.08 C N LEADS & EXPOSED PAD 0.10 C N ND NE Rev 11 2/07 SEE DETAIL "X" SIDE VIEW NOTES: 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Tiebar view shown is a non-functional feature. 3. Bottom-side pin #1 I.D. is a diepad chamfer as shown. 4. N is the total number of terminals on the device. (c) C A 2 5. NE is the number of terminals on the "E" side of the package (or Y-direction). 6. ND is the number of terminals on the "D" side of the package (or X-direction). ND = (N/2)-NE. 7. Inward end of terminal may be square or circular in shape with radius (b/2) as shown. 8. If two values are listed, multiple exposed pad options are available. Refer to device-specific datasheet. (L) A1 DETAIL X N LEADS 16 FN7016.2 April 10, 2007 EL1511 Small Outline Package Family (SO) A D N (N/2)+1 h X 45 A E E1 PIN #1 I.D. MARK c SEE DETAIL "X" 1 B (N/2) L1 0.010 M C A B e C H A2 GAUGE PLANE A1 0.004 C 0.010 M C A B b DETAIL X SEATING PLANE L 4 4 0.010 MDP0027 SMALL OUTLINE PACKAGE FAMILY (SO) INCHES SYMBOL A A1 A2 b c D E E1 e L L1 h N NOTES: 1. Plastic or metal protrusions of 0.006" maximum per side are not included. 2. Plastic interlead protrusions of 0.010" maximum per side are not included. 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994 SO-8 0.068 0.006 0.057 0.017 0.009 0.193 0.236 0.154 0.050 0.025 0.041 0.013 8 SO-14 0.068 0.006 0.057 0.017 0.009 0.341 0.236 0.154 0.050 0.025 0.041 0.013 14 SO16 (0.150") 0.068 0.006 0.057 0.017 0.009 0.390 0.236 0.154 0.050 0.025 0.041 0.013 16 SO16 (0.300") (SOL-16) 0.104 0.007 0.092 0.017 0.011 0.406 0.406 0.295 0.050 0.030 0.056 0.020 16 SO20 (SOL-20) 0.104 0.007 0.092 0.017 0.011 0.504 0.406 0.295 0.050 0.030 0.056 0.020 20 SO24 (SOL-24) 0.104 0.007 0.092 0.017 0.011 0.606 0.406 0.295 0.050 0.030 0.056 0.020 24 SO28 (SOL-28) 0.104 0.007 0.092 0.017 0.011 0.704 0.406 0.295 0.050 0.030 0.056 0.020 28 TOLERANCE MAX 0.003 0.002 0.003 0.001 0.004 0.008 0.004 Basic 0.009 Basic Reference Reference NOTES 1, 3 2, 3 Rev. M 2/07 17 FN7016.2 April 10, 2007 EL1511 All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 18 FN7016.2 April 10, 2007 |
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