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FDD3N40 / FDU3N40 400V N-Channel MOSFET
February 2007
FDD3N40 / FDU3N40
400V N-Channel MOSFET Features
* 2A, 400V, RDS(on) = 3.4 @VGS = 10 V * Low gate charge ( typical 4.5 nC) * Low Crss ( typical 3.7 pF) * Fast switching * 100% avalanche tested * Improved dv/dt capability
UniFET
Description
TM
These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficient switched mode power supplies and active power factor correction.
D
D
G
S
D-PAK
FDD Series
I-PAK
GDS
FDU Series
G
S
Absolute Maximum Ratings
Symbol
VDSS ID IDM VGSS EAS IAR EAR dv/dt PD TJ, TSTG TL Drain-Source Voltage Drain Current Drain Current Gate-Source voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25C) - Derate above 25C
(Note 2) (Note 1) (Note 1) (Note 3)
Parameter
- Continuous (TC = 25C) - Continuous (TC = 100C) - Pulsed
(Note 1)
FDD3N40 / FDU3N40
400 2.0 1.25 8.0 30 46 2 3 4.5 30 0.24 -55 to +150 300
Unit
V A A A V mJ A mJ V/ns W W/C C C
Operating and Storage Temperature Range Maximum Lead Temperature for Soldering Purpose, 1/8" from Case for 5 Seconds
* Drain current limited by maximum junction temperature
Thermal Characteristics
Symbol
RJC RJA
Parameter
Thermal Resistance, Junction-to-Case Thermal Resistance, Case-to-Sink Typ.
Typ
---
Max
4.2 110
Unit
C/W C/W
(c)2007 Fairchild Semiconductor Corporation
1
www.fairchildsemi.com
FDD3N40 / FDU3N40 Rev. A
FDD3N40 / FDU3N40 400V N-Channel MOSFET
Package Marking and Ordering Information
Device Marking
FDD3N40 FDD3N40 FDU3N40
Device
FDD3N40TM FDD3N40TF FDU3N40TU
Package
D-PAK D-PAK I-PAK
Reel Size
380mm 380mm -
Tape Width
16mm 16mm -
Quantity
2500 2000 70
Electrical Characteristics
Symbol
Off Characteristics BVDSS BVDSS / TJ IDSS IGSSF IGSSR VGS(th) RDS(on) gFS Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd
TC = 25C unless otherwise noted
Parameter
Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse
Conditions
VGS = 0V, ID = 250A ID = 250A, Referenced to 25C VDS = 400V, VGS = 0V VDS = 320V, TC = 125C VGS = 30V, VDS = 0V VGS = -30V, VDS = 0V VDS = VGS, ID = 250A VGS = 10V, ID = 1A VDS = 40V, ID = 1A VDS = 25V, VGS = 0V, f = 1.0MHz
(Note 4)
Min.
400 ------
Typ.
-0.4 -----
Max Units
--1 10 100 -100 V V/C A A nA nA
On Characteristics Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance 3.0 ---2.8 2 5.0 3.4 -V S
Dynamic Characteristics Input Capacitance Output Capacitance Reverse Transfer Capacitance ---173 30 3.7 225 40 6 pF pF pF
Switching Characteristics Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = 320V, ID = 3A VGS = 10V
(Note 4, 5) (Note 4, 5)
VDD = 200V, ID = 3A RG = 25
--------
10 30 10 25 4.5 1.2 2
30 70 30 60 6 ---
ns ns ns ns nC nC nC
Drain-Source Diode Characteristics and Maximum Ratings IS ISM VSD trr Qrr
NOTES: 1. Repetitive Rating: Pulse width limited by maximum junction temperature 2. L = 20mH, IAS = 2A, VDD = 50V, RG = 25, Starting TJ = 25C 3. ISD 2A, di/dt 200A/s, VDD BVDSS, Starting TJ = 25C 4. Pulse Test: Pulse width 300s, Duty Cycle 2% 5. Essentially Independent of Operating Temperature Typical Characteristics
Maximum Continuous Drain-Source Diode Forward Current Maximum Pulsed Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0V, IS = 2A VGS = 0V, IS = 3A dIF/dt =100A/s
(Note 4)
------
---210 0.75
2 8 1.4 ---
A A V ns C
2 FDD3N40 / FDU3N40 Rev. A
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FDD3N40 / FDU3N40 400V N-Channel MOSFET
Typical Performance Characteristics
Figure 1. On-Region Characteristics
10
1
Figure 2. Transfer Characteristics
10
1
ID, Drain Current [A]
10
0
ID, Drain Current [A]
VGS 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V Bottom : 5.5 V Top :
150 C 25 C -55 C
* Notes : 1. VDS = 40V 2. 250s Pulse Test
o o
o
10
-1
* Notes : 1. 250s Pulse Test 2. TC = 25 C
o
-2
10
10
-1
10
0
10
1
10
0
4
5
6
7
8
9
10
VDS, Drain-Source Voltage [V]
VGS, Gate-Source Voltage [V]
Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperatue
15
RDS(ON) [], Drain-Source On-Resistance
14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 1 2 3 4
* Note : TJ = 25 C
o
IDR, Reverse Drain Current [A]
10
1
VGS = 10V
10
0
VGS = 20V
150oC 25 C
o
* Notes : 1. VGS = 0V 2. 250s Pulse Test
5
6
10
-1
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
ID, Drain Current [A]
VSD, Source-Drain voltage [V]
Figure 5. Capacitance Characteristics
350
Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd
Figure 6. Gate Charge Characteristics
12
300
Coss
250
VGS, Gate-Source Voltage [V]
10
VDS = 80V VDS = 200V
Capacitances [pF]
Ciss
200
8
VDS = 320V
6
150
100
Crss
50
* Note : 1. VGS = 0 V 2. f = 1 MHz
4
2
* Note : ID = 3A
0 -1 10
10
0
10
1
0 0 1 2 3 4 5
VDS, Drain-Source Voltage [V]
QG, Total Gate Charge [nC]
3 FDD3N40 / FDU3N40 Rev. A
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FDD3N40 / FDU3N40 400V N-Channel MOSFET
Typical Performance Characteristics (Continued)
Figure 7. Breakdown Voltage Variation vs. Temperature
1.2
Figure 8. On-Resistance Variation vs. Temperature
3.0
BVDSS, (Normalized) Drain-Source Breakdown Voltage
1.1
RDS(ON), (Normalized) Drain-Source On-Resistance
2.5
2.0
1.0
1.5
1.0
0.9
* Notes : 1. VGS = 0 V 2. ID = 250A
0.5
* Notes : 1. VGS = 10 V 2. ID = 1 A
0.8 -100
-50
0
50
100
o
150
200
0.0 -100
-50
0
50
100
o
150
200
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current vs. Case Temperature
2.5
10
1
10 s 100 s 1 ms
2.0
ID, Drain Current [A]
ID, Drain Current [A]
10
0
10 ms
Operation in This Area is Limited by R DS(on)
1.5
100 ms DC
* Notes : 1. TC = 25 C 2. TJ = 150 C 3. Single Pulse
o o
1.0
10
-1
0.5
10
-2
10
0
10
1
10
2
0.0 25
50
75
100
o
125
150
VDS, Drain-Source Voltage [V]
TC, Case Temperature [ C]
Figure 11. Transient Thermal Response Curve
ZJC(t), Thermal Response
D = 0 .5
0
10
0 .2 0 .1 0 .0 5 0 .0 2
PDM t1 t2
* N o te s : 1 . Z J C ( t) = 4 .2 C /W M a x . 2 . D u ty F a c to r , D = t 1 /t 2 3 . T J M - T C = P D M * Z J C ( t)
o
10
-1
0 .0 1 s in g le p u ls e
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t 1 , S q u a r e W a v e P u ls e D u r a tio n [s e c ]
4 FDD3N40 / FDU3N40 Rev. A
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FDD3N40 / FDU3N40 400V N-Channel MOSFET
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveforms
5 FDD3N40 / FDU3N40 Rev. A
www.fairchildsemi.com
FDD3N40 / FDU3N40 400V N-Channel MOSFET
Peak Diode Recovery dv/dt Test Circuit & Waveforms
6 FDD3N40 / FDU3N40 Rev. A
www.fairchildsemi.com
FDD3N40 / FDU3N40 400V N-Channel MOSFET
Mechanical Dimensions
D-PAK
7 FDD3N40 / FDU3N40 Rev. A
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FDD3N40 / FDU3N40 400V N-Channel MOSFET
Mechanical Dimensions
I-PAK
8 FDD3N40 / FDU3N40 Rev. A
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TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx Across the board. Around the world.TM ActiveArrayTM BottomlessTM Build it NowTM CoolFETTM CROSSVOLTTM CTLTM Current Transfer LogicTM DOMETM 2 E CMOSTM (R) EcoSPARK EnSignaTM FACT Quiet SeriesTM (R) FACT (R) FAST FASTrTM FPSTM (R) FRFET GlobalOptoisolatorTM GTOTM
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DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD'S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Preliminary Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only.
Rev. I23
2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
No Identification Needed
Full Production
Obsolete
Not In Production
(c) 2007 Fairchild Semiconductor Corporation
www.fairchildsemi.com

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