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CT RODU U CT E TE P L PROD OBSO ITUTE UBST 2E IBLE S POS Sheet ICL322 Data S
ICL3310E
July 2004 FN6000.3
+/- 15kV ESD Protected, +3V to +5.5V, 1 Microamp, 250kbps, RS-232 Transmitter/Receiver
The Intersil ICL3310E contains 3.0V to 5.5V powered RS-232 transmitters/receivers which meet ElA/TIA-232 and V.28/V.24 specifications, even at VCC = 3.0V. Targeted applications are PDAs, Palmtops, and notebook and laptop computers where the low operational, and even lower standby, power consumption is critical. Efficient on-chip charge pumps, coupled with a manual powerdown function reduces the standby supply current to a 1A trickle. Small footprint packaging, and the use of small, low value capacitors ensure board space savings as well. Data rates greater than 250kbps are guaranteed at worst case load conditions. This device is fully compatible with 3.3V only systems, mixed 3.3V and 5.0V systems, and 5.0V only systems. The single pin powerdown function (SHDN = 0) disables all the transmitters and receivers, while shutting down the charge pump to minimize supply current drain. Table 1 summarizes the features of the ICL3310E, while Application Note AN9863 summarizes the features of each device comprising the ICL32XX 3V family.
Features
* ESD Protection for RS-232 I/O Pins to 15kV (IEC61000) * Drop In Replacement for MAX3384ECWN (SOIC) * Low Power, Pin Compatible Upgrade for 5V MAX222, SP310E, ADM222, and LT1780 * Single SHDN Pin Disables Transmitters and Receivers * Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V * RS-232 Compatible Outputs at 2.7V * Latch-Up Free * On-Chip Voltage Converters Require Only Four External 0.1F Capacitors * Receiver Hysteresis For Improved Noise Immunity * Very Low Supply Current . . . . . . . . . . . . . . . . . . . . 0.3mA * Guaranteed Minimum Data Rate . . . . . . . . . . . . . 250kbps * Guaranteed Minimum Slew Rate . . . . . . . . . . . . . . . 6V/s * Wide Power Supply Range . . . . . . . Single +3V to +5.5V * Low Supply Current in Powerdown State. . . . . . . . . .<1A
Applications
* Any System Requiring RS-232 Communication Ports - Battery Powered, Hand-Held, and Portable Equipment - Laptop Computers, Notebooks, Palmtops - Modems, Printers and other Peripherals - Digital Cameras - Cellular/Mobile Phones
Part # Information
PART NO. ICL3310ECB ICL3310ECB-T ICL3310ECA ICL3310ECA-T ICL3310EIB ICL3310EIB-T ICL3310EIA ICL3310EIA-T TEMP. RANGE (C) 0 to 70 0 to 70 0 to 70 0 to 70 -40 to 85 -40 to 85 -40 to 85 -40 to 85 PACKAGE 18 Ld SOIC Tape and Reel 20 Ld SSOP Tape and Reel 18 Ld SOIC Tape and Reel 20 Ld SSOP Tape and Reel PKG. DWG. # M18.3 M18.3 M20.209 M20.209 M18.3 M18.3 M20.209 M20.209
Related Literature
* Technical Brief TB363 "Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)" * AN9863, "3V to +5.5V, 250k-1Mbps, RS-232 Transmitters/Receivers"
TABLE 1. SUMMARY OF FEATURES NO. OF NO. OF PART NUMBER Tx. Rx. ICL3310E 2 2 NO. OF MONITOR Rx. (ROUTB) 0 DATA RATE (kbps) 250 Rx. ENABLE FUNCTION? No READY OUTPUT? No MANUAL POWERDOWN? Yes AUTOMATIC POWERDOWN FUNCTION? No
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2004. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
ICL3310E Pinouts
ICL3310E (SOIC) TOP VIEW
NC 1 C1+ 2 V+ 3 18 SHDN 17 VCC 16 GND 15 T1OUT 14 R1IN 13 R1OUT 12 T1IN 11 T2IN 10 R2OUT NC 1 C1+ 2 V+ 3
ICL3310E (SSOP) TOP VIEW
20 SHDN 19 VCC 18 GND 17 T1OUT 16 R1IN 15 R1OUT 14 NC 13 T1IN 12 T2IN 11 NC
C1- 4 C2+ 5 C2- 6 V- 7 T2OUT 8 R2IN 9
C1- 4 C2+ 5 C2- 6 V- 7 T2OUT 8 R2IN 9 R2OUT 10
Pin Descriptions
PIN VCC V+ VGND C1+ C1C2+ C2TIN TOUT RIN ROUT SHDN System power supply input (3.0V to 5.5V). Internally generated positive transmitter supply (+5.5V). Internally generated negative transmitter supply (-5.5V). Ground connection. External capacitor (voltage doubler) is connected to this lead. External capacitor (voltage doubler) is connected to this lead. External capacitor (voltage inverter) is connected to this lead. External capacitor (voltage inverter) is connected to this lead. TTL/CMOS compatible transmitter Inputs. 15kV ESD Protected, RS-232 level (nominally 5.5V) transmitter outputs. 15kV ESD Protected, RS-232 compatible receiver inputs. TTL/CMOS level receiver outputs. Active low input to shut down transmitters, receivers, and on-board power supply, to place device in low power mode. FUNCTION
Typical Operating Circuits
ICL3310E (NOTE 2)
C3 (OPTIONAL CONNECTION, NOTE 1) +3.3V to +5V + 0.1F + 2 4 5 + 6 12 11 13 R1 R2OUT 10 R2 GND 5k 18 5k 9 R2IN C1+ C1C2+ C2T1 T2 17 VCC 3 V+ V7 + 15 8 14 + C3 0.1F C4 0.1F + T1OUT T2OUT R1IN
C1 0.1F C2 0.1F T1IN TTL/CMOS LOGIC LEVELS T2IN R1OUT
RS-232 LEVELS
SHDN
VCC
NOTES: 1. The negative terminal of C3 can be connected to either VCC or GND. 2. Pin numbers refer to SOIC package.
16
2
ICL3310E
Absolute Maximum Ratings
VCC to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V Input Voltages TIN, SHDN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V Output Voltages TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.2V ROUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC +0.3V Short Circuit Duration TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Thermal Information
Thermal Resistance (Typical, Note 3)
JA (C/W)
18 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 75 20 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 122 Maximum Junction Temperature (Plastic Package) . . . . . . . 150C Maximum Storage Temperature Range . . . . . . . . . . . -65C to 150C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300C (Lead Tips Only)
Operating Conditions
Temperature Range ICL3310ECX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to 70C ICL3310EIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40C to 85C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 3. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1F; Unless Otherwise Specified. Typicals are at TA = 25C TEST CONDITIONS TEMP (C) MIN TYP MAX UNITS
PARAMETER DC CHARACTERISTICS Supply Current, Powerdown SHDN = GND
25 Full
-
0.1 1 0.3
5 50 3.0
A A mA
Supply Current, Enabled
All Outputs Unloaded, SHDN = VCC TIN, SHDN TIN, SHDN TIN, SHDN SHDN = GND IOUT = 3.2mA IOUT = -1.0mA
Full
LOGIC AND TRANSMITTER INPUTS AND RECEIVER OUTPUTS Input Logic Threshold Low Input Logic Threshold High Input Leakage Current Output Leakage Current Output Voltage Low Output Voltage High RECEIVER INPUTS Input Voltage Range Input Threshold Low VCC = 3.3V VCC = 5.0V Input Threshold High VCC = 3.3V VCC = 5.0V Input Hysteresis Input Resistance TRANSMITTER OUTPUTS Output Voltage Swing Output Resistance Output Short-Circuit Current Output Leakage Current TIMING CHARACTERISTICS Maximum Data Rate RL = 3k, CL = 1000pF, One Transmitter Switching Full 250 500 kbps VOUT = 12V, VCC = 0V or 3V to 5.5V, SHDN = GND All Transmitter Outputs Loaded with 3k to Ground VCC = V+ = V- = 0V, Transmitter Output = 2V Full Full Full Full 5.0 300 7 5.4 10M 35 10 V mA A Full 25 Full 25 Full Full Full -25 0.6 0.8 0.2 3 1.2 1.5 1.5 1.8 0.5 5 25 2.4 2.4 1 7 V V V V V V k Full Full Full Full Full Full 2.4 0.01 0.05 0.8 1.0 10 0.4 V V A A V V
VCC -0.6 VCC -0.1
3
ICL3310E
Electrical Specifications
Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1F; Unless Otherwise Specified. Typicals are at TA = 25C (Continued) TEST CONDITIONS Transmitter Input to Transmitter Output, CL = 1000pF Receiver Input to Receiver Output, CL = 150pF tPHL tPLH tPHL tPLH TEMP (C) Full Full Full Full 25 25 25 25 25 25 MIN 4 6 TYP 0.6 0.7 0.2 0.3 50 600 100 100 MAX 3.5 3.5 1 1 UNITS s s s s s ns ns ns V/s V/s
PARAMETER Transmitter Propagation Delay
Receiver Propagation Delay
Transmitter Output Enable Time Transmitter Output Disable Time Transmitter Skew Receiver Skew Transition Region Slew Rate
From SHDN Rising Edge to TOUT = 3V From SHDN Falling Edge to TOUT = 5V tPHL - tPLH (Note 4) tPHL - tPLH VCC = 3.3V, CL = 150pF to RL = 3k to 7k, Measured From 3V to -3V or 2500pF -3V to 3V VCC = 4.5V, CL = 150pF to 2500pF
ESD PERFORMANCE RS-232 Pins (TOUT, RIN) Human Body Model IEC61000-4-2 Contact Discharge IEC61000-4-2 Air Gap Discharge All Other Pins NOTE: 4. Transmitter skew is measured at the transmitter zero crossing points. Human Body Model 25 25 25 25 15 8 15 3 kV kV kV kV
Detailed Description
The ICL3310E operates from a single +3V to +5.5V supply, guarantees a 250kbps minimum data rate, requires only four small external 0.1F capacitors, features low power consumption, and meets all ElA RS-232C and V.28 specifications. The circuit is divided into three sections: The charge pump, the transmitters, and the receivers.
All transmitter outputs disable and assume a high impedance state when the device enters the powerdown mode (see Table 2). These outputs may be driven to 12V when disabled. All devices guarantee a 250kbps data rate for full load conditions (3k and 1000pF), VCC 3.0V, with one transmitter operating at full speed. Under more typical conditions of VCC 3.3V, RL = 3k, and CL = 250pF, one transmitter easily operates at 900kbps. Transmitter inputs float if left unconnected (there are no pullup resistors), and may cause ICC increases. Connect unused inputs to GND for the best performance.
TABLE 2. POWERDOWN AND ENABLE LOGIC TRUTH TABLE SHDN TRANSMITTER RECEIVER INPUT OUTPUTS OUTPUTS MODE OF OPERATION H L Active High-Z Active High-Z Normal Operation Manual Powerdown
Charge-Pump
Intersil's new ICL3310E utilizes regulated on-chip dual charge pumps as voltage doublers, and voltage inverters to generate 5.5V transmitter supplies from a VCC supply as low as 3.0V. This allows these devices to maintain RS-232 compliant output levels over the 10% tolerance range of 3.3V powered systems. The efficient on-chip power supplies require only four small, external 0.1F capacitors for the voltage doubler and inverter functions over the full VCC range. The charge pumps operate discontinuously (i.e., they turn off as soon as the V+ and V- supplies are pumped up to the nominal values), resulting in significant power savings.
Transmitters
The transmitters are proprietary, low dropout, inverting drivers that translate TTL/CMOS inputs to EIA/TIA-232 output levels. Coupled with the on-chip 5.5V supplies, these transmitters deliver true RS-232 levels over a wide range of single supply system voltages.
Receivers
The ICL3310E contains standard inverting receivers that three-state via the SHDN control line. Receivers driving powered down peripherals must be disabled to prevent current flow through the peripheral's protection diodes (see Figures 2 and 3).
4
ICL3310E
All the receivers convert RS-232 signals to CMOS output levels and accept inputs up to 30V while presenting the required 3k to 7k input impedance (see Figure 1) even if the power is off (VCC = 0V). The receivers' Schmitt trigger input stage uses hysteresis to increase noise immunity and decrease errors due to slow input signal transitions.
VCC RXIN -25V VRIN +25V GND 5k RXOUT GND VROUT VCC
5V RS-232 output swings are acceptable, and transmitter pull-up resistors aren't required, the ICL3310E should work in most 5V applications. When replacing a device in an existing 5V application, it is acceptable to terminate C3 to VCC as shown on the "Typical Operating Circuit". Nevertheless, terminate C3 to GND if possible, as slightly better performance results from this configuration.
Powerdown Functionality
The already low current requirement drops significantly when the device enters powerdown mode. In powerdown, supply current drops to 1A, because the on-chip charge pump turns off (V+ collapses to VCC, V- collapses to GND), and the transmitter and receiver outputs three-state. This micro-power mode makes these devices ideal for battery powered and portable applications.
FIGURE 1. INVERTING RECEIVER CONNECTIONS
Low Power Operation
This 3V device requires a nominal supply current of 0.3mA, even at VCC = 5.5V, during normal operation (not in powerdown mode). This is considerably less than the 11mA current required by comparable 5V RS-232 devices, allowing users to reduce system power simply by replacing the old style device with the ICL3310E.
Software Controlled (Manual) Powerdown
The ICL3310E may be forced into its low power, standby state via a simple shutdown (SHDN) pin (see Figure 4). Driving this pin high enables normal operation, while driving it low forces the IC into it's powerdown state. The time required to exit powerdown, and resume transmission is less than 50s. Connect SHDN to VCC if the powerdown function isn't needed.
Low Power, Pin Compatible Replacement
Pin compatibility with existing 5V products (e.g., MAX222), coupled with the wide operating supply range, make the ICL3310E a potential lower power, higher performance dropin replacement for existing 5V applications. As long as the
VCC
VCC CURRENT FLOW VOUT = VCC
VCC TRANSITION DETECTOR TO WAKE-UP LOGIC VCC VICL3310E
VCC
Rx POWERED DOWN UART Tx GND SHDN = GND OLD RS-232 CHIP
RX POWERED DOWN UART TX
VOUT = HI-Z
FIGURE 2. POWER DRAIN THROUGH POWERED DOWN PERIPHERAL FIGURE 3. DISABLED RECEIVERS PREVENT POWER DRAIN
5
ICL3310E
SHDN PWR MGT LOGIC
that the transmitters enable only when the magnitude of the supplies exceed approximately 3V.
5V/DIV ICL3310E
SHDN T1
I/O UART CPU
2V/DIV
T2 VCC = +3.3V C1 - C4 = 0.1F
FIGURE 4. CONNECTIONS FOR MANUAL POWERDOWN
TIME (20s/DIV)
FIGURE 5. TRANSMITTER OUTPUTS WHEN EXITING POWERDOWN
Capacitor Selection
The charge pumps require 0.1F or greater capacitors for operation with 3.3V VCC 5.5V. Increasing the capacitor values (by a factor of 2) reduces ripple on the transmitter outputs and slightly reduces power consumption. C2, C3, and C4 can be increased without increasing C1's value, however, do not increase C1 without also increasing C2, C3, and C4 to maintain the proper ratios (C1 to the other capacitors). When using minimum required capacitor values, make sure that capacitor values do not degrade excessively with temperature. If in doubt, use capacitors with a larger nominal value. The capacitor's equivalent series resistance (ESR) usually rises at low temperatures and it influences the amount of ripple on V+ and V-.
High Data Rates
The ICL3310E maintains the RS-232 5V minimum transmitter output voltages even at high data rates. Figure 6 details a transmitter loopback test circuit, and Figure 7 illustrates the loopback test result at 120kbps. For this test, all transmitters were simultaneously driving RS-232 loads in parallel with 1000pF, at 120kbps. Figure 8 shows the loopback results for a single transmitter driving 1000pF and an RS-232 load at 250kbps. The static transmitter was also loaded with an RS-232 receiver.
VCC 0.1F +
Operation Down to 2.7V
ISL3310E transmitter outputs meet RS-562 levels (3.7V), at the full data rate, with VCC as low as 2.7V. RS-562 levels typically ensure interoperability with RS-232 devices.
+ C1
C1+ C1-
VCC
V+
+ C3
+ C2
ICL3310E C2+ C2TIN ROUT TOUT
V-
C4 +
Power Supply Decoupling
In most circumstances a 0.1F bypass capacitor is adequate. In applications that are particularly sensitive to power supply noise, decouple VCC to ground with a capacitor of the same value as the charge-pump capacitor C1. Connect the bypass capacitor as close as possible to the IC.
RIN 5K
1000pF
VCC
SHDN
Transmitter Outputs when Exiting Powerdown
Figure 5 shows the response of two transmitter outputs when exiting powerdown mode. As they activate, the two transmitter outputs properly go to opposite RS-232 levels, with no glitching, ringing, nor undesirable transients. Each transmitter is loaded with 3k in parallel with 2500pF. Note
FIGURE 6. TRANSMITTER LOOPBACK TEST CIRCUIT
6
ICL3310E
5V/DIV T1IN
15kV ESD Protection
All pins on ICL3310 devices include ESD protection structures, but the ICL3310E incorporates advanced structures which allow the RS-232 pins (transmitter outputs and receiver inputs) to survive ESD events up to 15kV. The RS-232 pins are particularly vulnerable to ESD damage because they typically connect to an exposed port on the exterior of the finished product. Simply touching the port pins, or connecting a cable, can cause an ESD event that might destroy unprotected ICs. These new ESD structures protect the device whether or not it is powered up, protect without allowing any latchup mechanism to activate, and don't interfere with RS-232 signals as large as 25V.
5s/DIV
T1OUT
R1OUT VCC = +3.3V C1 - C4 = 0.1F
Human Body Model (HBM) Testing
As the name implies, this test method emulates the ESD event delivered to an IC during human handling. The tester delivers the charge through a 1.5k current limiting resistor, making the test less severe than the IEC61000 test which utilizes a 330 limiting resistor. The HBM method determines an ICs ability to withstand the ESD transients typically present during handling and manufacturing. Due to the random nature of these events, each pin is tested with respect to all other pins. The RS-232 pins on "E" family devices can withstand HBM ESD events to 15kV.
FIGURE 7. LOOPBACK TEST AT 120kbps
5V/DIV T1IN
T1OUT
R1OUT VCC = +3.3V C1 - C4 = 0.1F 2s/DIV
IEC61000-4-2 Testing
The IEC61000 test method applies to finished equipment, rather than to an individual IC. Therefore, the pins most likely to suffer an ESD event are those that are exposed to the outside world (the RS-232 pins in this case), and the IC is tested in its typical application configuration (power applied) rather than testing each pin-to-pin combination. The lower current limiting resistor coupled with the larger charge storage capacitor yields a test that is much more severe than the HBM test. The extra ESD protection built into this device's RS-232 pins allows the design of equipment meeting level 4 criteria without the need for additional board level protection on the RS-232 port. AIR-GAP DISCHARGE TEST METHOD For this test method, a charged probe tip moves toward the IC pin until the voltage arcs to it. The current waveform delivered to the IC pin depends on approach speed, humidity, temperature, etc., so it is difficult to obtain repeatable results. The "E" device RS-232 pins withstand 15kV air-gap discharges. CONTACT DISCHARGE TEST METHOD During the contact discharge test, the probe contacts the tested pin before the probe tip is energized, thereby eliminating the variables associated with the air-gap discharge. The result is a more repeatable and predictable test, but equipment limits prevent testing devices at voltages higher than 8kV. All "E" family devices survive 8kV contact discharges on the RS-232 pins.
FIGURE 8. LOOPBACK TEST AT 250kbps
Interconnection with 3V and 5V Logic
The ICL3310E directly interfaces with 5V CMOS and TTL logic families. Nevertheless, with the device at 3.3V, and the logic supply at 5V, AC, HC, and CD4000 outputs can drive ICL3310E inputs, but ICL3310E outputs do not reach the minimum VIH for these logic families. See Table 4 for more information.
TABLE 3. LOGIC FAMILY COMPATIBILITY WITH VARIOUS SUPPLY VOLTAGES VCC SYSTEM POWER-SUPPLY SUPPLY VOLTAGE VOLTAGE (V) (V) 3.3 5 5 3.3 5 3.3
COMPATIBILITY Compatible with all CMOS families. Compatible with all TTL and CMOS logic families. Compatible with ACT and HCT CMOS, and with TTL. ICL3310E outputs are incompatible with AC, HC, and CD4000 CMOS inputs.
7
ICL3310E Typical Performance Curves
6.0 TRANSMITTER OUTPUT VOLTAGE (V) 4.0 2.0 0 -2.0 -4.0 -6.0 VOUT 5 VOUT+ 20 1 TRANSMITTER AT 250kbps 1 TRANSMITTER AT 30kbps SLEW RATE (V/s)
VCC = 3.3V, TA = 25C
25
15 -SLEW +SLEW 10
0
1000
2000
3000
4000
5000
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
LOAD CAPACITANCE (pF)
FIGURE 9. TRANSMITTER OUTPUT VOLTAGE vs LOAD CAPACITANCE
FIGURE 10. SLEW RATE vs LOAD CAPACITANCE
45 40 SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) 35 30 25 20 15 10 5 0 0 1000 2000 3000 4000 5000 20kbps 120kbps 250kbps
3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 2.5
NO LOAD ALL OUTPUTS STATIC
3.0
3.5
4.0
4.5
5.0
5.5
6.0
LOAD CAPACITANCE (pF)
SUPPLY VOLTAGE (V)
FIGURE 11. SUPPLY CURRENT vs LOAD CAPACITANCE WHEN TRANSMITTING DATA
FIGURE 12. SUPPLY CURRENT vs SUPPLY VOLTAGE
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP) GND TRANSISTOR COUNT 338 PROCESS Si Gate CMOS
8
ICL3310E Small Outline Plastic Packages (SOIC)
N INDEX AREA H E -B1 2 3 SEATING PLANE -AD -CA h x 45o 0.25(0.010) M BM
M18.3 (JEDEC MS-013-AB ISSUE C)
18 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A MIN 0.0926 0.0040 0.013 0.0091 0.4469 0.2914 MAX 0.1043 0.0118 0.0200 0.0125 0.4625 0.2992 MILLIMETERS MIN 2.35 0.10 0.33 0.23 11.35 7.40 MAX 2.65 0.30 0.51 0.32 11.75 7.60 NOTES 9 3 4 5 6 7 8o Rev. 0 12/93
L
A1 B C D E e
C

A1 0.10(0.004)
e
B 0.25(0.010) M C AM BS
0.050 BSC 0.394 0.010 0.016 18 0o 8o 0.419 0.029 0.050
1.27 BSC 10.00 0.25 0.40 18 0o 10.65 0.75 1.27
H h L N
NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width "B", as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
9
ICL3310E Shrink Small Outline Plastic Packages (SSOP)
N INDEX AREA E -B1 2 3 0.25 0.010 L GAUGE PLANE H 0.25(0.010) M BM
M20.209 (JEDEC MO-150-AE ISSUE B)
20 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A A1 A2 B C D
-C-
MILLIMETERS MIN 1.73 0.05 1.68 0.25 0.09 7.07 5.20' MAX 1.99 0.21 1.78 0.38 0.20' 7.33 5.38 3 4 9 NOTES
MIN 0.068 0.002 0.066 0.010' 0.004 0.278 0.205
MAX 0.078 0.008' 0.070' 0.015 0.008 0.289 0.212
SEATING PLANE -AD A
A1 0.10(0.004) A2 C
E e H L N
e
B 0.25(0.010) M C AM BS
0.026 BSC 0.301 0.025 20 0 deg. 8 deg. 0.311 0.037
0.65 BSC 7.65 0.63 20 0 deg. 8 deg. Rev. 3 11/02 7.90' 0.95 6 7
NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension "B" does not include dambar protrusion. Allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of "B" dimension at maximum material condition. 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 10

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