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(R)
FAST CMOS OCTAL TRANSCEIVER/REGISTER
IDT54/74FCT646 IDT54/74FCT646A IDT54/74FCT646C
Integrated Device Technology, Inc.
FEATURES:
* * * * * * * * * * IDT54/74FCT646 equivalent to FASTTM speed; IDT54/74FCT646A 30% faster than FAST IDT54/74FCT646C 40% faster than FAST Independent registers for A and B buses Multiplexed real-time and stored data IOL = 64mA (commercial) and 48mA (military) CMOS power levels (1mW typical static) TTL input and output level compatible CMOS output level compatible Available in 24-pin (300 mil) CERDIP, plastic DIP, SOIC, CERPACK and 28-pin LCC * Product available in Radiation Tolerant and Radiation Enhanced Versions * Military product compliant to MIL-STD-883, Class B
DESCRIPTION:
The IDT54/74FCT646/A/C consists of a bus transceiver with 3-state D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. The IDT54/74FCT646/A/C utilizes the enable control (G) and direction (DIR) pins to control the transceiver functions. SAB and SBA control pins are provided to select either real time or stored data transfer. The circuitry used for select control will eliminate the typical decoding glitch that occurs in a multiplexer during the transition between stored and realtime data. A LOW input level selects real-time data and a HIGH selects stored data. Data on the A or B data bus or both can be stored in the internal D flip flops by LOW-to-HIGH transitions at the appropriate clock pins (CPAB or CPBA) regardless of the select or enable control pins.
FUNCTIONAL BLOCK DIAGRAM
G
DIR CPBA SBA CPAB SAB
1 OF 8 CHANNELS
B REG 1D C1
A1
A REG 1D C1
B1
TO 7 OTHER CHANNELS
2536 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc. FAST is a registered trademark of National Semiconductor Co.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
(c)1992 Integrated Device Technology, Inc.
MAY 1992
DSC-4626/2
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IDT54/74FCT646/A/C FAST CMOS OCTAL TRANSCEIVER/REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
INDEX
12
13
A7 A8 GND NC B8 B7 B6
CPAB SAB DIR A1 A2 A3 A4 A5 A6 A7 A8 GND
1 2 3 4 5 6 7 8 9 10 11
24 23 22
P24-1, D24-1, S024-2 & E24-1
21 20 19 18 17 16 15 14
Vcc CPBA SBA G B1 B2 B3 B4 B5 B6 B7 B8
DIR SAB CPAB NC Vcc CPBA SBA
4 3 2 1 28 27 26 25 24 23 5 6 7 8 9 10
A1 A2 A3 NC A4 A5 A6
L28-1
22 21 20
11 19 12 13 14 15 16 17 18
G B1 B2 NC B3 B4 B5
2536 drw 02
DIP/SOIC/CERPACK TOP VIEW
LCC TOP VIEW
PIN DESCRIPTION
Pin Names A1-A8 B1-B8 CPAB, CPBA SAB, SBA DIR, G Description Data Register A Inputs Data Register B Outputs Data Register B Inputs Data Register A Outputs Clock Pulse Inputs Output Data Source Select Inputs Output Enable Inputs
2536 tbl 01
LOGIC SYMBOL
CPAB SAB DIR CPBA SBA G
A1 A2 A3 A4 A5 A6 A7 A8
B1 B2 B3 B4 B5 B6 B7 B8
2536 drw 06
FUNCTION TABLE(2)
G
H H L L L L
Inputs DIR X X L L H H CPAB H or L X X X H or L CPBA H or L X H or L X X SAB X X X X L H SBA X X L H X X
Data I/O(1) A1-A8 Input Output Input B1-B8 Input Input Output
Operation or Function IDT54/74FCT646 Isolation Store A and B Data Real-Time B Data to A Bus Stored B Data to A Bus Real-Time A Data to B Bus Stored A Data to B Bus
NOTES: 2536 tbl 02 1. The data output functions may be enabled or disabled by various signals at the G or DIR inputs. Data input functions are always enabled, i.e., data at the bus pins will be stored on every LOW-to-HIGH transition on the clock inputs. 2. H = HIGH, L = LOW, X = Don't Care, = LOW-to-HIGH Transition.
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IDT54/74FCT646/A/C FAST CMOS OCTAL TRANSCEIVER/REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
BUS A
BUS B
BUS A
BUS B
DIR L
G L
CPAB X
CPBA X
SAB X
SBA L
DIR H
G L
CPAB X
CPBA X
SAB L
SBA X
2536 drw 03
REAL-TIME TRANSFER BUS B TO BUS A
REAL-TIME TRANSFER BUS A TO BUS B
BUS A
BUS B
BUS A
BUS B
DIR H L X
G L L H
CPAB X
CPBA X
SAB X X X
SBA X X X
DIR L H
(1)
G L L
CPAB X H or L
CPBA H or L X
SAB X H
SBA H X
2536 drw 04
STORAGE FROM A AND/OR B
NOTE: 1. Cannot transfer data to A bus and B bus simultaneously.
TRANSFER STORED DATA TO A AND/OR B
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IDT54/74FCT646/A/C FAST CMOS OCTAL TRANSCEIVER/REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Rating VTERM(2) Terminal Voltage with Respect to GND VTERM(3) Terminal Voltage with Respect to GND TA Operating Temperature TBIAS Temperature Under Bias TSTG Storage Temperature PT Power Dissipation IOUT DC Output Current Commercial Military Unit -0.5 to +7.0 -0.5 to +7.0 V
CAPACITANCE (TA = +25C, f = 1.0MHz)
Symbol CIN CI/O Parameter(1) Input Capacitance I/O Capacitance Conditions VIN = 0V VOUT = 0V Typ. Max. Unit 6 8 10 12 pF pF
tbl 04
-0.5 to VCC
-0.5 to VCC
V
NOTE: 2536 1. This parameter is measured at characterization but not tested.
0 to +70 -55 to +125 -55 to +125 0.5 120
-55 to +125 -65 to +135 -65 to +150 0.5 120
C C C W mA
NOTES: 2536 tbl 03 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed VCC by +0.5V unless otherwise noted. 2. Inputs and VCC terminals only. 3. Outputs and I/O terminals only.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: VLC = 0.2V; VHC = VCC - 0.2V Commercial: TA = 0C to +70C, VCC = 5.0V 5%; Military: TA = -55C to +125C, VCC = 5.0V 10%
Symbol VIH VIL IIH IIL IIH IIL VIK IOS VOH Parameter Input HIGH Level Input LOW Level Input HIGH Current (Except I/O pins) Input LOW Current (Except I/O pins) Input HIGH Current (I/O pins only) Input LOW Current (I/O pins only) Clamp Diode Voltage Short Circuit Current Output HIGH Voltage Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VI = VCC VI = 2.7V VI = 0.5V VI = GND VCC = Max. VI = VCC VI = 2.7V VI = 0.5V VI = GND VCC = Min., IN = -18mA VCC = Max.(3), VO = GND VCC = 3V, VIN = VLC or VHC, IOH = -32A IOH = -300A VCC = Min. IOH = -12mA MIL. VIN = VIH or VIL IOH = -15mA COM'L. VCC = 3V, VIN = VLC or VHC, IOL = 300A IOL = 300A VCC = Min. VIN = VIH or VIL IOL = 48mA MIL. IOL = 64mA COM'L. Min. 2.0 -- -- -- -- -- -- -- -- -- -- -60 VHC VHC 2.4 2.4 -- -- -- -- Typ.(2) -- -- -- -- -- -- -- -- -- -- -0.7 -120 VCC VCC 4.0 4.0 GND GND 0.3 0.3 Max. -- 0.8 5 5(4) -5(4) -5 15 15(4) -15(4) -15 -1.2 -- -- -- -- -- VLC VLC(4) 0.55 0.55 Unit V V A
A
V mA V
VOL
Output LOW Voltage
V
NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second. 4. This parameter is guaranteed but not tested.
2536 tbl 05
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IDT54/74FCT646/A/C FAST CMOS OCTAL TRANSCEIVER/REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
VLC = 0.2V; VHC = VCC - 0.2V
Symbol ICC ICC ICCD Parameter Quiescent Power Supply Current Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current(4) Test Conditions(1) VCC = Max. VIN VHC; VIN VLC VCC = Max. VIN = 3.4V(3) VCC = Max. Outputs Open G = DIR = GND One Input Toggling 50% Duty Cycle VCC = Max. Outputs Open fCP = 10MHz 50% Duty Cycle G = DIR = GND One Bit Toggling at fi = 5MHz 50% Duty Cycle VCC = Max. Outputs Open fCP = 10MHz 50% Duty Cycle G = DIR = GND Eight Bits Toggling at fi = 5MHz 50% Duty Cycle VIN VHC VIN VLC Min. -- -- -- Typ.(2) 0.2 0.5 0.15 Max. 1.5 2.0 0.25 Unit mA mA mA/MHz
IC
Total Power Supply Current(6)
VIN VHC VIN VLC (FCT) VIN = 3.4V VIN = GND
--
1.7
4.0
mA
--
2.2
6.0
VIN VHC VIN VLC (FCT) VIN = 3.4V VIN = GND
--
7.0
12.8(5)
--
9.2
21.8(5)
NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Per TTL driven input (VIN = 3.4V); all other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCP/2 + fiNi) ICC = Quiescent Current ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Output Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fi = Input Frequency Ni = Number of Inputs at fi All currents are in milliamps and all frequencies are in megahertz.
2536 tbl 06
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IDT54/74FCT646/A/C FAST CMOS OCTAL TRANSCEIVER/REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
54/74FCT646 Com'l. Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tPLH tPHL tPLH tPHL tSU Parameter Propagation Delay Bus to Bus Output Enable Time G, DIR to Bus Output Disable Time G, DIR to Bus Propagation Delay Clock to Bus Propagation Delay SBA or SAB to Bus Set-up Time HIGH or LOW Bus to Clock Hold Time HIGH or LOW Bus to Clock Clock Pulse Width HIGH or LOW Condition
(1)
54/74FCT646A Com'l.
(2)
54/74FCT646C Com'l.
Min.
(2)
Mil.
(2)
Mil.
(2)
Mil.
(2)
Min.
(2)
Max. Min.
Max. Min.
Max. Min.
Max.
Max. Min.
Max. Unit
CL = 50 pF RL = 500
2.0
9.0
2.0
11.0
2.0
6.3
2.0
7.7
1.5
5.4
1.5
6.0
ns
2.0
14.0
2.0
15.0
2.0
9.8
2.0
10.5
1.5
7.8
1.5
8.9
ns
2.0
9.0
2.0
11.0
2.0
6.3
2.0
7.7
1.5
6.3
1.5
7.7
ns
2.0
9.0
2.0
10.0
2.0
6.3
2.0
7.0
1.5
5.7
1.5
6.3
ns
2.0
11.0
2.0
12.0
2.0
7.7
2.0
8.4
1.5
6.2
1.5
7.0
ns
4.0
--
4.5
--
2.0
--
2.0
--
2.0
--
2.0
--
ns
tH
2.0
--
2.0
--
1.5
--
1.5
--
1.5
--
1.5
--
ns
tW
6.0
--
6.0
--
5.0
--
5.0
--
5.0
--
5.0
--
ns
NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays.
2536 tbl 07
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IDT54/74FCT646/A/C FAST CMOS OCTAL TRANSCEIVER/REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS TEST CIRCUITS FOR ALL OUTPUTS
VCC 500 VIN Pulse Generator RT D.U.T. 50pF CL 500 V OUT 7.0V
SWITCH POSITION
Test Open Drain Disable Low Enable Low All Other Tests Switch Closed Open
DEFINITIONS: 2536 tbl 08 CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
SET-UP, HOLD AND RELEASE TIMES
DATA INPUT t SU TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. t REM 3V 1.5V 0V 3V 1.5V 0V tH 3V 1.5V 0V 3V 1.5V 0V
PULSE WIDTH
LOW-HIGH-LOW PULSE tW HIGH-LOW-HIGH PULSE
1.5V
1.5V
t SU
tH
PROPAGATION DELAY
3V 1.5V tPLH OUTPUT t PLH OPPOSITE PHASE INPUT TRANSITION tPHL 3V 1.5V 0V t PHL 0V VOH 1.5V VOL
ENABLE AND DISABLE TIMES
ENABLE CONTROL INPUT t PZL OUTPUT NORMALLY SWITCH LOW CLOSED t PZH OUTPUT SWITCH NORMALLY OPEN HIGH 3.5V 1.5V 0.3V t PHZ 0.3V 1.5V 0V V OH 0V t PLZ DISABLE 3V 1.5V 0V 3.5V V OL
SAME PHASE INPUT TRANSITION
NOTES 2536 drw 07 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2. Pulse Generator for All Pulses: Rate 1.0 MHz; ZO 50; tF 2.5ns; tR 2.5ns.
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IDT54/74FCT646/A/C FAST CMOS OCTAL TRANSCEIVER/REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT XX Temperature Range FCT XXXX Device Type XX Package X Process/ Temperature Range Blank B P D SO L E 646 646A 646C 54 75 Commercial MIL-STD-883, Class B Plastic DIP CERDIP Small Outline IC Leadless Chip Carrier CERPACK Non-inverting Octal Transceiver/Register Fast Non-inverting Octal Transceiver/Register Super Fast Non-inverting Octal Transceiver/Register -55C to +125C 0C to +70C
2536 drw 05
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