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| PMC-Sierra,Inc. PM4388 TOCTL * Available in a rectangular 128-pin PQFP 14 by 20 mm package. in-band line loopback and per-channel loopback code sequences. Allows insertion of a datalink in ESF mode via the microprocessor port. Provides 128 bytes of datalink message storage per datalink. Supports transmission of the AIS or the yellow alarm signal in both SF and ESF formats. Provides a digital PLL for generation of a low jitter transmit clock. Provides a FIFO buffer for jitter attenuation and transmit rate conversion. FIFO full or empty indication allows for bit-stuffing in higher rate multiplexing applications. Octal T1 Framer FEATURES * Monolithic single-chip device that integrates eight datacom T1 framers and transmitters for terminating duplex DS1 signals. * Supports DS1 signals in SF, ESF, or unframed modes. * Provides ESF bit-oriented code detection/generation, and an HDLC interface for terminating/generating the ESF datalink. * Supports transfer of PCM data to/from 1.544 Mbit/s or 2.048 Mbit/s backplane buses. Supports fractional T1 backplane interface with asymmetric transmit/receive n DS0 rates. * Supports robbed-bit signaling extraction and insertion on a per-DS0 basis. * Provides programmable idle code substitution and data inversion on a per-channel basis. * Provides per-DS0 line loopback and per-link diagnostic and line loopbacks. * Provides trunk conditioning which forces programmable trouble code substitution on all/selected channels. * Supports a Pseudo Random Binary Sequence (PRBS) generator and detector which may be configured for insertion/detection on a n DS0 basis. * Supports a 1-second polling interval for access to T1 performance monitoring and HDLC datalinks. * Pin-compatible to the PM6388 EOCTL Octal E1 Framer. * Software-compatible with the PM4341A T1XC Single T1 Transceiver, the PM4344 TQUAD Quad T1 Framer, the PM6388 EOCTL Octal E1 Framer and the PM4351 COMET Single T1/E1 Transceiver. * Seamless interface to the PM7364 FREEDM-32 HDLC controller, the PM7366 FREEDM-8 HDLC controller, the PM8313 D3MX single-chip M13 multiplexer, and the PM4314 QDSX quad line interface unit. * Provides an 8-bit microprocessor bus interface for configuration, control, and status monitoring. * Low power 3.3V CMOS technology with 5 V tolerant inputs. * Supports standard 5-signal P1149.1 JTAG boundary scan. PMC-960615 (R6) RECEIVE SECTION * Accepts gapped data streams to support higher rate demultiplexing. * Provides red, yellow, and Alarm Indication Signal (AIS) alarm detection. * Supports Line and Path performance monitoring according to AT&T and ANSI specifications. Accumulators are provided for counting ESF CRC-6 errors, Framing bit errors and Loss Of Frame (LOF) or change of frame alignment events. * Extracts the ESF datalink, provides 128 bytes of FIFO buffering per datalink. * Provides a 2-frame buffer for jitter and wander attenuation. * * * * APPLICATIONS * High-Density Internet T1 Interfaces for Multiplexers, Switches, Routers, and Digital Modems * Frame Relay Switches and Access Devices (FRADS) * T1 Performance Monitoring * SONET/SDH Add/Drop Multiplexers (ADMs) TRANSMIT SECTION * Provides per-channel minimum ones density through Bell (bit 7), GTE, DDS, or "jammed bit 8" (56 Kbit/s) zero code suppression. * Allows insertion of framed or unframed BLOCK DIAGRAM Transmitter CTCLK1* CECLK* CEFP* ECLK[1:8]/EFP[1:8]/ESIG[1:8] ED[1:8] EIF Egress Interface TPSC Per-DS0 Controller XBAS Basic Transmitter: Frame Generation, Alarm Insertion, Signalling Insertion, Trunk Conditioning TOPS Timing Options TJAT Digital Jitter Attenuator TCLK[1:8] TLD[1:8] PRGD Pattern Generator/ Detector TDPR HDLC Transmitter XBOC Bit-oriented Code Generator XBIC In-band Loopback Code Generator FRAM Framer/ Elastic Store RAM FRMR Framer: Frame Alignment, Alarm Detection RJAT Digital Jitter Attenuator XCLK* Receiver ELST Elastic Store CICLK* CIFP* ID[1:8] ICLK[1:8]/ISIG[1:8] IFP[1:8] IIF Ingress Interface RPSC Per-DS0 Controller SIGX Signalling Extractor RLCLK[1:8] RLD[1:8] A[10:0]* RDB* WRB* CSB* ALE* INTB* RSTB* D(7:0)* MPIF Microprocessor Interface RBOC Bit-oriented Code Generator RDLC HDLC Receiver ALMI Alarm Integrator PMON Performance Monitor Counters IBCD In-band Loopback Code Generator JTAG Test Access Port TDO TDI TCLK TMS TRSTB * These signals are shared between all eight framers. a 1998 PMC-Sierra, Inc. October, 1998 PM4388 TOCTL Octal T1 Framer TYPICAL APPLICATIONS EIGHT-CHANNEL T1/E1 PORT CARD ADAPTER USING PIN-COMPATIBLE TOCTL AND EOCTL 4 PM4314 QDSX QUAD LIU PM4388 TOCTL Octal T1 Framer PM7366 FREEDM-8TM Frame Engine and Datalink Manager Processor 4 PM4314 QDSX Quad T1/E1 LIU PM6388 EOCTL Octal E1 Framer Packet Memory PCI Bus CHANNELIZED DS3 INTERFACE PM4388 TOCTL Octal T1 Framer PM4388 TOCTL Octal T1 Framer PM4388 TOCTL Octal T1 Framer PM4388 TOCTL Octal T1 Framer PCI Bus Processor PM7364 FREEDM-32TM Frame Engine and Datalink Manager DS3 LIU PM8313 D3MX M13 Mux/Demux Packet Memory Head Office: PMC-Sierra, Inc. #105 - 8555 Baxter Place Burnaby, B.C. V5A 4V7 Canada Tel: 604.415.6000 Fax: 604.415.6200 To order documentation, send email to: document@pmc-sierra.com or contact the head office, Attn: Document Coordinator All product documentation is available on our web site at: http://www.pmc-sierra.com For corporate information, send email to: info@pmc-sierra.com PMC-960615 (R6) a 1998 PMC-Sierra, Inc. October, 1998 FREEDM-8 and FREEDM-32 are trademarks of PMC-Sierra, Inc. |
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