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| (R) ESDA25DB3 TRANSIL ARRAY FOR ESD PROTECTION Application Specific Discretes A.S.D.TM APPLICATIONS Where transient overvoltage protection in esd sensitive equipment is required, such as : - COMPUTERS - PRINTERS - COMMUNICATION SYSTEMS It is particulary recommended for RS232 I/O port protection where the line interface withstands 2 kV, ESD surges. FEATURES 18 BIDIRECTIONAL TRANSIL FUNCTIONS LOW CAPACITANCE : C = 30pF @ VRM 500 W peak pulse power (8/20 s) s s s SO-20 FUNCTIONAL DIAGRAM DESCRIPTION The ESDA25DB3 is a dual monolithic voltage suppressor designed to protect components which are connected to data and transmission lines against ESD. BENEFITS High ESD protection level : up to 25 kV High integration Suitable for high density boards COMPLIES WITH THE FOLLOWING STANDARDS : IEC 1000-4-2 : level 4 MIL STD 883C-Method 3015-6 : class 3 (human body model) I 1 O 2 August 2001 - Ed : 2 1/5 ESDA25DB3 ABSOLUTE MAXIMUM RATINGS (Tamb = 25C) Symbol VPP PPP Tstg Tj TL Parameter Electrostatic discharge MIL STD 883C - Method 3015-6 Peak pulse power (8/20s) Storage temperature range Maximum junction temperature Maximum lead temperature for soldering during 10s Value 25 500 - 55 to + 150 125 260 Unit kV W C C C ELECTRICAL CHARACTERISTICS (Tamb = 25C) Symbol VRM VBR VCL IRM IPP Parameter Stand-off voltage Breakdown voltage Clamping voltage Leakage current Peak pulse current Voltage temperature coefficient Capacitance T C Types min. note1 V ESDA25DB3 25 VBR @ IR IRM max. note1 @ VRM Rd typ. note 2 T max. note 3 10-4/C 9.7 C typ. 0V bias pF 50 max. V 30 mA 1 A 2 V 24 0.5 note 1 : Betwenn any I/O pin Groung note 2 : Square pulse, Ipp = 25A, tp=2.5s. note 3 : VBR = T* (Tamb -25C) * VBR (25C) 2/5 ESDA25DB3 CALCULATION OF THE CLAMPING VOLTAGE USE OF THE DYNAMIC RESISTANCE The ESDA family has been designed to clamp fast spikes like ESD. Generally the PCB designers need to calculate easily the clamping voltage VCL. This is why we give the dynamic resistance in addition to the classical parameters. The voltage across the protection cell can be calculated with the following formula: VCL = VBR + Rd IPP Where Ipp is the peak current through the ESDA cell. DYNAMIC RESISTANCE MEASUREMENT The short duration of the ESD has led us to prefer a more adapted test wave, as below defined, to the classical 8/20s and 10/1000s surges. I Ipp As the value of the dynamic resistance remains stable for a surge duration lower than 20s, the 2.5s rectangular surge is well adapted. In addition both rise and fall times are optimized to avoid any parasitic phenomenon during the measurement of Rd. 2s tp = 2.5s t 2.5s duration measurement wave. 3/5 ESDA25DB3 Fig. 1 : Peak power dissipation versus initial junction tempearature. Ppp[Tj initial]/Ppp[Tj initial=25C] 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 5000 Fig. 2 : Peak pulse power versus exponential pulse duration (Tj initial = 25 C). Ppp(W) 1000 Tj initial(C) 100 tp(s) 0 25 50 75 100 125 150 1 10 100 Fig. 3 : Clamping voltage versus peak pulse current (Tj initial = 25 C). Rectangular waveform tp = 2.5 s. Ipp(A) 50.0 tp=2.5s Fig. 4 : Capacitance versus reverse applied voltage (typical values). C(pF) 100 F=1MHz Vosc=30mV 10.0 50 1.0 20 VCL(V) 0.1 20 25 30 35 40 45 50 55 60 VR(V) 10 1 2 5 10 30 Fig. 5 : Relative variation of leakage current versus junction temperature (typical values). IR[Tj] / IR[Tj=25C] 200 100 10 Tj(C) 1 25 50 75 100 125 4/5 ESDA25DB3 ORDER CODE ESDA ESD Array VBR min 25 D B 3 RL Packaging: RL = Tape & reel = Tube Package SO-20 Bidirectionel PACKAGE MECHANICAL DATA SO-20 Plastic DIMENSIONS REF. D hx45 Millimetres Min. Typ. Max. 2.65 0.10 0.33 0.23 12.6 7.40 1.27 10.0 0.50 0.50 1.27 0.020 8 (max) 10.65 0.394 0.20 0.004 0.51 0.013 0.32 0.009 13.0 0.484 7.60 0.291 Min. Inches Typ. Max. 0.104 0.008 0.020 0.013 0.512 0.299 0.050 0.419 0.020 0.050 A B e A1 K L A C A1 B C D E e H h L K E H Marking: Logo, Date Code, E25DB3 Packaging: Preferred packaging is tape and reel. Weight: 0.55g. Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 2001 STMicroelectronics - Printed in Italy - All rights reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 5/5 |
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