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HB56E836 Series, HB56E436 Series
8388608-word x 36-bit High Density Dynamic RAM Module 4194304-word x 36-bit High Density Dynamic RAM Module
ADE-203-673 (Z) Preliminary Rev. 0.0 Oct. 18, 1996 Description
The HB56E836 Series is a 8 M x 36 Dynamic RAM Module, mounted 16 pieces of 16-Mbit DRAM (HM5117405) sealed in SOJ package and 8 piece of of 4-Mbit DRAM (HM514105) sealed in SOJ package. The HB56E436 Series is a 4 M x 36 Dynamic RAM Module, mounted 8 pieces of 16-Mbit DRAM (HM5117405) sealed in SOJ package and 4 piece of of 4-Mbit DRAM (HM514105) sealed in SOJ package. The HB56E836 Series, HB56E436 Series offer Extended Data Out (EDO) Page Mode as a high speed access mode. An outline of the HB56E836 Series, HB56E436 Series are 72-pin single in-line package. Therefore, the HB56E836 Series, HB56E436 Series make high density mounting possible without surface mount technology. The HB56E836 Series, HB56E436 Series provide common data inputs and outputs. Decoupling capacitors are mounted beneath each SOJ on the module board.
Features
* 72-pin single in-line package Outline: 107.95 mm (Length) x 31.75/25.4 mm (Height) x 9.14 mm (Thickness) Lead pitch : 1.27 mm * Single 5 V (5%) * High speed Access time: 60 ns/70 ns (max) * Low power dissipation Active mode: 7.25 W/6.62 W (max) (HB56E836 Series) Active mode: 6.93 W/6.30 W (max) (HB56E436 Series) Standby mode: 252 mW (max) (HB56E836 Series) Standby mode: 126 mW (max) (HB56E436 Series) * EDO page mode capability Preliminary: This document contains information on a new product. Specifications and information contained herein are subject to change without notice.
HB56E836 Series, HB56E436 Series
* 2048 refresh cycles: 32 ms * 2 variations of refresh RAS-only refresh CAS-before-RAS refresh * TTL compatible
Ordering Information
Type No. HB56E836BR-6 HB56E836BR-7 HB56E436BR-6 HB56E436BR-7 HB56E836SBR-6 HB56E836SBR-7 HB56E436SBR-6 HB56E436SBR-7 Access time 60 ns 70 ns 60 ns 70 ns 60 ns 70 ns 60 ns 70 ns 72-pin SIP socket type Solder Package 72-pin SIP socket type Contact pad Gold
2
HB56E836 Series, HB56E436 Series
Pin Arrangement
1 pin Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Pin name VSS DQ0 DQ18 DQ1 DQ19 DQ2 DQ20 DQ3 DQ21 VCC NC A0 A1 A2 A3 A4 A5 A6 Pin No. 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
36 pin 37 pin Pin name A10 DQ4 DQ22 DQ5 DQ23 DQ6 DQ24 DQ7 DQ25 A7 NC VCC A8 A9
1
72 pin Pin name DQ17 DQ35 VSS CAS0 CAS2 CAS3 CAS1 RAS0
2
Pin No. 37 38 39 40 41 42 43 44 45 46 47 48 49 50
Pin No. 55 56 57 58 59 60 61 62
Pin name DQ12 DQ30 DQ13 DQ31 VCC DQ32 DQ14 DQ33 DQ15 DQ34 DQ16 NC PD1 PD2 PD3 PD4 NC VSS
RAS1 (NC)* 63 NC WE NC DQ9 DQ27 DQ10 DQ28 DQ11 DQ29 64 65 66 67 68 69 70 71 72
RAS3 (NC)* 51 RAS2 DQ26 DQ8 52 53 54
Notes: 1. RAS3: HB56E836, NC: HB56E436 2. RAS1: HB56E836, NC: HB56E436
3
HB56E836 Series, HB56E436 Series
Pin Description
Pin name A0 to A10 Function Address input Row address Column address Refresh address DQ0 to DQ35 RAS0, to RAS3 CAS0 to CAS3 WE0, WE2 VCC VSS PD1 to PD4 NC Data input/output Row address strobe Column address strobe Read/Write enable Power supply Ground Presence detect pin No connection A0 to A10 A0 to A10 A0 to A10
Presence Detect Pin Arrangement (HB56E836 Series)
HB56E836 Pin No. 67 68 69 70 Pin name PD1 PD2 PD3 PD4 60 ns NC VSS NC NC 70 ns NC VSS VSS NC
Presence Detect Pin Arrangement (HB56E436 Series)
HB56E436 Pin No. 67 68 69 70 Pin name PD1 PD2 PD3 PD4 60 ns VSS NC NC NC 70 ns VSS NC VSS NC
4
HB56E836 Series, HB56E436 Series
Block Diagram (HB56E836)
RAS0 CAS0 DQ0 DQ1 DQ2 DQ3 RAS1 I/O CAS RAS I/O I/O D0 I/O OE I/O CAS RAS I/O I/O D3 I/O OE Din CAS RAS Dout M0 I/O CAS RAS I/O I/O D4 I/O OE I/O CAS RAS I/O I/O D7 I/O OE Din CAS RAS Dout M2 I/O CAS RAS I/O I/O D1 I/O OE I/O CAS RAS I/O I/O D2 I/O OE Din CAS RAS Dout M1 I/O CAS RAS I/O I/O D5 I/O OE I/O CAS RAS I/O I/O D6 I/O OE Din CAS RAS Dout M3 RAS3 I/O CAS RAS I/O I/O D8 I/O OE I/O CAS RAS I/O I/O D11 I/O OE Din CAS RAS Dout M4 I/O CAS RAS I/O I/O D12 I/O OE I/O CAS RAS I/O I/O D15 I/O OE Din CAS RAS Dout M6 D0 - D15, M0 - M7 D0 - D15, M0 - M7 D0 - D15, M0 - M7 C0 - C13 D0 - D15, M0 - M7 I/O CAS RAS I/O I/O D9 I/O OE I/O CAS RAS I/O I/O D10 I/O OE Din CAS RAS Dout M5 I/O CAS RAS I/O I/O D13 I/O OE I/O CAS RAS I/O I/O D14 I/O OE Din CAS RAS Dout M7
DQ4 DQ5 DQ6 DQ7
DQ8 CAS1 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16
DQ17 RAS2 CAS2 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25
DQ26 CAS3 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34
DQ35 A0 - A10 WE Note: D0 - D15 : HM5117405 M0 - M7 : HM514105 VCC VSS
5
HB56E836 Series, HB56E436 Series
Block Diagram (HB56E436)
RAS0 CAS0 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 I/O I/O I/O I/O OE I/O I/O I/O I/O OE CAS RAS D0
CAS RAS D2
DQ8 CAS1 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16
D IN CAS RAS D OUT M0 I/O I/O I/O I/O OE I/O I/O I/O I/O OE CAS RAS D4
CAS RAS D6
DQ17 RAS2 CAS2 DQ18 DQ19 DQ20 DQ21
D IN CAS RAS D OUT M2
I/O I/O I/O I/O OE I/O I/O I/O I/O OE
CAS RAS D1
DQ22 DQ23 DQ24 DQ25
CAS RAS D3
DQ26 CAS3 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34
D IN CAS RAS D OUT M1 I/O I/O I/O I/O OE I/O I/O I/O I/O OE CAS RAS D5
CAS RAS D7
DQ35 A0 - A10 WE Note: D0 - D7 : HM5117405 M0 - M3 : HM514105 V CC V SS
D IN CAS RAS D OUT M3 D0 - D7, M0 - M3 D0 - D7, M0 - M3 C0 - C11 D0 - D7, M0 - M3 D0 - D7, M0 - M3
6
HB56E836 Series, HB56E436 Series
Absolute Maximum Ratings
Parameter Voltage on any pin relative to V SS Supply voltage relative to VSS Short circuit output current Power dissipation Operating temperature Storage temperature Symbol VT VCC Iout PT Topr Tstg Value -1.0 to +7.0 -1.0 to +7.0 50 12 0 to +70 -55 to +125 Unit V V mA W C C
Recommended DC Operating Conditions (Ta = 0 to +70C)
Parameter Supply voltage Symbol VSS VCC Input high voltage Input low voltage Note: VIH VIL Min 0 4.75 2.4 -1.0 Typ 0 5.0 -- -- Max 0 5.25 5.5 0.8 Unit V V V V 1 1 1 Note
1. All voltage referred to VSS .
7
HB56E836 Series, HB56E436 Series
DC Characteristics (Ta = 0 to +70C, VCC = 5 V 5%, VSS = 0 V) (HB56E836)
HB56E836 60 ns Parameter Operating current* , *
1 2
70 ns Max 1380 48 Min -- -- Max 1260 48 Unit Test conditions mA mA t RC = min TTL interface RAS, CAS = VIH Dout = High-Z CMOS interface RAS, CAS VCC - 0.2 V Dout = High-Z t RC = min RAS = VIH, CAS = VIL Dout = enable t RC = min t HPC = min 0 V Vin 7 V 0 V Vin 7 V Dout = disable High Iout = -2 mA Low Iout = 2 mA
Symbol Min I CC1 I CC2 -- --
Standby current
--
24
--
24
mA
RAS-only refresh current*2 Standby current*
1
I CC3 I CC5 I CC6 I CC7 I LI I LO VOH VOL
-- -- -- -- -10 -10 2.4 0
1380 120 1380 1460 10 10 VCC 0.4
-- -- -- -- -10 -10 2.4 0
1260 120 1260 1340 10 10 VCC 0.4
mA mA mA mA A A V V
CAS-before-RAS refresh current EDO page mode current*1, * 3 Input leakage current Output leakage current Output high voltage Output low voltage
Notes : 1. I CC depends on output load condition when the device is selected. ICC max is specified at the output open condition. 2. Address can be changed once or less while RAS = VIL. 3. Address can be changed once or less while CAS = VIH.
8
HB56E836 Series, HB56E436 Series
DC Characteristics (Ta = 0 to +70C, VCC = 5 V 5%, VSS = 0 V) (HB56E436)
HB56E436 60 ns Parameter Operating current* , *
1 2
70 ns Max 1320 24 Min -- -- Max 1200 24 Unit Test conditions mA mA t RC = min TTL interface RAS, CAS = VIH Dout = High-Z CMOS interface RAS, CAS VCC - 0.2 V Dout = High-Z t RC = min RAS = VIH, CAS = VIL Dout = enable t RC = min t HPC = min 0 V Vin 7 V 0 V Vin 7 V Dout = disable High Iout = -2 mA Low Iout = 2 mA
Symbol Min I CC1 I CC2 -- --
Standby current
--
12
--
12
mA
RAS-only refresh current*2 Standby current*
1
I CC3 I CC5 I CC6 I CC7 I LI I LO VOH VOL
-- -- -- -- -10 -10 2.4 0
1320 60 1320 1400 10 10 VCC 0.4
-- -- -- -- -10 -10 2.4 0
1200 60 1200 1280 10 10 VCC 0.4
mA mA mA mA A A V V
CAS-before-RAS refresh current EDO page mode current*1, * 3 Input leakage current Output leakage current Output high voltage Output low voltage
Notes : 1. I CC depends on output load condition when the device is selected. ICC max is specified at the output open condition. 2. Address can be changed once or less while RAS = VIL. 3. Address can be changed once or less while CAS = VIH.
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HB56E836 Series, HB56E436 Series
Capacitance (Ta = 25C, VCC = 5 V 5%) (HB56E836)
Parameter Input capacitance (Address) Input capacitance (WE) Input capacitance (RAS, CAS) Symbol CI1 CI2 CI3 Typ -- -- -- -- -- Max 161 193 62 29 39 Unit pF pF pF pF pF Notes 1 1 1 1, 2 1, 2
I/O capacitance (DQ0 to DQ7, DQ9 to DQ16, CI/O1 DQ18 to DQ25, DQ27 to DQ34) I/O capacitance (DQ8, DQ17, DQ26, DQ35) CI/O2
Notes : 1. Capacitance measured with Boonton Meter or effective capacitance measuring method. 2. CAS = VIH to disable Dout.
Capacitance (Ta = 25C, VCC = 5 V 5%) (HB56E436)
Parameter Input capacitance (Address) Input capacitance (WE) Input capacitance (RAS) Input capacitance (CAS) Symbol CI1 CI2 CI3 CI4 Typ -- -- -- -- Max 88 104 57 36 17 -- 22 Unit pF pF pF pF pF pF Notes 1 1 1 1 1, 2 1, 2
I/O capacitance (DQ0 to DQ7, DQ9 to DQ16, CI/O1 DQ18 to DQ25, DQ27 to DQ34) I/O capacitance (DQ8, DQ17, DQ26, DQ35) CI/O2
Notes : 1. Capacitance measured with Boonton Meter or effective capacitance measuring method. 2. CAS = VIH to disable Dout.
10
HB56E836 Series, HB56E436 Series
AC Characteristics (Ta = 0 to +70C, VCC = 5 V 5%, VSS = 0 V) *1, *2
Test Conditions * * * * * Input rise and fall time: 2 ns Input levels: VIL = 0 V, V IH = 3 V Input timing reference levels: 0.8 V, 2.4 V Output timing reference levels: 0.8 V, 2.0 V Output load: 1 TTL gate + C L (100 pF) (Including scope and jig)
Read, Write, Read-Modify-Write and Refresh Cycles (Common parameters)
HB56E836/HB56E436 60 ns Parameter Random read or write cycle time RAS precharge time CAS precharge time RAS pulse width CAS pulse width Row address setup time Row address hold time Column address setup time Column address hold time RAS to CAS delay time RAS to column address delay time RAS hold time CAS hold time CAS to RAS precharge time CAS delay time from Din Transition time (rise and fall) Symbol Min t RC t RP t CP t RAS t CAS t ASR t RAH t ASC t CAH t RCD t RAD t RSH t CSH t CRP t DZC tT 104 40 10 60 10 0 10 0 10 20 15 15 48 10 0 2 Max -- -- -- 10000 10000 -- -- -- -- 45 30 -- -- -- -- 50 70 ns Min 124 50 13 70 13 0 10 0 13 20 15 18 58 10 0 2 Max -- -- -- 10000 10000 -- -- -- -- 52 35 -- -- -- -- 50 Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 5 3 4 Notes
11
HB56E836 Series, HB56E436 Series
Read Cycle
HB56E836/HB56E436 60 ns Parameter Access time from RAS Access time from CAS Access time from address Read command setup time Read command hold time to CAS Read command hold time from RAS Read command hold time to RAS Column address to RAS lead time Column address to CAS lead time CAS to output in low-Z Output data hold time Output buffer turn-off time CAS to Din delay time Output data hold time from RAS Output buffer turn-off to RAS Output buffer turn-off to WE WE to Din delay time RAS to Din delay time Symbol Min t RAC t CAC t AA t RCS t RCH t RCHR t RRH t RAL t CAL t CLZ t OH t OFF t CDD t OHR t OFR t WEZ t WED t RDD -- -- -- 0 0 60 0 30 18 0 3 -- 15 3 -- -- 15 15 Max 60 15 30 -- -- -- -- -- -- -- -- 15 -- -- 15 15 -- -- 70 ns Min -- -- -- 0 0 70 0 35 23 0 3 -- 18 3 -- -- 18 18 Max 70 18 35 -- -- -- -- -- -- -- -- 15 -- -- 15 15 -- -- Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 11 10 10 Notes 6, 7 7, 8, 15 7, 9, 15
Write Cycle
HB56E836/HB56E436 60 ns Parameter Write command setup time Write command hold time Write command pulse width Data-in setup time Data-in hold time Symbol Min t WCS t WCH t WP t DS t DH 0 10 10 0 10 Max -- -- -- -- -- 70 ns Min 0 13 10 0 13 Max -- -- -- -- -- Unit ns ns ns ns ns 13 13 Notes 12
12
HB56E836 Series, HB56E436 Series
Refresh Cycle
HB56E836/HB56E436 60 ns Parameter CAS setup time (CBR refresh cycle) CAS hold time (CBR refresh cycle) WE setup time (CBR refresh cycle) WE hold time (CBR refresh cycle) RAS precharge to CAS hold time Symbol Min t CSR t CHR t WRP t WRH t RPC 10 10 0 10 10 Max -- -- -- -- -- 70 ns Min 10 10 0 10 10 Max -- -- -- -- -- Unit ns ns ns ns ns Notes
EDO Page Mode Cycle
HB56E836/HB56E436 60 ns Parameter EDO page mode cycle time EDO page mode RAS pulse width Access time from CAS precharge RAS hold time from CAS precharge Output data hold time from CAS low Read command hold time from CAS precharge Symbol Min t HPC t RASP t CPA t CPRH t DOH t RCHC 25 -- -- 35 3 35 Max -- 70 ns Min 30 Max -- Unit ns 14 7, 15 Notes
100000 -- 35 -- -- -- -- 40 3 40
100000 ns 40 -- -- -- ns ns ns ns
7, 15
Refresh
Parameter Refresh period Symbol t REF Max 32 Unit ms Notes 2048 cycles
13
HB56E836 Series, HB56E436 Series
Notes: 1. AC measurements assume t T = 2 ns. 2. An initial pause of 200 s is required after power up followed by a minimum of eight initialization cycles (any combination of cycles containing RAS-only refresh or CAS-before-RAS refresh). 3. Operation with the tRCD (max) limit insures that tRAC (max) can be met, tRCD (max) is specified as a reference point only; if t RCD is greater than the specified tRCD (max) limit, then access time is controlled exclusively by tCAC . 4. Operation with the tRAD (max) limit insures that tRAC (max) can be met, tRAD (max) is specified as a reference point only; if t RAD is greater than the specified tRAD (max) limit, then access time is controlled exclusively by tAA . 5. VIH (min) and VIL (max) are reference levels for measuring timing of input signals. Also, transition times are measured between V IH (min) and VIL (max). 6. Assumes that t RCD tRCD (max) and tRAD tRAD (max). If tRCD or tRAD is greater than the maximum recommended value shown in this table, t RAC exceeds the value shown. 7. Measured with a load circuit equivalent to 1 TTL loads and 100 pF. 8. Assumes that t RCD tRCD (max) and tRCD + tCAC (max) tRAD + tAA (max). 9. Assumes that t RAD tRAD (max) and tRCD + tCAC (max) tRAD + tAA (max). 10. Either t RCH or tRRH must be satisfied for a read cycles. 11. t OFF (max) defines the time at which the outputs achieve the open circuit condition and are not referred to output voltage levels. 12. If tWCS tWCS (min), the cycle is an early write cycle and the data out pin will remain open circuit (high impedance) throughout the entire cycle. 13. These parameters are referred to CAS leading edge in early write cycles. 14. t RASP defines RAS pulse width in EDO page mode cycles. 15. Access time is determined by the longest among t AA , t CAC and t CPA. 16. XXX: H or L (H: VIH (min) VIN VIH (max), L: VIL (min) VIN VIL (max)) ///////: Invalid Dout When the address, clock and input pins are not described on timing waveforms, their pins must be applied VIH or VIL.
14
HB56E836 Series, HB56E436 Series
Timing Waveforms*16
Read Cycle
t RC t RAS
RAS tT t RCD t RSH t CAS t CSH t RP t CRP
CAS t RAD t ASR t RAH t ASC t RAL t CAH
Address
Row
Column t CAL t RCS t RCHR

t RCH WE t RRH t CAC t AA t OFR t CLZ t OFF Dout Dout t RAC t DZC t WEZ t RDD t CDD t WED Din High-Z 15
t OH t OHR
HB56E836 Series, HB56E436 Series
Early Write Cycle
t RC t RAS
RAS tT t RCD t CSH CAS t RSH t CAS
t RP t CRP
t ASR
t RAH
tASC
t CAH
Address
Row
Column t WP t WCS t WCH
WE
t DS
t DH
Din
Din
Dout
High-Z*
* t WCS
t WCS (min)
16
HB56E836 Series, HB56E436 Series
RAS-Only Refresh Cycle
t RC t RAS RAS tT t CRP CAS t RPC t CRP t RP
*
t ASR t RAH Address Row t OFR t OFF Dout High-Z
17
HB56E836 Series, HB56E436 Series
CAS-Before-RAS Refresh Cycle
t RC t RP RAS t RPC CAS t CP WE t WRP t WRH t CP t CSR tT t CHR t RPC t CRP t RAS t RP

Address t OFR t OFF Dout High-Z 18
HB56E836 Series, HB56E436 Series
EDO Page Mode Read Cycle
t RASP t CPRH t RP
RAS tT t CSH t RCD CAS t ASR t RAD t RAH Address Row tASC t CAL t CAH Column 1 t CAL t ASC t CAH Column 2 t ASC t CAL t RAL t CAH Column 3 t CAS t CP t HPC t CAS t CP t RSH t CAS t CRP
t RCS WE
t RCHC
t RRH t RCH
t WEZ t CAC t CAC t RAC t AA t AA t CPA t DOH Dout t DZC t CDD Din High-Z t RDD Dout 1 t CAC t AA t CPA t DOH Dout 2 t OFR
t OH t OHR
t OFF Dout 3 t WED
19
HB56E836 Series, HB56E436 Series
EDO Page Mode Early Write Cycle
t RASP t RP
RAS tT t CSH t RCD t CAS t CP t HPC t CAS t CP t RSH t CAS t CRP
CAS
t ASR
t RAH
t ASC
t CAH
t ASC
t CAH
t ASC
t CAH
Address
Row
Column
Column
Column
t WP t WCS WE t WCH t WCS
t WP t WCH t WCS
t WP t WCH
t DS
t DH
t DS
t DH
t DS
t DH
Din
Din
Din
Din
Dout
High-Z
20
HB56E836 Series, HB56E436 Series
Physical Outline
HB56E836 Series
Unit: mm/inch
107.95 4.25 101.19 3.98 2- 3.175 0.125
A
9.14 Max 0.36
3.17 Min 0.125
R 1.57 R 0.062 1.27 0.05 R 1.57 R 0.062 44.45 1.75 6.35 0.25 1.04 0.041 44.45 1.75
6.35 0.25
2.54 0.10 10.16 0.40 B
2.03 0.08 6.35 0.25
Detail A 60 ns
70 ns
Detail B 2.54 Min. 0.100
1.07 Max. 0.042
0.25 Max. 0.010
31.75 1.25
1.27 Typ 0.05
21
HB56E836 Series, HB56E436 Series
HB56E436 Series Unit: mm/inch
107.95 4.25 101.19 3.98 2- 3.175 0.125
A
9.14 max 0.36 3.17 min 0.125 5.72 min 0.225
R1.57 R0.062
1 72
6.35 0.25
2.03 0.08
6.35 0.25
1
R1.57 R0.062 44.45 1.75
10.16 0.40 B
72
1.27 0.05
6.35 0.25 44.45 1.75
Detail A 60 ns 70 ns
Detail B
2.54 min 0.100 1.07 max 0.042
0.25 max 0.010
22
25.4 1.00
1.27 typ 0.05
HB56E836 Series, HB56E436 Series
When using this document, keep the following in mind: 1. This document may, wholly or partially, be subject to change without notice. 2. All rights are reserved: No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without Hitachi's permission. 3. Hitachi will not be held responsible for any damage to the user that may result from accidents or any other reasons during operation of the user's unit according to this document. 4. Circuitry and other examples described herein are meant merely to indicate the characteristics and performance of Hitachi's semiconductor products. Hitachi assumes no responsibility for any intellectual property claims or other problems that may result from applications based on the examples described herein. 5. No license is granted by implication or otherwise under any patents or other rights of any third party or Hitachi, Ltd. 6. MEDICAL APPLICATIONS: Hitachi's products are not authorized for use in MEDICAL APPLICATIONS without the written consent of the appropriate officer of Hitachi's sales company. Such use includes, but is not limited to, use in life support systems. Buyers of Hitachi's products are requested to notify the relevant Hitachi sales offices when planning to use the products in MEDICAL APPLICATIONS.
Hitachi, Ltd.
Semiconductor & IC Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100, Japan Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109 For further information write to: Hitachi America, Ltd. Semiconductor & IC Div. 2000 Sierra Point Parkway Brisbane, CA. 94005-1835 USA Tel: 415-589-8300 Fax: 415-583-4207
Hitachi Europe GmbH Electronic Components Group Continental Europe Dornacher Strae 3 D-85622 Feldkirchen Munchen Tel: 089-9 91 80-0 Fax: 089-9 29 30 00
Hitachi Europe Ltd. Electronic Components Div. Northern Europe Headquarters Whitebrook Park Lower Cookham Road Maidenhead Berkshire SL6 8YA United Kingdom Tel: 0628-585000 Fax: 0628-778322
Hitachi Asia Pte. Ltd. 16 Collyer Quay #20-00 Hitachi Tower Singapore 0104 Tel: 535-2100 Fax: 535-1533 Hitachi Asia (Hong Kong) Ltd. Unit 706, North Tower, World Finance Centre, Harbour City, Canton Road Tsim Sha Tsui, Kowloon Hong Kong Tel: 27359218 Fax: 27306071
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HB56E836 Series, HB56E436 Series
Revision Record
Rev. Date 0.0 Contents of Modification Drawn by Approved by Oct. 18, 1996 Initial issue
24

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