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(R) KBMFxxSC6 EMI FILTER AND LINE TERMINATION FOR PS/2 MOUSE OR KEYBOARD PORTS A.S.D.TM MAIN APPLICATION EMI Filter and line termination for mouse and keyboard ports on: - Desktop computers - Notebooks - Workstations - Servers DESCRIPTION On the implementation of computer systems, the radiated and conducted EMI should be kept within the required levels as stated by the FCC regulations. In addition to the requirements of EMC compatibility, the computing devices are required to tolerate ESD events and remain operational without user intervention. The KBMF implements a low pass filter to limit EMI levels and provide ESD protection which exceeds IEC 61000-4-2 level 4 standard. The device also implements the pull up resistors needed to bias the data and clock lines. The package is the SOT23-6L which is ideal for situations where board space is at a premium. FEATURES n Integrated low pass filters for Data and Clock lines n Integrated ESD protection n Integrated pull-up resistors n Small package size n Breakdown voltage: VBR = 6V min BENEFITS n n n SOT23-6L FUNCTIONAL DIAGRAM +Vcc Rp Rs Dat In C C Dat Out Gnd +Vcc Rp Rs +Vcc Clk In C C Clk Out EMI / RFI noise suppression ESD protection exceeding IEC61000-4-2 level 4 High flexibility in the design of high density boards Rs code 01 Tolerance 39 10% Rp 4.7k 10% C 120pF 20% TM: ASD and TRANSIL are trademarks of STMicroelectronics. Januaryr 2000 - Ed : 0C 1/8 KBMFxxSC6 COMPLIES WITH THE FOLLOWING ESD STANDARDS: IEC 61000-4-2 (R = 330 C = 150pF), level 4 15 kV (air discharge) 8 kV (contact discharge) MIL STD 883C, Method 3015-6 Class 3 C = 100 pF R = 1500 3 positive strikes and 3 negative strikes (F = 1 Hz) ABSOLUTE MAXIMUM RATINGS (Tamb = 25C) Symbol VPP Tj Tstg TL Top Pr Parameter ESD discharge R = 3309 C = 150pF contact discharge ESD discharge - MIL STD 883 - Method 3015-6 Junction temperature Storage temperature range Lead solder temperature (10 second duration) Operating temperature Range Power rating per resistor Value 12 25 150 - 55 to +150 260 0 to 70 100 Unit kV kV C C C C mW ELECTRICAL CHARACTERISTICS (Tamb = 25C) Symbol IR VBR VF Parameters Diode leakage current Diode breakdown voltage Diode forward voltage drop Test conditions VRM = 5.0V IR = 1mA IF = 50mA 6 0.9 Min Typ Max 10 Unit A V V 2/8 KBMFxxSC6 TECHNICAL INFORMATION EMI FILTERING The KBMFxxSC6 ensure a filtering protection against ElectroMagnetic and RadioFrequency Interferences thanks to its low-pass filter structure. This filter is characterized by the following parameters : - cut-off frequency - Insertion loss - high frequency rejection Fig. A1: Measurements configuration Fig. A2: KBMFxxSC6 attenuation curve Insertion loss (dB) 0 -10 50 TEST BOARD TG OUT KM1 RF IN Vg 50 -20 -30 -40 1 10 F (MHz) 100 1000 ESD PROTECTION The KBMFxxSC6 is particularly optimized to perform ESD protection. ESD protection is based on the use of device which clamps at : Vouput = VBR + Rd .IPP This protection function is splitted in 2 stages. As shown in figure A3, the ESD strikes are clamped by the first stage S1 and then its remaining overvoltage is applied to the second stage through the resistor R. Such a configuration makes the output voltage very low at the Voutput level. Fig. A3: ESD clamping behavior Rg S1 Rs Vinput Voutput S2 Rd Rd VPP Rload VBR VBR Device to be protected ESD Surge KBMFxxSC6 3/8 KBMFxxSC6 To have a good approximation of the remaining voltages at both Vinput and Voutput stages, we give the typical dynamical resistance value Rd. By taking into account these following hypothesis : Rt>Rd, Rg>Rd and Rload>Rd, it gives these formulas: Rg .VBR + Rd .Vg Vinput = Rg RS.VBR + Rd .Vinput Voutput = Rt The results of the calculation done for V PP=8kV, Rg=330 (IEC 61000-4-2 standard), Vbr=7V (typ.) and Rd = 1ohm (typ.) give: Vinput = 31.2 V Voutput = 7.8 V This confirms the very low remaining voltage across the device to be protected. It is also important to note that in this approximation the parasitic inductance effect was not taken into account. This could be few tenths of volts during few ns at the input side. This parasitic effect is not present at the output side due the low current involved after the resistance RS. The measurements done here after show very clearly (Fig. A5) the high efficiency of the ESD protection : - no influence of the parasitic inductances on output stage - Voutput clamping voltage very close to Vbr (positive strike) and -Vf (negative strike) Fig. A4: Measurement conditions ESD SURGE 16kV Air Discharge TEST BOARD KM1 Vin Vout 4/8 KBMFxxSC6 Fig. A5: Remaining voltage at both stages S1 (Vinput) and S2 (Voutput) during ESD surge. a. Positive surge b. Negative surge Please note that the KBMFxxSC6 is not only acting for positive ESD surges but also for negative ones. For these kind of disturbances it clamps close to ground voltage as shown in Fig. A5b. LATCH-UP PHENOMENA The early ageing and destruction of IC's is often due to latch-up phenomena which is mainly induced by dV/dt. Thanks to its structure, the KBMFxxSC6 provides a high immunity to latch-up phenomena by smoothing very fast edges. CROSSTALK BEHAVIOR Fig. A6: Crosstalk phenomena RG1 Line 1 VG1 RG2 Line 2 RL1 1VG1 + 12VG2 VG2 RL2 2VG2 + 21VG1 DRIVERS RECEIVERS The crosstalk phenomena is due to the coupling between 2 lines. The coupling factor ( 12 or 21 ) increases when the gap across lines decreases, this is the reason why we provide crosstalk measurements for monolithic device to guarantee negligeable crosstalk between the lines. In the example above the expected signal on load RL2 is 2VG2, in fact the real voltage at this point has got an extra value 21VG1. This part of the VG1 signal represents the effect of the crosstalk phenomenon of the line 1 on the line 2. This phenomenon has to be taken into account when the drivers impose fast digital data or high frequency analog signals in the disturbing line. The perturbed line will be more affected if it works with low voltage signal or high load impedance (few k). 5/8 KBMFxxSC6 Fig. A7: Analog Crosstalk measurements configuration Fig. A8: Typical Analog Crosstalk measurement crosstalk (dB) 0 -20 50 TG OUT TEST BOARD RF IN KM1 -40 -60 Vg 50 -80 -100 -120 1 10 F (MHz) 100 1,000 Figure A7 gives the measurement circuit for the analog crosstalk application. In figure A8, the curve shows the effect of the Data line on the CLK line. In usual frequency range of analog signals (up to 100MHz) the effect on disturbed line is less than -37dB. Fig. A9: Digital crosstalk measurements configuration Fig. A10: Digital crosstalk measurements +5V 74HC04 Line 1 +5V VG1 Line 2 +5V 74HC04 Square Pulse Generator 5KHz KBMF 01SC6 b21 VG1 Figure A9 shows the measurement circuit used to quantify the crosstalk effect in a classical digital application. Figure A10 shows that in such a condition signal from 0 to 5V and rise time of few ns, the impact on the other line is less than 50mV peak to peak. (Below the logic high threshold voltage).The measurements performed with falling edges gives the results within the same range. 6/8 KBMFxxSC6 APPLICATION EXAMPLE Fig. A11: Implementation of KBMFxxSC6 in a typical application Vcc PS/2 Connector PS/2 Keyboard PS/2 Mouse KDAT KCLK KBMF 01SC6 Super I/O MDAT MCLK KBMF 01SC6 The KBMFxxSC6 device could be used on PS/2 mouse or keyboard as indicated by figure A11. 7/8 KBMFxxSC6 PACKAGE MECHANICAL DATA. SOT23-6L DIMENSIONS REF. Millimeters Min. A e D A H A2 Inches Min. 0.035 0 0.035 0.0137 0.004 0.11 0.059 0.102 0.004 Max. 0.057 0.006 0.0512 0.02 0.008 0.118 0.0689 0.118 0.024 10 Max. 1.45 0.15 1.30 0.50 0.20 3.00 1.75 3.00 0.60 10 0.90 0 0.90 0.35 0.09 2.80 1.50 2.60 0.10 A1 b A2 b C A1 e D E e L 0.95 Typ. 0.0374 Typ. c M E H L M RECOMMENDED FOOTPRINT (mm) MECHANICAL SPECIFICATIONS Lead plating 1.3 0.051 Tin-lead 5m min 25m max Sn / Pb (70% to 90%Sn) 10m max Molded epoxy UL94V-0 Lead plating thickness Lead material Lead coplanarity 3.6 0.137 1 0.040 mm inch 0.30 0.011 Body material 0.65 0.025 Flammability MARKING Type KBMF01SC6 Order Code KBMF01SC6 Weight 16.7mg Marking KM1 Package SOT23-6L Base Qty 3000 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 2000 STMicroelectronics - Printed in Italy - All rights reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 8/8 |
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