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| STS11NF3LL N-CHANNEL 30V - 0.008 - 11A SO-8 LOW GATE CHARGE STripFETTM II POWER MOSFET TYPE STS11NF3LL s s s s VDSS 30 V RDS(on) < 0.011 ID 11 A TYPICAL RDS(on) = 0.011 @ 4.5V OPTIMAL RDS(on) Qg TRADE-OFF @4.5V CONDUCTION LOSSES REDUCED SWITCHING LOSSES REDUCED SO-8 DESCRIPTION This application specific Power MOSFET is the third genaration of STMicroelectronics unique " Single Feature Size" strip-based process. The resulting transistor shows the best trade-off between on-resistance and gate charge. When used as high and low side in buck regulators, it gives the best performance in terms of both conduction and switching losses. This is extremely important for motherboards where fast switching and high efficiency are of paramount importance. APPLICATIONS s SPECIFICALLY DESIGNED AND OPTIMISED FOR HIGH EFFICIENCY CPU CORE DC/DC CONVERTERS FOR MOBILE PCs INTERNAL SCHEMATIC DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS ID IDM (q) PTOT Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuos) at TC = 25C (*) Drain Current (continuos) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Value 30 30 16 11 7 44 2.5 (*)Value limited by wires bonding Unit V V V A A A W (q) Pulse width limited by safe operating area October 2001 1/8 STS11NF3LL THERMAL DATA Rthj-amb Tj Tstg Thermal Resistance Junction-ambient Max (#) Max. Operating Junction Temperature Storage Temperature 50 150 -65 to 150 C/W C C (#) When Mounted on a 1inch2 pad ELECTRICAL CHARACTERISTICS (TCASE = 25 C UNLESS OTHERWISE SPECIFIED) OFF Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 A, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 C VGS = 16V Min. 30 1 10 100 Typ. Max. Unit V A A nA ON (1) Symbol VGS(th) RDS(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance Test Conditions VDS = VGS, ID = 250A VGS = 10 V, ID = 5.5 A VGS = 4.5 V, ID = 5.5 A Min. 1 0.008 0.011 0.011 0.013 Typ. Max. Unit V DYNAMIC Symbol gfs (1) Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS > ID(on) x RDS(on)max, ID = 5.5 A VDS = 25 V, f = 1 MHz, VGS = 0 Min. Typ. 15 1700 505 115 Max. Unit S pF pF pF 2/8 STS11NF3LL ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDD = 15 V, ID = 5.5 A RG = 4.7 VGS = 4.5 V (Resistive Load, see Fig. 3) VDD = 15 V, ID = 11 A, VGS = 4.5 V Min. Typ. 20 70 21 9.5 10 28 Max. Unit ns ns nC nC nC SWITCHING OFF Symbol td(off) tf Parameter Turn-off-Delay Time Fall Time Test Conditions VDD = 15 V, ID = 5.5 A, RG = 4.7, VGS = 4.5 V (Resistive Load see, Fig. 3) Min. Typ. 40 20 Max. Unit ns ns SOURCE DRAIN DIODE Symbol ISD ISDM (1) VSD (2) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery ChargeReverse Recovery Current ISD = 11 A, VGS = 0 ISD = 11 A, di/dt = 100A/s, VDD = 20 V, Tj = 150C (see test circuit, Figure 5) 45 52 2.3 Test Conditions Min. Typ. Max. 11 44 1.2 Unit A A V ns nC A Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Safe Operating Area Thermal Impedance 3/8 STS11NF3LL Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STS11NF3LL Normalized Gate Thereshold Voltage vs Temp. Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8 STS11NF3LL Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STS11NF3LL SO-8 MECHANICAL DATA DIM. MIN. A a1 a2 a3 b b1 C c1 D E e e3 F L M S 3.8 0.4 4.8 5.8 1.27 3.81 4.0 1.27 0.6 8 (max.) 0.14 0.015 5.0 6.2 0.65 0.35 0.19 0.25 0.1 mm TYP. MAX. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 0.188 0.228 0.050 0.150 0.157 0.050 0.023 0.196 0.244 0.025 0.013 0.007 0.010 0.003 MIN. inch TYP. MAX. 0.068 0.009 0.064 0.033 0.018 0.010 0.019 0016023 7/8 STS11NF3LL Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics (c) 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 8/8 |
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