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a FEATURES Single Supply Operation Low Supply Current: 700 A Max Wide Gain Range: 1 to 1000 Low Offset Voltage: 150 V Max Zero-In/Zero-Out Single-Resistor Gain Set 8-Lead Mini-DIP and SO Packages APPLICATIONS Strain Gages Thermocouples RTDs Battery-Powered Equipment Medical Instrumentation Data Acquisition Systems PC-Based Instruments Portable Instrumentation GENERAL DESCRIPTION IN(-) IN(+) Precision Single Supply Instrumentation Amplifier AMP04* FUNCTIONAL BLOCK DIAGRAM 100k RGAIN INPUT BUFFERS VOUT 11k 11k 100k REF The AMP04 is a single-supply instrumentation amplifier designed to work over a +5 volt to 15 volt supply range. It offers an excellent combination of accuracy, low power consumption, wide input voltage range, and excellent gain performance. Gain is set by a single external resistor and can be from 1 to 1000. Input common-mode voltage range allows the AMP04 to handle signals with full accuracy from ground to within 1 volt of the positive supply. And the output can swing to within 1 volt of the positive supply. Gain bandwidth is over 700 kHz. In addition to being easy to use, the AMP04 draws only 700 A of supply current. For high resolution data acquisition systems, laser trimming of low drift thin-film resistors limits the input offset voltage to under 150 V, and allows the AMP04 to offer gain nonlinearity of 0.005% and a gain tempco of 30 ppm/C. A proprietary input structure limits input offset currents to less than 5 nA with drift of only 8 pA/C, allowing direct connection of the AMP04 to high impedance transducers and other signal sources. The AMP04 is specified over the extended industrial (-40C to +85C) temperature range. AMP04s are available in plastic and ceramic DIP plus SO-8 surface mount packages. Contact your local sales office for MIL-STD-883 data sheet and availability. PIN CONNECTIONS 8-Lead Epoxy DIP (P Suffix) RGAIN 1 -IN 2 +IN 3 V- 4 8 RGAIN 8-Lead Narrow-Body SO (S Suffix) RGAIN -IN +IN V- RGAIN AMP04 7 V+ 6 VOUT 5 REF AMP04 V+ VOUT REF *Protected by U.S. Patent No. 5,075,633. REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 2000 AMP04-SPECIFICATIONS ELECTRICAL CHARACTERISTICS Parameter OFFSET VOLTAGE Input Offset Voltage Input Offset Voltage Drift Output Offset Voltage Output Offset Voltage Drift INPUT CURRENT Input Bias Current Input Bias Current Drift Input Offset Current Input Offset Current Drift INPUT Common-Mode Input Resistance Differential Input Resistance Input Voltage Range Common-Mode Rejection Symbol VIOS TCVIOS VOOS TCVOOS IB TCIB IOS TCIOS 22 -40C TA +85C 65 1 -40C TA +85C 8 4 4 VIN CMR 0 0 V VCM 3.0 V G=1 G = 10 G = 100 G = 1000 0 V VCM 2.5 V -40C TA +85C G=1 G = 10 G = 100 G = 1000 4.0 V VS 12 V -40C TA +85C G=1 G = 10 G = 100 G = 1000 G = 1 to 100 G = 1 to 100 -40C TA +85C G = 1000 G G = 1, RL = 5 k G = 10, RL = 5 k G = 100, RL = 5 k 1 0.005 0.015 0.025 30 4.0 3.8 2.0 30 15 30 15 4.2 4.0 3.8 2.5 60 80 90 90 80 100 105 105 3.0 0 55 75 80 80 (VS = 5 V, VCM = 2.5 V, TA = 25 C unless otherwise noted) Conditions Min AMP04E Typ Max 30 -40C TA +85C 0.5 -40C TA +85C 150 300 3 1.5 3 30 30 50 65 5 10 8 4 4 3.0 10 15 Min AMP04F Typ Max 300 600 6 3 6 50 40 60 Unit V V V/C mV mV V/C nA nA pA/C nA nA pA/C G G V dB dB dB dB Common-Mode Rejection CMR 55 75 85 85 50 70 75 75 dB dB dB dB Power Supply Rejection PSRR 95 105 105 105 0.2 0.5 0.8 0.4 1000 85 95 95 95 0.75 1.0 0.75 1 1000 dB dB dB dB % % % V/V % % % ppm/C V V mV mA mA GAIN (G = 100 K/RGAIN) Gain Equation Accuracy Gain Range Nonlinearity Gain Temperature Coefficient OUTPUT Output Voltage Swing High G/T VOH VOL 50 Output Voltage Swing Low Output Current Limit RL = 2 k RL = 2 k -40C TA +85C RL = 2 k -40C TA +85C Sink Source -2- REV. B AMP04 Parameter NOISE Noise Voltage Density, RTI Symbol eN Conditions f = 1 kHz, G = 1 f = 1 kHz, G = 10 f = 100 Hz, G = 100 f = 100 Hz, G = 1000 f = 100 Hz, G = 100 0.1 Hz to 10 Hz, G = 1 0.1 Hz to 10 Hz, G = 10 0.1 Hz to 10 Hz, G = 100 G = 1, -3 dB Min AMP04E Typ Max 270 45 30 25 4 7 1.5 0.7 300 550 -40C TA +85C 700 850 Min AMP04F Typ Max 270 45 30 25 4 7 1.5 0.7 300 700 850 Unit nV/Hz nV/Hz nV/Hz nV/Hz pA/Hz V p-p V p-p V p-p kHz A A Noise Current Density, RTI Input Noise Voltage iN eN p-p DYNAMIC RESPONSE Small Signal Bandwidth POWER SUPPLY Supply Current BW ISY Specifications subject to change without notice. ELECTRICAL CHARACTERISTICS (V = S 15 V, VCM = 0 V, TA = 25 C unless otherwise noted) Min AMP04E Typ Max 80 400 600 3 3 6 30 30 50 65 5 15 28 4 4 +12 80 100 105 105 -12 55 75 80 80 +12 10 20 Min AMP04F Typ Max 600 900 6 6 9 50 40 60 Unit V V V/C mV mV V/C nA nA pA/C nA nA pA/C G G V dB dB dB dB Parameter OFFSET VOLTAGE Input Offset Voltage Input Offset Voltage Drift Output Offset Voltage Output Offset Voltage Drift INPUT CURRENT Input Bias Current Input Bias Current Drift Input Offset Current Input Offset Current Drift INPUT Common-Mode Input Resistance Differential Input Resistance Input Voltage Range Common-Mode Rejection Symbol VIOS TCVIOS VOOS TCVOOS IB TCIB IOS TCIOS Conditions -40C TA +85C 1 -40C TA +85C 17 -40C TA +85C 65 2 -40C TA +85C 28 4 4 VIN CMR -12 -12 V VCM +12 V G=1 G = 10 G = 100 G = 1000 -11 V VCM +11 V -40C TA +85C G=1 G = 10 G = 100 G = 1000 2.5 V VS 18 V -40C TA +85C G=1 G = 10 G = 100 G = 1000 60 80 90 90 Common-Mode Rejection CMR 55 75 85 85 50 70 75 75 dB dB dB dB Power Supply Rejection PSRR 75 90 95 95 70 80 85 85 dB dB dB dB REV. B -3- AMP04 Parameter GAIN (G = 100 K/RGAIN) Gain Equation Accuracy Symbol Conditions G = 1 to 100 G = 1000 G = 1 to 100 -40C TA +85C G G = 1, RL = 5 k G = 10, RL = 5 k G = 100, RL = 5 k 1 0.005 0.015 0.025 30 13 12.5 -14.5 30 15 270 45 30 25 4 5 1 0.5 700 750 -40C TA +85C 900 1100 30 15 270 45 30 25 4 5 1 0.5 700 900 1100 13.4 13 12.5 Min AMP04E Typ Max 0.2 0.4 0.5 0.75 0.8 1000 1.0 1000 0.005 0.015 0.025 50 Min AMP04F Typ Max 0.75 Unit % % % V/V % % % ppm/C V V -14.5 V mA mA nV/Hz nV/Hz nV/Hz nV/Hz pA/Hz V p-p V p-p V p-p kHz A A Gain Range Nonlinearity 1 Gain Temperature Coefficient OUTPUT Output Voltage Swing High G/T VOH VOL Output Voltage Swing Low Output Current Limit NOISE Noise Voltage Density, RTI RL = 2 k RL = 2 k -40C TA +85C RL = 2 k -40C TA +85C Sink Source f = 1 kHz, G = 1 f = 1 kHz, G = 10 f = 100 Hz, G = 100 f = 100 Hz, G = 1000 f = 100 Hz, G = 100 0.1 Hz to 10 Hz, G = 1 0.1 Hz to 10 Hz, G = 10 0.1 Hz to 10 Hz, G = 100 G = 1, -3 dB eN Noise Current Density, RTI Input Noise Voltage iN eN p-p DYNAMIC RESPONSE Small Signal Bandwidth POWER SUPPLY Supply Current BW ISY Specifications subject to change without notice. WAFER TEST LIMITS (V = 5 V, V S CM = 2.5 V, TA = 25 C unless otherwise noted) Conditions Limit 300 3 40 10 0 V VCM 3.0 V G=1 G = 10 G = 100 G = 1000 VS = 15 V, -12 V VCM +12 V G=1 G = 10 G = 100 Unit V max mV max nA max nA max Parameter OFFSET VOLTAGE Input Offset Voltage Output Offset Voltage INPUT CURRENT Input Bias Current Input Offset Current INPUT Common-Mode Rejection Symbol VIOS VOOS IB IOS CMR 55 75 80 80 55 75 80 dB min dB min dB min dB min dB min dB min dB min Common-Mode Rejection CMR -4- REV. B AMP04 Parameter Power Supply Rejection Symbol PSRR Conditions G = 1000 4.0 V VS 12 V G=1 G = 10 G = 100 G = 1000 G = 1 to 100 VOH VOL ISY RL = 2 k RL = 2 k VS = 15 Limit 80 85 95 95 95 0.75 4.0 2.5 900 700 Unit dB min dB min dB min dB min dB min % max V min mV max A max A max GAIN (G = 100 K/RGAIN) Gain Equation Accuracy OUTPUT Output Voltage Swing High Output Voltage Swing Low POWER SUPPLY Supply Current NOTE Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing. ABSOLUTE MAXIMUM RATINGS 1 DICE CHARACTERISTICS RGAIN 1 RGAIN 8 Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Common-Mode Input Voltage2 . . . . . . . . . . . . . . . . . . . 18 V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 36 V Output Short-Circuit Duration to GND . . . . . . . . . . Indefinite Storage Temperature Range Z Package . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to +175C P, S Package . . . . . . . . . . . . . . . . . . . . . . . . -65C to +150C Operating Temperature Range AMP04A . . . . . . . . . . . . . . . . . . . . . . . . . . -55C to +125C AMP04E, F . . . . . . . . . . . . . . . . . . . . . . . . . -40C to +85C Junction Temperature Range Z Package . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to +175C P, S Package . . . . . . . . . . . . . . . . . . . . . . . . -65C to +150C Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300C Package Type 8-Lead Cerdip (Z) 8-Lead Plastic DIP (P) 8-Lead SOIC (S) JA 3 JC -IN 2 7 V+ +IN 3 6 VOUT Unit C/W C/W C/W V- 4 5 REF 148 103 158 16 43 43 NOTES 1 Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted. 2 For supply voltages less than 18 V, the absolute maximum input voltage is equal to the supply voltage. 3 JA is specified for the worst case conditions, i.e., JA is specified for device in socket for cerdip, P-DIP, and LCC packages; JA is specified for device soldered in circuit board for SOIC package. AMP04 Die Size 0.075 x 0.99 inch, 7,425 sq. mils. Substrate (Die Backside) Is Connected to V+. Transistor Count, 81. ORDERING GUIDE Model AMP04EP AMP04ES AMP04ES-REEL7 AMP04FP AMP04FS AMP04FS-REEL AMP04FS-REEL7 AMP04GBC REV. B Temperature Range XIND XIND XIND XIND XIND XIND XIND 25C VOS @ 5 V TA = 25 C 150 V 150 V 150 V 300 V 300 V 150 V 150 V 300 V -5- Package Description Plastic DIP SOIC SOIC Plastic DIP SOIC SOIC SOIC Package Option N-8 SO-8 SO-8 N-8 SO-8 SO-8 SO-8 AMP04 APPLICATIONS Common-Mode Rejection Input Common-Mode Voltage Below Ground The purpose of the instrumentation amplifier is to amplify the difference between the two input signals while ignoring offset and noise voltages common to both inputs. One way of judging the device's ability to reject this offset is the common-mode gain, which is the ratio between a change in the common-mode voltage and the resulting output voltage change. Instrumentation amplifiers are often judged by the common-mode rejection ratio, which is equal to 20 x log10 of the ratio of the user-selected differential signal gain to the common-mode gain, commonly called the CMRR. The AMP04 offers excellent CMRR, guaranteed to be greater than 90 dB at gains of 100 or greater. Input offsets attain very low temperature drift by proprietary lasertrimmed thin-film resistors and high gain amplifiers. Input Common-Mode Range Includes Ground Although not tested and guaranteed, the AMP04 inputs are biased in a way that they can amplify signals linearly with commonmode voltage as low as -0.25 volts below ground. This holds true over the industrial temperature range from -40C to +85C. Extended Positive Common-Mode Range The AMP04 employs a patented topology (Figure 1) that uniquely allows the common-mode input voltage to truly extend to zero volts where other instrumentation amplifiers fail. To illustrate, take for example the single supply, gain of 100 instrumentation amplifier as in Figure 2. As the inputs approach zero volts, in order for the output to go positive, amplifier A's output (VOA) must be allowed to go below ground, to -0.094 volts. Clearly this is not possible in a single supply environment. Consequently this instrumentation amplifier configuration's input common-mode voltage cannot go below about 0.4 volts. In comparison, the AMP04 has no such restriction. Its inputs will function with a zero-volt common-mode voltage. 100k RGAIN IN(-) INPUT BUFFERS IN(+) VOUT On the high side, other instrumentation amplifier configurations, such as the three op amp instrumentation amplifier, can have severe positive common-mode range limitations. Figure 3 shows an example of a gain of 1001 amplifier, with an input commonmode voltage of 10 volts. For this circuit to function, VOB must swing to 15.01 volts in order for the output to go to 10.01 volts. Clearly no op amp can handle this swing range (given a 15 V supply) as the output will saturate long before it reaches the supply rails. Again the AMP04's topology does not have this limitation. Figure 4 illustrates the AMP04 operating at the same common-mode conditions as in Figure 3. None of the internal nodes has a signal high enough to cause amplifier saturation. As a result, the AMP04 can accommodate much wider commonmode range than most instrumentation amplifiers. 10.00V A 100k 200 50 A 100k B 10.01V 5V R VOA VOB R R 10.01V R 15.01V Figure 3. Gain = 1001, Three Op Amp Instrumentation Amplifier 100k 11k 11k 100k 10.01V 10.00V 100 10.01V 100 A +15V 11k 0.1 A +15V VOUT 10V -15V 100.1 A REF Figure 1. Functional Block Diagram 100k -15V 11k 11.111V 0.01V + VIN 0V - A 100k 0V 20k -0.094V 4.7 A 4.7 A 2127 VOA 20k 0.01V 5.2 A 100k B VOB VOUT Figure 4. Gain = 1000, AMP04 Figure 2. Gain = 100 Instrumentation Amplifier -6- REV. B AMP04 Programming the Gain The gain of the AMP04 is programmed by the user by selecting a single external resistor--RGAIN: Gain = 100 k/RGAIN The output voltage is then defined as the differential input voltage times the gain. VOUT = (VIN+ - VIN-) x Gain In single supply systems, offsetting the ground is often desired for several reasons. Ground may be offset from zero to provide a quieter signal reference point, or to offset "zero" to allow a unipolar signal range to represent both positive and negative values. In noisy environments such as those having digital switching, switching power supplies or externally generated noise, ground may not be the ideal place to reference a signal in a high accuracy system. Often, real world signals such as temperature or pressure may generate voltages that are represented by changes in polarity. In a single supply system the signal input cannot be allowed to go below ground, and therefore the signal must be offset to accommodate this change in polarity. On the AMP04, a reference input pin is provided to allow offsetting of the input range. The gain equation is more accurately represented by including this reference input. VOUT = (VIN+ - VIN-) x Gain + VREF Grounding High accuracy circuitry can experience considerable error contributions due to the coupling of stray voltages into sensitive areas, including high impedance amplifier inputs which benefit from such techniques as ground planes, guard rings, and shields. Careful circuit layout, including good grounding and signal routing practice to minimize stray coupling and ground loops is recommended. Leakage currents can be minimized by using high quality socket and circuit board materials, and by carefully cleaning and coating complete board assemblies. As mentioned above, the high speed transition noise found in logic circuitry is the sworn enemy of the analog circuit designer. Great care must be taken to maintain separation between them to minimize coupling. A major path for these error voltages will be found in the power supply lines. Low impedance, load related variations and noise levels that are completely acceptable in the high thresholds of the digital domain make the digital supply unusable in nearly all high performance analog applications. The user is encouraged to maintain separate power and ground between the analog and digital systems wherever possible, joining only at the supply itself if necessary, and to observe careful grounding layout and bypass capacitor scheduling in sensitive areas. Input Shield Drivers The most common problems encountered in high performance analog instrumentation and data acquisition system designs are found in the management of offset errors and ground noise. Primarily, the designer must consider temperature differentials and thermocouple effects due to dissimilar metals, IR voltage drops, and the effects of stray capacitance. The problem is greatly compounded when high speed digital circuitry, such as that accompanying data conversion components, is brought into the proximity of the analog section. Considerable noise and error contributions such as fast-moving logic signals that easily propagate into sensitive analog lines, and the unavoidable noise common to digital supply lines must all be dealt with if the accuracy of the carefully designed analog section is to be preserved. Besides the temperature drift errors encountered in the amplifier, thermal errors due to the supporting discrete components should be evaluated. The use of high quality, low-TC components where appropriate is encouraged. What is more important, large thermal gradients can create not only unexpected changes in component values, but also generate significant thermoelectric voltages due to the interface between dissimilar metals such as lead solder, copper wire, gold socket contacts, Kovar lead frames, etc. Thermocouple voltages developed at these junctions commonly exceed the TCVOS contribution of the AMP04. Component layout that takes into account the power dissipation at critical locations in the circuit and minimizes gradient effects and differential common-mode voltages by taking advantage of input symmetry will minimize many of these errors. High impedance sources and long cable runs from remote transducers in noisy industrial environments commonly experience significant amounts of noise coupled to the inputs. Both stray capacitance errors and noise coupling from external sources can be minimized by running the input signal through shielded cable. The cable shield is often grounded at the analog input common, however improved dynamic noise rejection and a reduction in effective cable capacitance is achieved by driving the shield with a buffer amplifier at a potential equal to the voltage seen at the input. Driven shields are easily realized with the AMP04. Examination of the simplified schematic shows that the potentials at the gain set resistor pins of the AMP04 follow the inputs precisely. As shown in Figure 5, shield drivers are easily realized by buffering the potential at these pins by a dual, single supply op amp such as the OP213. Alternatively, applications with single-ended sources or that use twisted-pair cable could drive a single shield. To minimize error contributions due to this additional circuitry, all components and wiring should remain in proximity to the AMP04 and careful grounding and bypassing techniques should be observed. 1/2 OP213 VOUT 1/2 OP213 Figure 5. Cable Shield Drivers REV. B -7- AMP04 Compensating for Input and Output Errors Noise Filtering To achieve optimal performance, the user needs to take into account a number of error sources found in instrumentation amplifiers. These consist primarily of input and output offset voltages and leakage currents. The input and output offset voltages are independent from one another, and must be considered separately. The input offset component will of course be directly multiplied by the gain of the amplifier, in contrast to the output offset voltage that is independent of gain. Therefore, the output error is the dominant factor at low gains, and the input error grows to become the greater problem as gain is increased. The overall equation for offset voltage error referred to the output (RTO) is: VOS (RTO) = (VIOS x G) + VOOS where VIOS is the input offset voltage and VOOS the output offset voltage, and G is the programmed amplifier gain. The change in these error voltages with temperature must also be taken into account. The specification TCVOS, referred to the output, is a combination of the input and output drift specifications. Again, the gain influences the input error but not the output, and the equation is: TCVOS (RTO) = (TCVIOS x G) + TCVOOS In some applications the user may wish to define the error contribution as referred to the input, and treat it as an input error. The relationship is: TCVOS (RTI) = TCVIOS + (TCVOOS / G) The bias and offset currents of the input transistors also have an impact on the overall accuracy of the input signal. The input leakage, or bias currents of both inputs will generate an additional offset voltage when flowing through the signal source resistance. Changes in this error component due to variations with signal voltage and temperature can be minimized if both input source resistances are equal, reducing the error to a common-mode voltage which can be rejected. The difference in bias current between the inputs, the offset current, generates a differential error voltage across the source resistance that should be taken into account in the user's design. In applications utilizing floating sources such as thermocouples, transformers, and some photo detectors, the user must take care to provide some current path between the high impedance inputs and analog ground. The input bias currents of the AMP04, although extremely low, will charge the stray capacitance found in nearby circuit traces, cables, etc., and cause the input to drift erratically or to saturate unless given a bleed path to the analog common. Again, the use of equal resistance values will create a common input error voltage that is rejected by the amplifier. Reference Input Unlike most previous instrumentation amplifiers, the output stage's inverting input (Pin 8) is accessible. By placing a capacitor across the AMP04's feedback path (Figure 6, Pins 6 and 8) CEXT 100k IN(-) INPUT BUFFERS IN(+) RGAIN VOUT 11k 11k 100k 1 2 (100k ) CEXT LP = REF Figure 6. Noise Band Limiting a single-pole low-pass filter is produced. The cutoff frequency (fLP) follows the relationship: f LP = 1 2 (100 k) CEXT Filtering can be applied to reduce wide band noise. Figure 7a shows a 10 Hz low-pass filter, gain of 1000 for the AMP04. Figures 7b and 7c illustrate the effect of filtering on noise. The photo in Figure 7b shows the output noise before filtering. By adding a 0.15 F capacitor, the noise is reduced by about a factor of 4 as shown in Figure 7c. +15V 100k 0.15 F -15V Figure 7a. 10 Hz Low-Pass Filter 5mV 100 90 10ms The VREF input is used to set the system ground. For dual supply operation it can be connected to ground to give zero volts out with zero volts differential input. In single supply systems it could be connected either to the negative supply or to a pseudoground between the supplies. In any case, the REF input must be driven with low impedance. 10 0% Figure 7b. Unfiltered AMP04 Output -8- REV. B AMP04 Offset Nulling in Single Supply 1mV 100 90 2s Nulling the offset in single supply systems is difficult because the adjustment is made to try to attain zero volts. At zero volts out, the output is in saturation (to the negative rail) and the output voltage is indistinguishable from the normal offset error. Consequently the offset nulling circuit in Figure 9 must be used with caution. First, the potentiometer should be adjusted to cause the output to swing in the positive direction; then adjust it in the reverse direction, causing the output to swing toward ground, until the output just stops changing. At that point the output is at the saturation limit. RG 10 0% Figure 7c. 10 Hz Low-Pass Filtered Output Power Supply Considerations In dual supply applications (for example 15 V) if the input is connected to a low resistance source less than 100 , a large current may flow in the input leads if the positive supply is applied before the negative supply during power-up. A similar condition may also result upon a loss of the negative supply. If these conditions could be present in you system, it is recommended that a series resistor up to 1 k be added to the input leads to limit the input current. This condition can not occur in a single supply environment as losing the negative supply effectively removes any current return path. Offset Nulling in Dual Supply 1 2 AMP04 8 7 6 5 5V OUTPUT INPUT 3 4 OP113 5V 100 50k Figure 9. Offset Adjust for Single Supply Applications Alternative Nulling Method Offset may be nulled by feeding a correcting voltage at the VREF pin (Pin 5). However, it is important that the pin be driven with a low impedance source. Any measurable resistance will degrade the amplifier's common-mode rejection performance as well as its gain accuracy. An op amp may be used to buffer the offset null circuit as in Figure 8. RG An alternative null correction technique is to inject an offset current into the summing node of the output amplifier as in Figure 10. This method does not require an external op amp. However, the drawback is that the amplifier will move off its null as the input common-mode voltage changes. It is a less desirable nulling circuit than the previous method. V+ V- 100k 1 AMP04 8 RGAIN 5V OUTPUT +5V * +5V 50k 5mV ADJ RANGE 100 50k 11k 100k IN(-) INPUT BUFFERS VOUT IN(+) - INPUT + 2 3 4 V+ 7 6 V- REF 5 -5V 11k *OP90 FOR LOW POWER OP113 FOR LOW DRIFT -5V -5V Figure 8. Offset Adjust for Dual Supply Applications REF Figure 10. Current Injection Offsetting Is Not Recommended REV. B -9- AMP04 APPLICATION CIRCUITS Low Power Precision Single Supply RTD Amplifier Figure 11 shows a linearized RTD amplifier that is powered from a single 5 volt supply. However, the circuit will work up to 36 volts without modification. The RTD is excited by a 100 A constant current that is regulated by amplifier A (OP295). The 0.202 volts reference voltage used to generate the constant current is divided down from the 2.500 volt reference. The AMP04 amplifies the bridge output to a 10 mV/C output coefficient. 5V R3 BALANCE R1 26.7k 500 R2 26.7k C3 0.1 F 7 1 8 R8 383 R9 50 R10 100 FULL-SCALE ADJ C1 0.47 F VOUT 0 4.00V (0 C TO 400 C) output. Note that a 0 volt output is also the negative output swing limit of the AMP04 powered with a single supply. Therefore, be sure to adjust R3 to first cause the output to swing positive and then back off until the output just stops swinging negatively. Next, set the LINEARITY ADJ potentiometer to the midrange. Substitute an exact 247.04 resistor (equivalent to 400C temperature) in place of the RTD. Adjust the FULL-SCALE potentiometer for a 4.000 volts output. Finally substitute a 175.84 resistor (equivalent to 200C temperature), and adjust the LINEARITY ADJ potentiometer for a 2.000 volts at the output. Repeat the full-scale and the half-scale adjustments as needed. When properly calibrated, the circuit achieves better than 0.5C accuracy within a temperature measurement range from 0C to 400C. Precision 4-20 mA Loop Transmitter with Noninteractive Trim 3 AMP04 RTD 100 2 R4 100 1 1/2 A OP295 3 R7 121k 0.202V R6 11.5k 2.5V 6 OUT REF43 GND 4 7 4 5 6 2 R5 1.02k RSENSE 1k 5V 6 8 1/2 B OP295 5 4 50k LINEARITY ADJ. (@1/2 FS) IN 2 5V C2 0.1 F Figure 12 shows a full bridge strain gage transducer amplifier circuit that is powered off the 4-20 mA current loop. The AMP04 amplifies the bridge signal differentially and is converted to a current by the output amplifier. The total quiescent current drawn by the circuit, which includes the bridge, the amplifiers, and the resistor biasing, is only a fraction of the 4 mA null current that flows through the current-sense resistor RSENSE. The voltage across RSENSE feeds back to the OP90's input, whose common-mode is fixed at the current summing reference voltage, thus regulating the output current. With no bridge signal, the 4 mA null is simply set up by the 50 k NULL potentiometer plus the 976 k resistors that inject an offset that forces an 80 mV drop across RSENSE. At a 50 mV full-scale bridge voltage, the AMP04 amplifies the voltage-to-current converter for a full-scale of 20 mA at the output. Since the OP90's input operates at a constant 0 volt common-mode voltage, the null and the span adjustments do not interact with one another. Calibration is simple and easy with the NULL adjusted first, followed by SPAN adjust. The entire circuit can be remotely placed, and powered from the 4-20 mA 2-wire loop. NOTES: ALL RESISTORS 0.5%, 25 PPM/ C ALL POTENTIOMETERS 25 PPM/ C Figure 11. Precision Single Supply RTD Thermometer Amplifier The RTD is linearized by feeding a portion of the signal back to the reference circuit, increasing the reference voltage as the temperature increases. When calibrated properly, the RTD's nonlinearity error will be canceled. To calibrate, either immerse the RTD into a zero-degree ice bath or substitute an exact 100 resistor in place of the RTD. Then adjust bridge BALANCE potentiometer R3 for a 0 volt 5.00V 3500 STRAIN GAGE BRIDGE 50mV FS 3 7 1 2.49k 0.22 F 5k 10-TURN 97.6k 6 5 4 20mA SPAN HP 5082-2810 4mA NULL 6 U3 REF02 2 OUT N GND 4 0.1 F 6 2k 5% 1N4002 50k 976k 3 B 2 7 U2 OP90 U1 AMP04 2 8 T1P29A +VS 12V TO 36V RLOAD 100 4 220pF 13.3k 100k 5% RSENSE 20 INULL + ISPAN UNLESS OTHERWISE SPECIFIED, ALL RESISTORS OR BETTER POTENTIOMETER < 50 PPM/ C 1% 4-20mA 15.8k Figure 12. Precision 4-20 mA Loop Transmitter Features Noninteractive Trims -10- REV. B AMP04 4-20 mA Loop Receiver Single Supply Programmable Gain Instrumentation Amplifier At the receiving end of a 4-20 mA loop, the AMP04 makes a convenient differential receiver to convert the current back to a usable voltage (Figure 13). The 4-20 mA signal current passes through a 100 sense resistor. The voltage drop is differentially amplified by the AMP04. The 4 mA offset is removed by the offset correction circuit. +15V 1N4002 4-20mA 4-20mA TRANSMITTER 4-20mA 100 1% 1k 3 7 100k 0.15 F 1 8 5 4 6 VOUT 0-1.6V FS -0.400V 2 -15V POWER SUPPLY 6 OP177 3 10k 27k -15V AD589 Combining with the single supply ADG221 quad analog switch, the AMP04 makes a useful programmable gain amplifier that can handle input and output signals at zero volts. Figure 15 shows the implementation. A logic low input to any of the gain control ports will cause the gain to change by shorting a gainset resistor across AMP04's Pins 1 and 8. Trimming is required at higher gains to improve accuracy because the switch ONresistance becomes a more significant part of the gain-set resistance. The gain of 500 setting has two switches connected in parallel to reduce the switch resistance. 5V TO 30V 13 ADG221 5 4 0.1 F 10 11 9 7 8 15 16 2 1 12 RG 6 200 14 715 3 10.9k 100k RG 0.22 F 8 1k AMP04 2 WIRE RESISTANCE 10 F 200 GAIN OF 500 GAIN CONTROL GAIN OF 100 GAIN OF 10 WR Figure 13. 4-to-20 mA Line Receiver Low Power, Pulsed Load-Cell Amplifier Figure 14 shows a 350 load cell that is pulsed with a low duty cycle to conserve power. The OP295's rail-to-rail output capability allows a maximum voltage of 10 volts to be applied to the bridge. The bridge voltage is selectively pulsed on when a measurement is made. A negative-going pulse lasting 200 ms should be applied to the MEASURE input. The long pulsewidth is necessary to allow ample settling time for the long time constant of the low-pass filter around the AMP04. A much faster settling time can be achieved by omitting the filter capacitor. 12V 1k 330 1/2 OP295 10k IN OUT REF01 GND 50k 2N3904 12V 7 3 350 2 0.22 F 1 6 VOUT 1N4148 MEASURE 1 2 INPUT 3 4 V+ 7 6 5V TO 30V VOUT 0.1 F V- AMP04 REF 5 Figure 15. Single Supply Programmable Gain Instrumentation Amplifier The switch ON resistance is lower if the supply voltage is 12 volts or higher. Additionally, the overall amplifier's temperature coefficient also improves with higher supply voltage. 8 AMP04 4 5 Figure 14. Pulsed Load Cell Bridge Amplifier REV. B -11- AMP04 120 BASED ON 300 UNITS 3 RUNS TA = 25 C VS = 5V VCM = 2.5V 120 BASED ON 300 UNITS 3 RUNS TA = 25 C VS = 15V VCM = 0V 100 100 NUMBER OF UNITS NUMBER OF UNITS 80 80 60 60 40 40 20 20 0 -200 -160 -120 -80 -40 0 40 80 120 INPUT OFFSET VOLTAGE - V 160 200 0 -0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 INPUT OFFSET VOLTAGE - mV 0.4 0.5 Figure 16. Input Offset (VIOS) Distribution @ 5 V Figure 19. Input Offset (VIOS) Distribution @ 15 V 120 300 UNITS VS = 5V VCM = 2.5V 120 300 UNITS VS = 15V VCM = 0V 100 100 NUMBER OF UNITS NUMBER OF UNITS 80 80 60 60 40 40 20 20 0 0 0.25 0.50 0.75 1.00 1.25 1.50 1.75 TCVIOS - V/ C 2.00 2.25 2.50 0 0 0.25 0.50 0.75 1.00 1.25 1.50 1.75 TCVIOS - V/ C 2.00 2.25 2.50 Figure 17. Input Offset Drift (TCVIOS) Distribution @ 5 V Figure 20. Input Offset Drift (TCVIOS) Distribution @ 15 V 120 BASED ON 300 UNITS 3 RUNS TA = 25 C VS = 5V VCM = 2.5V 120 BASED ON 300 UNITS 3 RUNS TA = 25 C VS = 15V VCM = 0V 100 100 NUMBER OF UNITS NUMBER OF UNITS 80 80 60 60 40 40 20 20 0 -2.0 0 -1.6 -1.2 -0.8 -0.4 0 0.4 0.8 OUTPUT OFFSET - mV 1.2 1.6 2.0 -5 -4 -3 -2 -1 0 1 2 OUTPUT OFFSET - mV 3 4 5 Figure 18. Output Offset (VOOS) Distribution @ 5 V Figure 21. Output Offset (VOOS) Distribution @ 15 V -12- REV. B AMP04 120 300 UNITS VS = 5V VCM = 0V 120 300 UNITS VS = 15V VCM = 0V 100 100 NUMBER OF UNITS NUMBER OF UNITS 0 2 4 6 8 10 12 TCVOOS - V/ C 14 16 18 20 80 80 60 60 40 40 20 20 0 0 2 4 6 8 10 12 14 16 TCVOOS - V/ C 18 20 22 24 Figure 22. Output Offset Drift (TCVOOS) Distribution @5V Figure 25. Output Offset Drift (TCVOOS) Distribution @ 15 V +OUTPUT SWING - Volts 5.0 VS = 5V 15.0 RL = 100k 14.5 14.0 13.5 13.0 12.5 -14.6 -14.7 -14.8 -14.9 -15.0 RL = 100k -15.1 -50 -25 0 25 50 75 100 TEMPERATURE - C RL = 10k RL = 2k RL = 2k RL = 10k VS = 5V OUTPUT VOLTAGE SWING - Volts 4.8 4.6 RL = 100k 4.4 4.2 RL = 2k 4.0 RL = 10k 3.8 -50 -25 0 25 50 TEMPERATURE - C 75 100 Figure 23. Output Voltage Swing vs. Temperature @5V -OUTPUT SWING - Volts Figure 26. Output Voltage Swing vs. Temperature @ +15 V 40 35 INPUT BIAS CURRENT - nA 8 VS = 5V, VCM = 2.5V VS = 15V, VCM = 0V INPUT OFFSET CURRENT - nA VS = 5V, VCM = 2.5V VS = 15V, VCM = 0V 6 30 25 20 15 10 5 VS = 15V VS = 5V 4 VS = 2 15V VS = 5V 0 -50 -25 0 25 50 75 100 0 -50 -25 0 25 50 75 100 TEMPERATURE - C TEMPERATURE - C Figure 24. Input Bias Current vs. Temperature Figure 27. Input Offset Current vs. Temperature REV. B -13- AMP04 50 G = 100 40 30 G = 10 20 10 G=1 0 -10 -20 100 TA = 25 C VS = 15V 120 100 80 60 40 TA = 25 C G=1 OUTPUT IMPEDANCE - VOLTAGE GAIN - dB VS = 15V 20 VS = 5V 0 -20 10 1k 10k FREQUENCY - Hz 100k 1M 100 1k FREQUENCY - Hz 10k 100k Figure 28. Closed-Loop Voltage Gain vs. Frequency Figure 31. Closed-Loop Output Impedance vs. Frequency 120 100 80 G = 100 60 120 TA = 25 C VS = 15V VCM = 2V p-p COMMON-MODE REJECTION - dB COMMON-MODE REJECTION - dB TA = 25 C VS = 15V 110 VCM = 2V p-p 100 90 40 G=1 20 G = 10 0 -20 1 10 100 1k FREQUENCY - Hz 10k 100k 80 70 60 50 1 10 100 VOLTAGE GAIN - G 1k Figure 29. Common-Mode Rejection vs. Frequency Figure 32. Common-Mode Rejection vs. Voltage Gain 140 TA = 25 C VS = 15V VS = 1V G = 100 80 60 G=1 40 20 140 120 100 TA = 25 C VS = 15V VS = 1V POWER SUPPLY REJECTION - dB 100 POWER SUPPLY REJECTION - dB 120 80 60 G = 100 40 20 G=1 G = 10 G = 10 0 10 100 1k 10k FREQUENCY - Hz 100k 1M 0 10 100 1k 10k FREQUENCY - Hz 100k 1M Figure 30. Positive Power Supply Rejection vs. Frequency Figure 33. Negative Power Supply Rejection vs. Frequency -14- REV. B AMP04 1k TA = 25 C VS = 15V = 100Hz VOLTAGE NOISE - nV/ Hz 1k TA = 25 C VS = 15V = 1kHz 100 VOLTAGE NOISE - nV/ Hz 1 10 100 VOLTAGE GAIN - G 1k 100 10 10 1 1 1 10 100 VOLTAGE GAIN - G 1k Figure 34. Voltage Noise Density vs. Gain Figure 37. Voltage Noise Density vs. Gain, f = 1 kHz 140 TA = 25 C VS = 15V G = 100 100 90 20mV 1s VOLTAGE NOISE DENSITY - nV/ Hz 120 100 80 60 40 10 0% 20 0 1 10 100 FREQUENCY - Hz 1k 10k VS = 15V, GAIN = 1000, 0.1 TO 10 Hz BANDPASS Figure 35. Voltage Noise Density vs. Frequency Figure 38. Input Noise Voltage 1200 16 14 TA = 25 C VS = 15V 1000 SUPPLY CURRENT - A 800 OUTPUT VOLTAGE - V VS = 15V 12 10 8 6 4 600 VS = 5V 400 200 2 0 -50 -25 0 25 50 75 100 0 10 100 1k LOAD RESISTANCE - 10k 100k TEMPERATURE - C Figure 36. Supply Current vs. Temperature Figure 39. Maximum Output Voltage vs. Load Resistance REV. B -15- AMP04 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 8-Lead Plastic DIP (N-8) C00250-0-11/00 (rev. B) 0.430 (10.92) 0.348 (8.84) 8 5 0.280 (7.11) 0.240 (6.10) 0.325 (8.25) 0.300 (7.62) 0.060 (1.52) 0.015 (0.38) 0.130 (3.30) MIN 0.015 (0.381) 0.008 (0.204) 0.195 (4.95) 0.115 (2.93) 1 4 PIN 1 0.100 (2.54) BSC 0.210 (5.33) MAX 0.160 (4.06) 0.115 (2.93) 0.022 (0.558) 0.070 (1.77) SEATING 0.014 (0.356) 0.045 (1.15) PLANE 8-Lead Cerdip (Q-8) 0.005 (0.13) MIN 8 0.055 (1.4) MAX 5 PIN 1 1 4 0.310 (7.87) 0.220 (5.59) 0.100 (2.54) BSC 0.405 (10.29) MAX 0.200 (5.08) MAX 0.200 (5.08) 0.125 (3.18) 0.060 (1.52) 0.015 (0.38) 0.150 (3.81) MIN 15 0 0.015 (0.38) 0.008 (0.20) 0.320 (8.13) 0.290 (7.37) SEATING 0.023 (0.58) 0.070 (1.78) PLANE 0.014 (0.36) 0.030 (0.76) 8-Lead Narrow-Body SO (SO-8) 0.1968 (5.00) 0.1890 (4.80) 8 5 0.1574 (4.00) 0.1497 (3.80) PIN 1 1 4 0.2440 (6.20) 0.2284 (5.80) 0.0098 (0.25) 0.0040 (0.10) SEATING PLANE 0.0688 (1.75) 0.0532 (1.35) 0.0192 (0.49) 0.0138 (0.35) 8 0.0098 (0.25) 0 0.0075 (0.19) 0.0500 (1.27) 0.0160 (0.41) -16- REV. B PRINTED IN U.S.A. 0.0500 (1.27) BSC 0.0196 (0.50) 0.0099 (0.25) 45 |
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