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Features
* * * * * * * * * * * * * * *
AVR(R) 8-bit RISC Microcontroller with 83 ns Instruction Cycle Time USB Hub with One Attached and Two External Ports USB Keyboard Function with Three Endpoints 16K Bytes of Program Memory, 512 Bytes SRAM 32 x 8 General-purpose Working Registers 34 Programmable I/O Port Pins Support for 18 x 8 Keyboard Matrix Keyboard Scan Inputs with Pull-up Resistors 4 LED Driver Outputs One 8-bit Timer/Counter with Separate Prescaler External and Internal Interrupt Sources Programmable Watchdog Timer 6 MHz Oscillator with On-chip PLL 5V Operation with On-chip 3.3V Power Supply 48-lead SSOP and 48-lead LQFP
USB Multimedia Keyboard Controller AT43USB324
Overview
The Atmel AT43USB324 is a compound USB device designed for use in multimedia USB keyboards with an embedded hub. Internally, the AT43USB324 consists of a USB hub and function interface, a hub repeater, and an AVR microcontroller. To the USB host, the embedded function appears as an attached port of the hub with its own device address and three endpoints. The third function endpoint makes the AT43USB324 extremely suitable for keyboards supporting the Consumer Page as described in the USB HID Usage tables. A typical application of the AT43USB324 is shown in Figure 1 and block diagrams are shown in Figures 2 and 3. The AT43USB324 interfaces to the USB host at the transaction layer while the microcontroller firmware handles the USB protocol layers in addition to performing the keyboard control functions. Except for LEDs, no other external components are required for the keyboard function.
Pin Configurations
48-lead SSOP
PD6 PD7 XTAL1 XTAL2 LFT PE1 PE0 PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0 PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0 PC7 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 PD5 PD4 VCC CEXT VSS TEST RESET DM0 DP0 DM2 DP2 DM3 DP3 PD3 PD2 PD1 PD0 PC0 PC1 PC2 PC3 PC4 PC5 PC6
48-lead LQFP
RESET DM0 DP0 DM2 DP2 DM3 DP3 PD3 PD2 PD1 PD0 PC0 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 13 14 15 16 17 18 19 20 21 22 23 24
TEST VSS CEXT VCC PD4 PD5 PD6 PD7 XTAL1 XTAL2 LFT PE1
1 2 3 4 5 6 7 8 9 10 11 12
PC1 PC2 PC3 PC4 PC5 PC6 PC7 PA0 PA1 PA2 PA3 PA4
PE0 PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0 PA7 PA6 PA5
Rev. 1941A-02/01
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Figure 1. A Typical USB Hub/Keyboard Application
AT43USB324 XTAL1 PA[0:7] PB[0:7] XTAL2 LFT RST TEST PWR3/PD3 PWR2/PD4 OVC3/PD2 OVC2/PD1 DP0 DM0 DP2 DM2 DP3 DM3 PE[0, 1] PC[0:7] COL[0:7] COL[8:15] COL[16,17] ROW[0:7] KEYBOARD
PD[5:7]
LEDs
PD0
CEXT VCC VSS
Figure 2. USB Block Diagram (1)
USB BLOCK
DATA ADDRESS CONTROL
AVR CPU
16K ROM
OSC & PLL
512 BYTES SRAM INT UNIT PORT A PORT B PORT C PORT D PORT E
WDT
T/C0
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AT43USB324
Figure 3. USB Block Diagram (2)
PORT 0 XCVR PORT 2 XCVR
HUB REPEATER
PORT 3 XCVR SERIAL INTERFACE ENGINE
HUB INTERFACE UNIT
FUNCTION INTERFACE UNIT
DATA ADDRESS CONTROL
AVR MICROCONTROLLER
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Pin Assignment
Type: I O B U V = = = = = Input Output Bi-directional USB IO Power Supply, Ground
48-lead LQFP Pin Assignment
Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Signal TEST VSS CEXT VCC PD4 PD5 PD6 PD7 XTAL1 XTAL2 LFT PE1/CL17 PE0/CL16 PB7/CL15 PB6/CL14 PB5/CL13 PB4/CL12 PB3/CL11 PB2/CL10 PB1/CL9 PB0/CL8 PA7/CL7 PA6/CL6 PA5/CL5 Type I V V V B B B B I O O B B B B B B B B B B B B B Pin # 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Signal PA4/CL4 PA3/CL3 PA2/CL2 PA1/CL1 PA0/CL0 PC7/RW7 PC6/RW6 PC5/RW5 PC4/RW4 PC3/RW3 PC2/RW2 PC1/RW1 PC0/RW0 PD0 PD1 PD2 PD3 DP3 DM3 DP2 DM2 DP0 DM0 RESET Type B B B B B B B B B B B B B B B B B U U U U U U I
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AT43USB324
48-lead SSOP Pin Assignment
Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Signal PD6 PD7 XTAL1 XTAL2 LFT PE1/COL17 PE0/CL16 PB7/CL15 PB6/CL14 PB5/CL13 PB4/CL12 PB3/CL11 PB2/CL10 PB1/CL9 PB0/CL8 PA7/CL7 PA6/CL6 PA5/CL5 PA4/CL4 PA3/CL3 PA2/CL2 PA1/CL1 PA0/CL0 PC7/RW7 Type B B I O O B B B B B B B B B B B B B B B B B B B Pin # 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Signal PC6/RW6 PC5/RW5 PC4/RW4 PC3/RW3 PC2/RW2 PC1/RW1 PC0/RW0 PD0 PD1 PD2 PD3 DP3 DM3 DP2 DM2 DP0 DM0 RESET TEST VSS CEXT VCC PD4 PD5 Type B B B B B B B B B B B U U U U U U I I V V V B B
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Signal Description
Signal VCC CEXT VSS XTAL1 XTAL2 LFT Type V O V I O I Name and Functions Power Supply - 5V supply input External Capacitor - A high quality 0.47 F must be connected to CEXT for proper operation of the chip. Ground Oscillator Input - Input to the inverting oscillator amplifier Oscillator Output - Output of the inverting oscillator amplifier PLL Filter - For proper operation of the PLL, this pin should be connected through a 0.01 F capacitor in parallel with a 100 resistor in series with a 0.22 F capacitor to ground (VSS). Both capacitors must be high quality ceramic Upstream Plus USB I/O - This pin should be connected to CEXT1 through an external 1.5 k pull-up resistor. DP0 and DM0 form the differential signal pin pairs connected to the host controller or an upstream hub Upstream Minus USB I/O Port Plus USB I/O - Each of these pins should be connected to VSS through an external 15 k resistor. The DP[2,3] and DM[2,3] are the differential signal-pin pairs to connect downstream USB devices Port Minus USB I/O - Each of these pins should be connected to VSS through an external 15 k resistor Port A[0:7] - Bi-directional 8-bit I/O port with controlled slew rate. These pins are used as eight of the keyboard matrix column output strobes: PA[0:7] = COL[0:7] Port B[0:7] - Bi-directional 8-bit I/O port with controlled slew rate. These pins are used as the eight of the keyboard matrix column output strobes: PB[0:7] = COL[8:15] Port C[0:7] - Bi-directional 8-bit I/O port with internal pull-ups. These pins are used as keyboard matrix row input signals: PC[0:7] = ROW[0:7] Port D[0:7] - Bi-directional I/O ports. PD[4:7] have built-in series limiting resistors and can be used to drive LEDs directly. An alternate function of PD2 is as INT0 and PD3 is as INT1, the external interrupt pins Port E[0:1] - Bi-directional I/O port with controlled slew rate which can be used as two additional keyboard column output strobes: COL 16, 17 Reset - A low on this pin for two machine cycles while the oscillator is running resets the device Test Pin - This pin should be tied to ground
DP0 DM0 DP[2,3]
U U U
DM[2,3] PA[0:7]
U B
PB[0:7]
B
PC[0:7]
B
PD[0:7]
B
PE[0:1] RESET TEST
B I I
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AT43USB324
Multimedia Keyboards
Oscillator and PLL
The hardware of the AT43USB324 supports a wide variety of USB keyboards with an embedded hub. The exact configuration and function of the keyboard/hub is defined by the firmware programmed into its masked ROM. All the clock signals required to run the AT43USB324 are derived from on-chip oscillator. To reduce EMI and power dissipation, the oscillator is designed to operate with a 6 MHz crystal. An on-chip PLL generates the high frequency for the clock/data separator of the serial interface engine. In the suspended state, the oscillator circuitry is turned off. The oscillator of the AT43USB324 is of a special low drive type, designed to work with most crystals without any external components. The crystal must be of the parallel resonance type requiring a load capacitance of about 10 pF. If the crystal requires a higher value capacitance, external capacitors can be added to the two terminals of the crystal and ground to meet the required value. To assure quick startup, a crystal with a high Q, or low ESR, should be used. To meet the USB hub frequency accuracy and stability requirements for hubs, the crystal should have an accuracy and stability of better than 100 ppm. The use of a ceramic resonator in place of the crystal is not recommended because a resonator would not have the necessary frequency accuracy and stability. The clock can also be externally sourced. In this case, connect the clock source to the XTAL1 pin, while leaving XTAL2 pin floating. The switching level at the XTAL1 pin can be as low as 0.47V (see Electrical Specifications section on page 10) and a CMOS device is required to drive this pin to maintain good noise margins at the low switching level. For proper operation of the PLL, an external RC filter consisting of a series RC network of 100 and 0.22 F in parallel with a 0.01 F capacitor must be connected from the LFT pin to VSS (see Figure 4). Use only high quality ceramic capacitors. Figure 4. External RC Filter
U1 XTAL1 Y1 6.000 MHz AT43USB324
XTAL2
R1 100 LFT C2 0.01 F C1 0.22 F
I/O Pins
The keyboard matrix strobe output pins, PA[0:7], PB[0:7] and PE[0,1] have controlled slope drives. With a load of 100 pF, the output fall time ranges between 75 ns and 300 ns. The keyboard matrix strobe input pins, PC[0:7] have built-in pull-up resistors, 20 k nominal value, to the internal 3.3V power supply.
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The PD[4:7] have 5V tolerant open-drain outputs and each has a built-in series resistor of 330 nominal value. These output pins are designed for driving a LED connected to the 5V supply. The remaining GP I/O pins of the AT43USB324 are bi-directional with CMOS inputs and push-pull outputs.
Hub and Port Power Management
The embedded hub in a keyboard will most likely be a bus-powered hub even though the hardware of the AT43USB324 is designed to accommodate both types of hubs. Management of the downstream port power is also defined by the firmware - per port or global overcurrent sensing, individual or gang power switching. While the interface to the external power supply monitoring and switching is achieved through the microcontroller's I/O ports, the USB hardware of the AT43USB324 contains the circuitry to handle all the possible combinations port power management tasks. The AT43USB324 is capable of detecting an overcurrent in its downstream ports even while it is in the suspend state. Overcurrent input flag for Port 2 is routed to PD1 and for Port 3 to PD2. 1. Global Overcurrent Protection. In this mode, the Port Overcurrent Indicator and Port Overcurrent Indicator Change should be set to 0's. For the AT43USB324, an external solid state switch, such as the Micrel MIC2025, is required to switch power to both external USB ports. The FLG output of the switch should be connected to either PD0 or PD1 of the microcontroller. When an overcurrent occurs, FLG is asserted and the firmware should set the Hub Overcurrent Indicator and Hub Overcurrent Indicator Change and switch off power to the hub. 2. Individual Port Overcurrent Protection. The Hub Overcurrent Indicator and Hub Overcurrent Indicator Change bits should be set to 0's. One MIC2536 is required for the two USB ports. One FLG output of the MIC2536 should be connected to PD0 and the other to PD1 of the microcontroller. An overcurrent is indicated by FLG being asserted. The firmware sets the corresponding port's Overcurrent Indicator and the Overcurrent Indicator Change bits and switches off power to the port. At the next IN token from the host, the AT43USB324 reports the status change.
Overcurrent Sensing
Port Power Switching
1. Gang Power Switching. One of the microcontroller I/O port pins must be programmed as an output to control the external switch, PWR. Switch ON is requested by the USB host through the SetPortFeature (PORT_POWER) request. Switch OFF is executed upon receipt of a ClearPortFeature (PORT_POWER) or upon detecting an overcurrent condition. The firmware clears the Power Control Bit. Only if all BOTH of the Power Control Bits of Ports 2 AND 3 are cleared should the firmware de-assert the PWR pin. 2. Individual Power Switching. One microcontroller I/O port pin must be assigned for each USB port to control the external switch, PWRx, where x = 2, 3. Each of the Power Control Bits controls one PWRx.
Power Management Circuit
Figure 5 shows a simplified diagram of a power management circuit of an AT43USB324-based hub design with global overcurrent protection and ganged power switching.
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AT43USB324
Figure 5. Power Management Circuit Diagram
BUS_POWER
GND U1 GND VCC AT43USB324 PWR OVC
U2 CTL FLG
PORT2_POWER PORT2_GND PORT3_POWER PORT3_GND
IN SWITCH
OUT
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Electrical Specification
Absolute Maximum Ratings*
Operating Temperature.................................. -40C to +125C Storage Temperature ..................................... -65C to +150C All Input/Output Voltage .........-0.3V to VCEXT + 0.3V, 4.6V max Supply Voltage (VCC) .......................................... 4.4V to +5.5V *NOTICE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time may affect device reliability.
DC Characteristics
The values shown in this table are valid for TA = 0C to 85C, VCC = 4.4V to 5.25V, unless otherwise noted.
Power Supply
Symbol VCC ICC ICCS Parameter 5V Power Supply 5V Supply Current Suspended Device Current Min 4.4 Max 5.25 30 150 Unit V mA A
USB Signals: DPx, DMx
Symbol VIH VIHZ VIL VDI VCM VOL1 VOH1 VCRS VIN Parameter Input Level High (Driven) Input Level High (Floating) Input Level Low Differential Input Sensitivity Differential Common Mode Range Static Output Low Static Output High Output Signal Crossover Input Capacitance RL of 1.5 k to 3.6V RL of 15 k to GND 2.8 1.3 DPx and DMx 0.2 0.8 2.5 0.3 3.6 2.0 20 Condition Min 2.0 2.7 0.8 Max Unit V V V V V V V V pF
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PA, PB, PC, PD, PE
Symbol VOL2 RPU VIL3 VIH3 VIL4 VIH4 VOL4 VOH4 C Parameter Output Low Level, PA, PB, PE0,1 PC Pull-up Resistor Current Input Low Level, PC Input High Level, PC Input Low Level, PD[0:3] Input High Level, PD[0:3] Output Low Level, PD[0:3] Output High Level, PD[0:3] Input/Output Capacitance IOL = 4 mA IOH = 4 mA 1 MHz 0.7 VCEXT 10 0.7 VCEXT 0.3 VCEXT 0.7 VCEXT 0.3 VCEXT Condition IOL = 4 mA V=0 90 Min Max 0.5 280 0.3 VCEXT Unit V A V V V V V V pF
Oscillator Signals: XTAL1, XTAL2
Symbol VLH VHL CX1 CX2 C12 tSU DL Note: Parameter XTAL1 Switching Level XTAL2 Switching Level Input Capacitance, XTAL1 Output Capacitance, XTAL2 XTAL1/2 Capacitance Start-up Time Drive Level XTAL2 must not be used to drive other circuitry. 6 MHz, Fundamental Condition Min 0.47 0.67 Max 1.20 1.44 10 10 5 2 50 Unit V V pF pF pF ms W
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AC Characteristics
DPx, DMx Driver Characteristics, Full Speed Operation
Symbol tR tF tRFM ZDRV Note: Parameter Rise Time Fall Time tR/tF Matching Driver Output Resistance
(1)
Condition CL = 50 pF CL = 50 pF
Min 4 4 90
Max 20 20 110 44
Unit ns ns %
Steady State Drive
28
1. With external 27 series resistor.
DPx, DMx Source Timings, Full Speed Operation
Symbol tDRATE tFRAME tRFI tRFIADJ tDJ1 tDJ2 tFDEOP tDEOP tJR1 tJR2 tFEOPT tFEOPR tFST Note: Parameter Full Speed Data Rate(1) Frame Interval
(1) (1)
Condition Average Bit Rate
Min 11.97 0.9995
Max 12.03 1.0005 42 126
Unit Mb/s ms ns ns
Consecutive Frame Interval Jitter
No Clock Adjustment With Clock Adjustment -2 -1 -2 -2 -18.5 -9 160 82
Consecutive Frame Interval Jitter(1) Source Differential Driver Jitter To Next Transition For Paired Transitions Source Jitter for Differential Transition to SEO Transitions Differential to EOP Transition Skew Receiver Data Jitter Tolerance To Next Transition For Paired Transitions Source SEO Interval of EOP Receiver SEO Interval of EOP Width of SEO Interval during Differential Transition 1. With 6.000 MHz, 100 ppm crystal.
2 1 5 5 18.5 9 175
ns
ns ns ns ns ns
14
ns
DPx, DMx Driver Characteristics, Low Speed Operation
Symbol tR tF tRFM Parameter Rise Time Fall Time tR/tF Matching Condition CL = 200 - 600 pF CL = 200 - 600 pF Min 75 75 80 Max 300 300 125 Unit ns ns %
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DPx, DMx Hub Timings, Full Speed Operation
Symbol tHDD2 tHDJ1 tHDJ2 tFSOP tFEOPD tFHESK Parameter Hub Differential Data Delay without Cable Hub Differential Driver Jitter To Next Transition For Paired Transitions Data Bit Width Distortion after SOP Hub EOP Delay Relative to tHDD Hub EOP Output Width Skew -3 -1 -5 0 -15 Min Max 44 3 1 5 15 15 Unit ns ns ns ns ns
DPx, DMx Hub Timings, Low Speed Operation
Symbol tLHDD tLHDJ1 tLHDJ2 tLUHJ1 tLUHJ2 tSOP tLEOPD tLHESK Parameter Hub Differential Data Delay Downstream Hub Differential Driver Jitter To Next Transition, Downstream For Paired Transitions, Downstream To Next Transition, Upstream for Paired Transitions, Upstream Data Bit Width Distortion after SOP Hub EOP Delay Relative to tHDD Hub EOP Output Width Skew -45 -15 -45 -45 -60 0 -300 Min Max 300 45 15 45 45 60 200 300 Unit ns
ns
ns ns ns
Hub Event Timings
Symbol tDCNN tDDIS tURSM tDRST Parameter Time to Detect a Downstream Port Connect Event Time to Detect a Disconnect Event on Downstream Port Awake Hub Suspended Hub Time from Detecting Downstream Resume to Rebroadcast Duration of Driving Reset to a Downstream Device Only for a SetPortFeature (PORT_RESET) Request 10 Condition Min 2.5 2.5 2.5 Max 2000 2000 12000 100 20 Unit s s s ms
tDSPDEV tURLK tURLSEO tURPSEO tUDEOP
Time to Evaluate Device Speed after Reset Time to Detect a Long K from Upstream Time to Detect a Long SEO from Upstream Duration of Repeating SEO Upstream Duration of Sending SEO Upstream after EOF1
2.5 2.5 2.5
1000 5.5 5.5 23 2
s s s FS Bits FS Bits
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Typical Application
The Atmel sample version of the AT43USB324 contains firmware that supports customization of the Vendor ID, Product ID, String Descriptor and the Keyboard Matrix. This information is stored in an external AT24C02A Serial EEPROM. Data in the EEPROM is stored in the following format.
Address range 0x00 - 0x01 0x02 - 0x03 0x04 Onwards Content EEPROM's Signature Mask Bits VID, PID and Strings Initial Check Byte 0x70 - 0xFF Keyboard Matrix
Detailed Description
EEPROM's Signature
Address Location 0x00 0x01 Value/Content 0x17 0x5A
Mask Bits
The mask bits identify what features are stored in the EEPROM. A "1" in the mask bit location means that the feature is stored and should be read. A "0", not stored and should not be read.
Address Location 0x02
Remark Mask 2 - Reserved for Future Use Mask 1
0x03
Bit 0: VID, PID, Version
Bit 1: Language String
Bit 2: Manufacturer String
Bit 3: Product String
Bit 4: Serial Number String
Bit 5: Extra Hot Key Codes
Bit 6: Reserved
Bit 7: Keyboard Matrix
Address locations 0x04 through 0x6E store the VID, PID and String Descriptors if they are enabled by the mask bits in location 0x03. The data are stored sequentially as described below. VID and PID
VID Byte 1 VID Byte 2 PID Byte 1 PID Byte 2 Release # Byte 1 Release # Byte 2 Check Byte
Language ID and Strings
Length (N) Byte 1 Byte 2 Byte N - 1 Check Byte
Initial Check Byte
This check byte is located immediately after the last VID, PID or strings. It is computed as the truncated sum of Mask 1 and all the string length specified.
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Keyboard Matrix 144 bytes. If specified, its check byte is located in address 0x6F while the matrix itself is located from address 0x70 - 0xFF.
0x70 = Col 1, Row 1 0x71 = Col 1, Row 2 ....... 0x78 = Col 2, Row 1 0x79 = Col 2, Row 2 ...... 0xF8 = Col 18, Row 1 0xF9 = Col 18, Row 2 ..... 0xFF = Col 18, Row 8
Example of EEPROM Data
Address 00 01 02 03 Data 17 5A 00 BF Description Fixed ID Fixed ID Reserved Mask Bits
The mask bits in location 03 are used to indicate whether a particular function is supported or not.
0 = Function not Supported 1 = Function Supported Bit7 = Keyboard Matrix Bit6 = Reserved. Must be Set to 0 Bit5 = Extra Hot Key USB Codes Bit4 = Serial Number String Bit3 = Product String Bit2 = Manufacturer String Bit1 = Language ID String Bit0 = VendorID, ProductID, Version.
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Vendor ID, Product ID, Version Number
Address 04 05 06 07 08 09 0A Data 5E 04 1D 00 11 01 91 Description Vendor ID Vendor ID Product ID Product ID Version Number Version Number Checksum
Language ID
Address 0B 0C 0D 0E 0F Data 04 03 09 10 20 Checksum Description Number of Bytes The Next 3 Bytes Specifies the Language ID
Manufacturer String
Address 10 11 12 13 14 15 16 17 18 19 1A 1B 1C Data 0C 03 41 00 74 00 6D 00 65 00 6C 00 02 Checksum L E M T A Description Number of Bytes, 2 Bytes per Character
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Product String
Address 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F Data 12 03 4D 00 4D 00 4B 00 42 00 44 00 48 00 55 00 42 00 5F Checksum B U H D B K M M Description Number of Bytes
Serial Number String
Address 30 31 32 33 34 35 36 37 38 Data 08 03 31 00 32 00 33 00 A1 Checksum 3 2 1 Description Number of Bytes
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Extra Hot Keys
Address 39 3A 3B 3C 3D 3E 3F 40 Data 07 D0 23 02 D1 8A 01 58 Description Number of Bytes KB Matrix Code First Byte Sent to Host Second Byte Sent to Host KB Matrix Code First Byte Sent to Host Second Byte Sent to Host Checksum
Miscellaneous Data
Address 41 Data F0 Description Checksum of Mask Byte + Bytes in Language ID + Bytes in Manuf String + Bytes in Product String + Bytes in Serial Number + Bytes in Extra Hot Keys (BF + 04 + 0C + 12 + 08 + 07 = F0) Don't Cares. May be Written with 0's 2D Checksum of Keyboard Matrix Codes
42 through 6E 6F
Keyboard Matrix
Address 70 71 72 73 74 75 76 77 78 79 7A 7B Data 28 31 50 3F 30 3E 2A 2E 36 07 06 25 KB Row 0 1 2 3 4 5 6 7 0 1 2 3 KB Col 0 0 0 0 0 0 0 0 1 1 1 1 Description KB Enter KB \ Left Arrow F6 ] F5 Backspace = Comma D C KB 8
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Keyboard Matrix (Continued)
Address 7C 7D 7E 7F 80 81 82 83 84 85 86 87 88 89 8A 8B 8C 8D 8E 8F 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9E 9F Data 0E 20 08 0C 63 5E 5B 3D 61 3C 4C 49 37 2F 0F 41 12 40 2D 26 05 0A 19 22 09 21 17 15 13 34 38 43 33 42 41 27 KB Row 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 KB Col 1 1 1 1 2 2 2 2 2 2 2 2 3 3 3 3 3 3 3 3 4 4 4 4 4 4 4 4 5 5 5 5 5 5 5 5 Description K KB 3 E I KP Period KP 6 KP 3 F4 KP 9 F3 Delete Insert Period [ L F8 O F7 9 B G V 5 F 4 T R P Quote / F10 ; F9 Down Arrow 0
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Keyboard Matrix (Continued)
Address A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF C0 C1 C2 C3 Data 10 0D 11 24 0B 23 18 1C 68 69 6A 2C 78 4F E7 52 62 5D 5A 45 60 44 4D 4A 59 5C 57 65 5F 46 55 54 1B 1A 16 3B KB Row 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3 KB Col 6 6 6 6 6 6 6 6 7 7 7 7 7 7 7 7 8 8 8 8 8 8 8 8 9 9 9 9 9 9 9 9 10 10 10 10 Right Arrow Right GUI Up Arrow KP 0 KP 5 KP 2 F12 KP 8 F11 End Home KP 1 KP 4 KP + Application KP 7 Print Screen KP * KP / X W S F2 Space Description M J N 7 H 6 U Y
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Keyboard Matrix (Continued)
Address C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF E0 E1 E2 E3 E4 E5 E6 E7 Data 1F 3A 4E 4B E4 6B D5 D4 E0 C0 39 D6 1D 04 6D 35 14 29 2B 1E 6E C9 70 71 B0 72 73 74 E5 C8 C1 C2 E1 48 C4 C3 KB Row 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 KB Col 10 10 10 10 11 11 11 11 11 11 11 11 12 12 12 12 12 12 12 12 13 13 13 13 13 13 13 13 14 14 14 14 14 14 14 14 Right Shift HK Vol Increment HK Play/Pause HK Scan Next Left Shift Pause HK Stop HK Scan Previous HK Mute HK Vol Decrement ~ Q Escape Tab 1 HK Calculator HK Media L HK Suspend Caps Lock HK My Comp Z A Description 2 F1 Page Down Page Up Right Ctrl
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Keyboard Matrix (Continued)
Address E8 E9 EA EB EC ED EE EF F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF Data D1 E2 E6 53 DF 56 D9 D0 DD 74 DE 58 DC 47 DB E3 00 00 00 00 00 00 00 00 KB Row 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 KB Col 15 15 15 15 15 15 15 15 16 16 16 16 16 16 16 16 17 17 17 17 17 17 17 17 HK Refresh KP Enter HK Forward Scroll Lock HK Back Left GUI Description HK WWW Left Alt Right Alt KP Num Lock HK Bookmark KP HK Search HK e-mail HK AC Stop
The following two pages show a schematic diagram of an AT43USB324 keyboard with an embedded hub and its Bill of Materials information.
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VBUS L1 FB J1 USB-B 1 2 3 4 C9 0.1 UF
AT43USB324 Keyboard Schematic Diagram
SCAN OUTPUTS
U1 4 VC C PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PE0 PE1 3 48 1 47 46 45 44 43 42
CEXT C4 0.1 UF C6 0.47 UF R8 1.5 K R2 27 L3 FB R3 27 R4 27 R5 27 R6 27 + C13 47 pF 9 C16 47 pF R1 100 C1 0.22 UF D3 D2 Scroll Lock Cap Lock C17 47 pF C18 47 pF VBUS L6 FB + D1 Num Lock C12 100 UF C14 47 pF C15 47 pF R7 27 15 15 15 KKK R9 R1 R1 01 15 K R1 2 C11 100 UF L5 FB L4 FB + C5 4.7 UF L2 FB
SCANO_0 SCANO_1 SCANO_2 SCANO_3 SCANO_4 SCANO_5 SCANO_6 SCANO_7 SCANO_8 SCANO_9 SCANO_10 SCANO_11 SCANO_12 SCANO_13 SCANO_14 SCANO_15 SCANO_16 SCANO_17
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12
CE RE TE XT SE ST TN
DM0 DP0 DM2 DP2 DM3 DP3
J2 USB-A 1 2 3 4 C10 0.1 UF
AT43USB324_AC
XTAL1
J3 USB-A 4 3 2 1
Y1 6.000 MHz 10 XTAL2 LFT 11 C2 0.01 UF
SCANI_0 SCANI_1 SCANI_2 SCANI_3 SCANI_4 SCANI_5 SCANI_6 SCANI_7
37 36 35 34 33 32 31 30
PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7
PD5 PD6 PD7 PD4 PD3 PD1 PD2 VS S 2 PD0
6 7 8 5 41 39 40 38 R17 15K
R15 100K
R16 100K 7 1 4 2 3
U3 IN CTLA CTLB FLGA FLGB OUTA OUTB GND 8 5 6
SCAN INPUTS
CEXT
MIC2526-2
U2 1 2 3 4 A0 VCC A1 WP A2 SSCL GND SDA AT24C02A 8 7 6 5
15 K R1 3
15 K R1 4
SCANO 13
AT43USB324
SCANO 16 SCANO 17 Title LQFP AT43USB324-AC USB Keyboard With Embedded Hub Size A Date: Document Number USB324_REF6A Monday, August 21, 2000 Sheet 1 of 1 Rev 1.0
23
Bill of Materials
Item 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Quantity 1 1 3 1 1 2 6 1 2 3 6 1 6 1 7 2 1 1 1 1 Reference C1 C2 C4,C9,C10 C5 C6 C12,C11 C13,C14,C15,C16,C17,C18 J1 J2,J3 D1,D2,D3 L1,L2,L3,L4,L5,L6 R1 R2,R3,R4,R5,R6,R7 R8 R9,R10,R11,R12,R13,R14,R17 R15,R16 U1 U2 U3 Y1 Part 0.22 F, Ceramic, Kemet C1812C224K5RAC 0.01 F, Ceramic, Kemet C0805C103K5RAC 0.1 F, Ceramic, Kemet C1206C104M5UAC 4.7 F, Electrolytic, Panasonic ECE-V1ES4R7SR 0.27 F, Ceramic, Kemet C1210C274M5UAC 100 FD, Electrolytic, Panasonic ECE-V1AA101SP 47 pF, Ceramic, Kemet C1206C470J5GACTR USB-B, Series B Connector USB-A, Series A Connector LED, Green Ferrite Bead, Stewart HI 1806 N 750 R 100, Panasonic ERJ-GEYJ100 27, Panasonic ERJ-GEYJ27 1.5K, Panasonic ERJ-GEYJ1.5K 15K, Panasonic ERJ-GEYJ15K 100K, Panasonic ERJ-GEYJ100K AT43USB324-AC AT24C02A MIC2526-2BM 6.000 MHz Crystal, CTS ATS060SM-T Supplier Newark 99F6389 Newark 93F2330 Newark 89F5966 Digikey PCE3065CT-ND Newark 93F241 Digikey PCE3176CT-ND Newark 93F2371 AMP 787780-1 AMP 787616-1 Jameco 34606, XC2 Digikey 240-1-11-1-ND Digikey P-100-ACT-ND Digikey P-27-ACT-N Digikey P-1.5K-ACT-ND Digikey P-15K-ACT-ND Digikey P-100K-ACT-ND Atmel Atmel Micrel Digikey CTX505CT-ND
24
AT43USB324
1941A-02/01
AT43USB324
Packaging Information
48A, 48-lead, Low-profile (1.4 mm) Plastic Quad Flat Package (LQFP) Dimensions in Millimeters and (Inches)*
JEDEC STANDARD MS-026 ACB
48Y, 48-lead, 7.62 mm Wide, Plastic Shrink Small Outline (SSOP) Dimensions in Millimeters and (Inches)*
PIN 1 ID
9.25(.364) SQ 8.75(.344)
0.50(0.020) BSC
0.27(0.011) 0.17(0.007)
7.391 (.291) 7.595 (.299)
10.033 (.395) 10.668 (.420)
.635 (.025)
7.1(0.280) SQ 6.9(0.272) 1.60(0.063) MAX 0.20(.008) 0.09(.003) 0 7
.203 (.0080) .343 (.0135) 2.413 (.095) 2.794 (.110) 0.000 (.000) 0.000 (.000) .127 (.005) .254 (.010)
.203 (.008) .406 (.016)
0.75(0.030) 0.45(0.018)
0.15(0.006) 0.05(0.002)
0 REF 8
0.508 (.02) 1.016 (.04)
*Controlling dimension: millimeters
*Controlling dimension: millimeters
25
1941A-02/01
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(c) Atmel Corporation 2001. Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company's standard warranty which is detailed in Atmel's Terms and Conditions located on the Company's web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel's products are not authorized for use as critical components in life support devices or systems. Marks bearing
(R)
and/or
TM
are registered trademarks and trademarks of Atmel Corporation.
Terms and product names in this document may be trademarks of others.
Printed on recycled paper.
1941A-02/01/xM

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