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| AT93C46/56/57/66 Features * * * * * * * * Low Voltage and Standard Voltage Operation 5.0 (VCC = 4.5V to 5.5V) 2.7 (VCC = 2.7V to 5.5V) 2.5 (VCC = 2.5V to 5.5V) 1.8 (VCC = 1.8V to 5.5V) User Selectable Internal Organization 1K: 128 x 8 or 64 x 16 2K: 256 x 8 or 128 x 16 4K: 512 x 8 or 256 x 16 3-Wire Serial Interface 2 MHz Clock Rate (5V) Compatibility Self-Timed Write Cycle (10 ms max) High Reliability Endurance: 1 Million Cycles Data Retention: 100 Years Automotive Grade and Extended Temperature Devices Available 8-Pin PDIP, JEDEC SOIC, and EIAJ SOIC Packages 3-Wire Serial CMOS E2PROMs 1K (128 x 8 or 64 x 16) 2K (256 x 8 or 128 x 16) 4K (512 x 8 or 256 x 16) Description The AT93C46/56/57/66 provides 1024/2048/4096 bits of serial electrically erasable programmable read only memory (EEPROM) organized as 64/128/256 words of 16 bits each, when the ORG Pin is connected to VCC and 128/256/512 words of 8 bits each when it is tied to ground. The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential. The AT93C46/56/57/66 is available in space saving 8-pin PDIP and 8-pin JEDEC and EIAJ SOIC packages. (continued) Pin Configurations Pin Name CS SK DI DO GND VCC ORG DC Function Chip Select Serial Data Clock Serial Data Input Serial Data Output Ground Power Supply Internal Organization Don't Connect 8-Pin PDIP AT93C46/56/57/66 8-Pin SOIC 8-Pin SOIC Rotated (R) (1K JEDEC Only) 0172J 2-63 Description (Continued) The AT93C46/56/57/66 is enabled through the Chip Select pin (CS), and accessed via a 3-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift Clock (SK). Upon receiving a READ instruction at DI, the address is decoded and the data is clocked out serially on the data output pin DO. The WRITE cycle is completely self-timed and no separate ERASE cycle is required before WRITE. The WRITE cycle is only enabled when the part is in the ERASE/WRITE ENABLE state. When CS is brought "high" following the initiation of a WRITE cycle, the DO pin outputs the READY/BUSY status of the part. The AT93C46/56/57/66 is available in 4.5V to 5.5V, 2.7V to 5.5V, 2.5V to 5.5V, and 1.8V to 5.5V versions. Absolute Maximum Ratings* Operating Temperature................... -55C to +125C Storage Temperature...................... -65C to +150C Voltage on Any Pin with Respect to Ground ..................... -1.0V to +7.0V Maximum Operating Voltage ........................... 6.25V DC Output Current ......................................... 5.0 mA *NOTICE: Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Block Diagram (1) Note: 1. When the ORG pin is connected to VCC , the x 16 organization is selected. When it is connected to ground, the x 8 organization is selected. If the ORG pin is left unconnected, then an internal pullup device (of approximately 1 M) will select the x 16 organization. This feature is not available on 1.8V devices. 2-64 AT93C46/56/57/66 AT93C46/56/57/66 Pin Capacitance (1) Applicable over recommended operating range from TA = 25C, f = 1.0 MHz, VCC = +5.0V (unless otherwise noted). Test Conditions COUT CIN Note: Max 5 5 Units pF pF Conditions VOUT = 0V VIN = 0V Output Capacitance (DO) Input Capacitance (CS, SK, DI) 1. This parameter is characterized and is not 100% tested. DC Characteristics Applicable over recommended operating range from: TAI = -40C to +85C, VCC = +1.8V to +5.5V, TAC = 0C to +70C, VCC = +1.8V to +5.5V (unless otherwise noted). Symbol VCC1 VCC2 VCC3 VCC4 ICC Parameter Supply Voltage Supply Voltage Supply Voltage Supply Voltage READ at 1.0 MHz WRITE at 1.0 MHz CS = 0V CS = 0V CS = 0V CS = 0V Test Condition Min 1.8 2.5 2.7 4.5 0.5 0.5 0 6.0 6.0 17 0.1 0.1 -0.1 2.0 0.0 VCC x 0 .7 IOL = 2.1 mA IOH = -0.4 mA IOL = 0.15 mA IOH = -100 A VCC - 0.2 2.4 0.2 Typ Max 5.5 5.5 5.5 5.5 2.0 2.0 0.1 10.0 10.0 30 1.0 1.0 0.8 VCC + 1 VCC x 0.3 VCC + 1 0.4 Unit V V V V mA mA A A A A A A V V V V V V Supply Current VCC = 5.0V ISB1 ISB2 ISB3 ISB4 IIL IOL VIL1 (1) VIH1 (1) VIL2 (1) VIH2 (1) VOL1 VOH1 VOL2 VOH2 Note: Standby Current Standby Current Standby Current Standby Current Input Leakage Output Leakage Input Low Voltage Input High Voltage Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage Output Low Voltage Output High Voltage VCC = 1.8V VCC = 2.5V VCC = 2.7V VCC = 5.0V VIN = 0V to VCC VIN = 0V to VCC 4.5V VCC 5.5V 1.8V VCC 2.7V 4.5V VCC 5.5V 1.8V VCC 2.7V 1. VIL min and VIH max are reference only and are not tested. 2-65 AC Characteristics Applicable over recommended operating range from TA = -40C to + 85C, VCC = As Specified, CL = 1 TTL Gate and 100 pF (unless otherwise noted). Symbol fSK Parameter SK Clock Frequency Test Condition 4.5V VCC 2.7V VCC 2.5V VCC 1.8V VCC 4.5V VCC 2.7V VCC 2.5V VCC 1.8V VCC 4.5V VCC 2.7V VCC 2.5V VCC 1.8V VCC 4.5V VCC 2.7V VCC 2.5V VCC 1.8V VCC 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 4.5V VCC 2.7V VCC 2.5V VCC 1.8V VCC 4.5V VCC 2.7V VCC 2.5V VCC 1.8V VCC 4.5V VCC 2.7V VCC 2.5V VCC 1.8V VCC 4.5V VCC 2.7V VCC 2.5V VCC 1.8V VCC 4.5V VCC 2.7V VCC 2.5V VCC 1.8V VCC 4.5V VCC 2.7V VCC 2.5V VCC 1.8V VCC 4.5V VCC 2.7V VCC 2.5V VCC 1.8V VCC 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 5.5V 0.1 4.5V VCC 5.5V 1 Min 0 0 0 0 250 250 500 1000 250 250 500 1000 250 250 500 1000 50 50 100 200 100 100 200 400 0 100 100 200 400 250 250 500 1000 250 250 500 1000 250 250 500 1000 100 100 200 400 10 Typ Max 2 1 0.5 0.25 Units MHz tSKH SK High Time ns tSKL SK Low Time ns tCS Minimum CS Low Time ns tCSS CS Setup Time Relative to SK ns tDIS tCSH tDIH DI Setup Time CS Hold Time DI Hold Time Relative to SK Relative to SK Relative to SK ns ns ns tPD1 Output Delay to `1' AC Test ns tPD0 Output Delay to `0' AC Test ns tSV CS to Status Valid AC Test ns tDF CS to DO in High Impedance AC Test CS = VIL ns ms ms tWP Write Cycle Time 2-66 AT93C46/56/57/66 AT93C46/56/57/66 Instruction Set for the AT93C46 Instruction READ EWEN ERASE WRITE ERAL WRAL EWDS SB 1 1 1 1 1 1 1 Op Code 10 00 11 01 00 00 00 Address x8 A6 - A0 11XXXXX A6 - A0 A6 - A0 10XXXXX 01XXXXX 00XXXXX x 16 A5 - A0 11XXXX A5 - A0 A5 - A0 10XXXX 01XXXX 00XXXX D7 - D0 D15 - D0 D 7 - D0 D15 - D0 x8 Data x 16 Comments Reads data stored in memory, at specified address. Write enable must precede all programming modes. Erase memory location An - A0. Writes memory location An - A0. Erases all memory locations. Valid only at VCC = 4.5V to 5.5V. Writes all memory locations. Valid only at VCC = 4.5V to 5.5V. Disables all programming instructions. Instruction Set for the AT93C57 Instruction READ EWEN ERASE WRITE ERAL WRAL EWDS SB 1 1 1 1 1 1 1 Op Code 10 00 11 01 00 00 00 Address x8 A7 - A0 11XXXXXX A7 - A0 A7 - A0 10XXXXXX 01XXXXXX 00XXXXXX x 16 A6 - A0 11XXXXX A6 - A0 A6 - A0 10XXXXX 01XXXXX 00XXXXX D7 - D0 D15 - D0 D 7 - D0 D15 - D0 x8 Data x 16 Comments Reads data stored in memory, at specified address. Write enable must precede all programming modes. Erase memory location An - A0. Writes memory location An - A0. Erases all memory locations. Valid only at VCC = 4.5V to 5.5V. Writes all memory locations. Valid only at VCC = 4.5V to 5.5V. Disables all programming instructions. 2-67 Instruction Set for the AT93C56 and AT93C66 Instruction READ EWEN ERASE WRITE ERAL WRAL EWDS SB 1 1 1 1 1 1 1 Op Code 10 00 11 01 00 00 00 Address x8 A8 - A0 11XXXXXXX A8 - A0 A8 - A0 10XXXXXXX 01XXXXXXX 00XXXXXXX x 16 A7 - A0 11XXXXXX A7 - A0 A7 - A0 10XXXXXX 01XXXXXX 00XXXXXX D7 - D0 D15 - D0 D7 - D0 D15 - D0 x8 Data x 16 Comments Reads data stored in memory, at specified address. Write enable must precede all programming modes. Erases memory location An - A0. Writes memory location An - A0. Erases all memory locations. Valid only at VCC = 4.5V to 5.5V. Writes all memory locations. Valid when VCC = 5.0V 10% and Disable Register cleared. Disables all programming instructions. 2-68 AT93C46/56/57/66 AT93C46/56/57/66 Functional Description The AT93C46/56/57/66 is accessed via a simple and versatile 3-wire serial communication interface. Device operation is controlled by seven instructions issued by the host processor. A valid instruction starts with a rising edge of CS and consists of a Start Bit (logic `1') followed by the appropriate Op Code and the desired memory Address location. READ (READ): The Read (READ) instruction contains the Address code for the memory location to be read. After the instruction and address are decoded, data from the selected memory location is available at the serial output pin DO. Output data changes are synchronized with the rising edges of serial clock SK. It should be noted that a dummy bit (logic `0') precedes the 8 or 16 bit data output string. ERASE/WRITE (EWEN): To assure data integrity, the part automatically goes into the Erase/Write Disable (EWDS) state when power is first applied. An Erase/Write Enable (EWEN) instruction must be executed first before any programming instructions can be carried out. Please note that once in the Erase/Write Enable state, programming remains enabled until an Erase/Write Disable (EWDS) instruction is executed or VCC power is removed from the part. ERASE (ERASE): The Erase (ERASE) instruction programs all bits in the specified memory location to the logical `1' state. The self-timed erase cycle starts once the ERASE instruction and address are decoded. The DO pin outputs the READY/BUSY status of the part if CS is brought high after being kept low for a minimum of 250 ns (tCS). A logic `1' at pin DO indicates that the selected memory location has been erased, and the part is ready for another instruction. WRITE (WRITE): The Write (WRITE) instruction contains the 8 or 16 bits of data to be written into the specified memory location. The self-timed programming cycle starts after the last bit of data is received at serial data input pin DI. The DO pin outputs the READY/BUSY status of the part if CS is brought high after being kept low for a minimum of 250 ns (tCS). A logic `0' at DO indicates that programming is still in progress. A logic `1' indicates that the memory location at the specified address has been written with the data pattern contained in the instruction and the part is ready for further instructions. A READY/BUSY status cannot be obtained if the CS is brought high after the end of the self-timed programming cycle, tWP. ERASE ALL (ERAL): The Erase All (ERAL) instruction programs every bit in the memory array to the logic `1' state and is primarily used for testing purposes. The DO pin outputs the READY/BUSY status of the part if CS is brought high after being kept low for a minimum of 250 ns (tCS). The ERAL instruction is valid only at VCC = 5.0V 10%. WRITE ALL (WRAL): The Write All (WRAL) instruction programs all memory locations with the data patterns specified in the instruction. The DO pin outputs the READY/BUSY status of the part if CS is brought high after being kept low for a minimum of 250 ns (tCS). The WRAL instruction is valid only at VCC = 5.0V 10%. ERASE/WRITE DISABLE (EWDS): To protect against accidental data disturb, the Erase/Write Disable (EWDS) instruction disables all programming modes and should be executed after all programming operations. The operation of the READ instruction is independent of both the EWEN and EWDS instructions and can be executed at any time. Timing Diagrams Synchronous Data Timing Note: 1. This is the minimum SK period. (continued) 2-69 Organization Key for Timing Diagrams AT93C46 (1K) I/O AN DN Note: AT93C56 (2K) x8 A8 (1) AT93C57 (2K) x8 A7 D7 x 16 A6 D15 AT93C66 (4K) x8 A8 D7 x 16 A7 D15 x8 A6 D7 x 16 A5 D15 x 16 A7 D15 D7 1. A8 is a DON'T CARE value, but the extra clock is required. Timing Diagrams (Continued) READ Timing EWEN Timing EWDS Timing (continued) 2-70 AT93C46/56/57/66 AT93C46/56/57/66 Timing Diagrams (Continued) WRITE Timing WRAL Timing (1) Note: 1. Valid only at VCC = 4.5V to 5.5V. ERASE Timing (continued) 2-71 Timing Diagrams (Continued) TERAL Timing (1) Note: 1. Valid only at VCC = 4.5V to 5.5V. 2-72 AT93C46/56/57/66 AT93C46/56/57/66 Ordering Information tWP (max) (ms) 10 ICC (max) (A) 2000 ISB (max) (A) 30.0 fMAX (kHz) 2000 Ordering Code AT93C46-10PC AT93C46-10SC AT93C46R-10SC AT93C46W-10SC AT93C46-10PC-2.7 AT93C46-10SC-2.7 AT93C46R-10SC-2.7 AT93C46W-10SC-2.7 AT93C46-10PC-2.5 AT93C46-10SC-2.5 AT93C46R-10SC-2.5 AT93C46W-10SC-2.5 AT93C46-10PC-1.8 AT93C46-10SC-1.8 AT93C46R-10SC-1.8 AT93C46W-10SC-1.8 AT93C46-10PI AT93C46-10SI AT93C46R-10SI AT93C46W-10SI AT93C46-10PI-2.7 AT93C46-10SI-2.7 AT93C46R-10SI-2.7 AT93C46W-10SI-2.7 AT93C46-10PI-2.5 AT93C46-10SI-2.5 AT93C46R-10SI-2.5 AT93C46W-10SI-2.5 AT93C46-10PI-1.8 AT93C46-10SI-1.8 AT93C46R-10SI-1.8 AT93C46W-10SI-1.8 Package 8P3 8S1 8S1 8S2 8P3 8S1 8S1 8S2 8P3 8S1 8S1 8S2 8P3 8S1 8S1 8S2 8P3 8S1 8S1 8S2 8P3 8S1 8S1 8S2 8P3 8S1 8S1 8S2 8P3 8S1 8S1 8S2 Operation Range Commercial (0C to 70C) 10 800 10.0 1000 Commercial (0C to 70C) 10 600 10.0 500 Commercial (0C to 70C) 10 80 0.1 250 Commercial (0C to 70C) 10 2000 30.0 2000 Industrial (-40C to 85C) 10 800 10.0 1000 Industrial (-40C to 85C) 10 600 10.0 500 Industrial (-40C to 85C) 10 80 0.1 250 Industrial (-40C to 85C) 2-73 Ordering Information Package Type 8P3 8S1 8S2 8 Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8 Lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8 Lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC) Options Blank -2.7 -2.5 -1.8 R Standard Device (4.5V to 5.5V) Low Voltage (2.7V to 5.5V) Low Voltage (2.5V to 5.5V) Low Voltage (1.8V to 5.5V) Rotated Pinout 2-74 AT93C46/56/57/66 AT93C46/56/57/66 Ordering Information tWP (max) (ms) 10 ICC (max) (A) 2000 ISB (max) (A) 30.0 fMAX (kHz) 2000 Ordering Code AT93C56-10PC AT93C56-10SC AT93C56W-10SC AT93C56-10PC-2.7 AT93C56-10SC-2.7 AT93C56W-10SC-2.7 AT93C56-10PC-2.5 AT93C56-10SC-2.5 AT93C56W-10SC-2.5 AT93C56-10PC-1.8 AT93C56-10SC-1.8 AT93C56W-10SC-1.8 AT93C56-10PI AT93C56-10SI AT93C56W-10SI AT93C56-10PI-2.7 AT93C56-10SI-2.7 AT93C56W-10SI-2.7 AT93C56-10PI-2.5 AT93C56-10SI-2.5 AT93C56W-10SI-2.5 AT93C56-10PI-1.8 AT93C56-10SI-1.8 AT93C56W-10SI-1.8 Package 8P3 8S1 8S2 8P3 8S1 8S2 8P3 8S1 8S2 8P3 8S1 8S2 8P3 8S1 8S2 8P3 8S1 8S2 8P3 8S1 8S2 8P3 8S1 8S2 Operation Range Commercial (0C to 70C) Commercial (0C to 70C) Commercial (0C to 70C) Commercial (0C to 70C) Industrial (-40C to 85C) Industrial (-40C to 85C) Industrial (-40C to 85C) Industrial (-40C to 85C) 10 800 10.0 1000 10 600 10.0 500 10 80 0.1 250 10 2000 30.0 2000 10 800 10.0 1000 10 600 10.0 500 10 80 0.1 250 Package Type 8P3 8S1 8S2 8 Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8 Lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8 Lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC) Options Blank -2.7 -2.5 -1.8 Standard Device (4.5V to 5.5V) Low Voltage (2.7V to 5.5V) Low Voltage (2.5V to 5.5V) Low Voltage (1.8V to 5.5V) 2-75 Ordering Information tWP (max) (ms) 10 ICC (max) (A) 2000 ISB (max) (A) 30.0 fMAX (kHz) 2000 Ordering Code AT93C57-10PC AT93C57-10SC AT93C57W-10SC AT93C57-10PC-2.7 AT93C57-10SC-2.7 AT93C57W-10SC-2.7 AT93C57-10PC-2.5 AT93C57-10SC-2.5 AT93C57W-10SC-2.5 AT93C57-10PC-1.8 AT93C57-10SC-1.8 AT93C57W-10SC-1.8 AT93C57-10PI AT93C57-10SI AT93C57W-10SI AT93C57-10PI-2.7 AT93C57-10SI-2.7 AT93C57W-10SI-2.7 AT93C57-10PI-2.5 AT93C57-10SI-2.5 AT93C57W-10SI-2.5 AT93C57-10PI-1.8 AT93C57-10SI-1.8 AT93C57W-10SI-1.8 Package 8P3 8S1 8S2 8P3 8S1 8S2 8P3 8S1 8S2 8P3 8S1 8S2 8P3 8S1 8S2 8P3 8S1 8S2 8P3 8S1 8S2 8P3 8S1 8S2 Operation Range Commercial (0C to 70C) Commercial (0C to 70C) Commercial (0C to 70C) Commercial (0C to 70C) Industrial (-40C to 85C) Industrial (-40C to 85C) Industrial (-40C to 85C) Industrial (-40C to 85C) 10 800 10.0 1000 10 600 10.0 500 10 80 0.1 250 10 2000 30.0 2000 10 800 10.0 1000 10 600 10.0 500 10 80 0.1 250 Package Type 8P3 8S1 8S2 8 Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8 Lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8 Lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC) Options Blank -2.7 -2.5 -1.8 Standard Device (4.5V to 5.5V) Low Voltage (2.7V to 5.5V) Low Voltage (2.5V to 5.5V) Low Voltage (1.8V to 5.5V) 2-76 AT93C46/56/57/66 AT93C46/56/57/66 Ordering Information tWP (max) (ms) 10 ICC (max) (A) 2000 ISB (max) (A) 30.0 fMAX (kHz) 2000 Ordering Code AT93C66-10PC AT93C66-10SC AT93C66W-10SC AT93C66-10PC-2.7 AT93C66-10SC-2.7 AT93C66W-10SC-2.7 AT93C66-10PC-2.5 AT93C66-10SC-2.5 AT93C66W-10SC-2.5 AT93C66-10PC-1.8 AT93C66-10SC-1.8 AT93C66W-10SC-1.8 AT93C66-10PI AT93C66-10SI AT93C66W-10SI AT93C66-10PI-2.7 AT93C66-10SI-2.7 AT93C66W-10SI-2.7 AT93C66-10PI-2.5 AT93C66-10SI-2.5 AT93C66W-10SI-2.5 AT93C66-10PI-1.8 AT93C66-10SI-1.8 AT93C66W-10SI-1.8 Package 8P3 8S1 8S2 8P3 8S1 8S2 8P3 8S1 8S2 8P3 8S1 8S2 8P3 8S1 8S2 8P3 8S1 8S2 8P3 8S1 8S2 8P3 8S1 8S2 Operation Range Commercial (0C to 70C) Commercial (0C to 70C) Commercial (0C to 70C) Commercial (0C to 70C) Industrial (-40C to 85C) Industrial (-40C to 85C) Industrial (-40C to 85C) Industrial (-40C to 85C) 10 800 10.0 1000 10 600 10.0 500 10 80 0.1 250 10 2000 30.0 2000 10 800 10.0 1000 10 600 10.0 500 10 80 0.1 250 Package Type 8P3 8S1 8S2 8 Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8 Lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8 Lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC) Options Blank -2.7 -2.5 -1.8 Standard Device (4.5V to 5.5V) Low Voltage (2.7V to 5.5V) Low Voltage (2.5V to 5.5V) Low Voltage (1.8V to 5.5V) 2-77 |
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