 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| E1217D 32 kHz Standard Watch CMOS IC Features D 32 kHz oscillator D 1.3 - 1.8 V operating voltage range D 180 nA typical current consumption D Voltage regulator D Integrated capacitors, mask selectable D Mask options for pad designation, motor period and motor pulse width D Low resistance outputs for bipolar stepping motor D Motor fast-test function Pad Configuration 1 8 General Description The E1217D is an integrated circuit in CMOS Silicon Gate Technology for analog watches. It consists of a 32 kHz oscillator, frequency dividers down to 1/64 Hz, output pulse formers and push-pull motor drivers. For tuning of the crystal, integrated capacitors are provided (selectable mask option). Low current consumption and high oscillator stability are enabled by an on-chip voltage regulator. Pin 1, 4 5, 6, 8 1 to 4 (7/5) or (7/6) 1 to 5, 8 1 to 5, 8 Symbol VSS VDD OSCIN/ OSCOUT MOT 1/2 RESET TEST Function Negative supply voltage Positive supply voltage Oscillator input/output Motor drive outputs Reset input Test input/output 2 7 E1217D 3 6 4 5 95 9979 Figure 1. Chip size 1.06 mm x 1.02 mm Pad size: 112 mm x 112 mm (pad window 100 x 100) Absolute Maximum Ratings Parameters Supply voltage Input voltage range, all inputs Output short circuit duration Power dissipation (DIL package) Operating ambient temperature range Storage temperature range Lead temperature during soldering at 2 mm distance, 10 s Symbol VSS VIN Ptot Tamb Tstg Tsld Value -0.3 to +5 (VSS-0.3 V) VIN (VDD + 0.3 V) indefinite 125 -20 to +70 -40 to +70 260 Unit V V mW C C C Absolute maximum ratings define parameter limits which, if exceeded, may permanently change or damage the device. All inputs and outputs on TEMIC circuits are protected against electrostatic discharges. However, precautions to minimize the build-up of electrostatic charges during handling are recommended. The circuit is protected against supply-voltage reversal for typically 5 minutes. TELEFUNKEN Semiconductors Rev. A1, 08-May-96 1 (4) E1217D Functional Description Voltage Regulator An integrated voltage regulator provides the oscillator with a well controlled negative supply voltage VREG. This improves the stability of the oscillator and keeps current consumption at a minimum. RESET A debounced RESET input is provided. Connecting the RESET input to VDD resets the low order 12 stages of the frequency divider, thus disabling further motor pulses. Motor pulses in progress when the reset function is applied are completed. After releasing the RESET pad from VDD, the next motor pulse appears with a delay of one half motor cycle on the drive output opposed to the former (figure 4). Due to the debounce circuitry on the RESET input, VDD must be applied for at least 31.2 ms. During RESET the input current is limited to 8 nA typically. Oscillator An oscillator inverter with feedback resistor is provided for generation of the 32768 Hz clock frequency. A total capacitance of 24 pF is integrated.This can be selected for COSCOUT in 2 pF increments via a mask option. Frequency Divider A 21 bit binary counter is provided, dividing the oscillator frequency down to 1/64 Hz. The leading six stages are connected to VDD and VREG, while the remaining 15 stages are connected to VDD and VSS. Test A test frequency of 512 Hz is output to this pad which can be measured with a high resistance probe (R 10 MW, C 20 pF). This signal can be used for testing and tuning the oscillator. Connecting TEST to VDD for at least 4 ms changes the motor cycle time from the selected value to the test cycle time (mask options), while the motor pulse width remains unchanged (figure 3). This feature can be used to reduce the amount of time required for testing the mechanical parts of the watch. Motor Drive Output The E1217D contains two push-pull output buffers for driving bipolar stepping motors. During a motor pulse, the n-channel device of one buffer and the p-channel device of the other buffer are activated. The p-channel devices of both buffers are active (figure 3) between two the pulses. Cycle time and pulse width can be chosen via a metalmask option (table 1). Table 1. Motor options Cycle time TM Motor pulse width tM Motor test cycle time TMIT = 2, 4, 6, 8, 10, 12, 20, 24, 30, 40, 60, 80, 120 s = 0.98 to 14.65 ms in increments of 0.98 ms = 250, 125, 62.5 ms 2 (4) TELEFUNKEN Semiconductors Rev. A1, 08-May-96 E1217D Operating Characteristics VDD = 0 V; VSS = -1.55 V; Tamb = +25C; CTR = 15 pF, unless otherwise specified. All voltage levels are measured with reference to VDD. Test crystal as specified below. Parameters Operating voltage Operating current RESET input current Motor outputs Motor output current Motor period Motor pulse width Motor test period Oscillator Stability Test Conditions / Pins Functional test (figure 2) Coscout = 16 pF, RL = RESET = VDD R Symbol VSS ISS IR IM TM TM TMT f/f Min. -1.3 Typ. -180 8 Max. -1.8 -300 Unit V nA nA mA s ms ms ppm RL = 2 kW, VSS = -1.55 V 0.7 Mask option p VSS = 100 mV, CTR = 5 pF, startup within 2 s 0.1 Start-up voltage Integrated input capacitance Integrated output capacitance VST COSC IN COSCOUTmax = 24 pF COSC OUT -1.3 1.2 Mask option V pF Note 1: Typical parameters represent the statistical mean values V SS RESET 1 TEST 8 7 e1217 MOT2 MOT1 Range of trimmer capacitance: CTR = 5 pF to 30 pF Test Crystal Specification 2 CTR OSCIN 3 4 OSCOUT 6 R Frequency Series resistance Static capacitance Dynamic capacitance Load capacitance L f = 32768 Hz RS = 30 kW C0 = 1.5 pF C1 = 3 fF CL = 8 pF Additional Notes 1. It is recommended to connect the quartz case to VDD (by conductive epoxy). 2. Capacitive coupling of TEST to OSCIN must be minimized by appropriate layout of the PCB to avoid disturbance of the oscillator. 5 VDD 95 9980 Figure 2. Functional test circuit TELEFUNKEN Semiconductors Rev. A1, 08-May-96 3 (4) E1217D T< tTIN T > tTIN TEST TM MOT1 t M tM T MT MOT2 TM/2 95 9981 Figure 3. Motor drive outputs in normal mode and motor test T< tRIN T > tRIN (open) RESET tM MOT1 tM TM/2 tM MOT2 TM 95 9982 Figure 4. Motor drive outputs and RESET We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use TEMIC products for any unintended or unauthorized application, the buyer shall indemnify TEMIC against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. TEMIC TELEFUNKEN microelectronic GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 ( 0 ) 7131 67 2831, Fax number: 49 ( 0 ) 7131 67 2423 4 (4) TELEFUNKEN Semiconductors Rev. A1, 08-May-96 |
Price & Availability of E1217D
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |