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 LMP7701/LMP7704 Precision, CMOS Input, RRIO, Wide Supply Range Amplifiers
February 2006
LMP7701/LMP7704 Precision, CMOS Input, RRIO, Wide Supply Range Amplifiers
General Description
The LMP7701 and LMP7704 are single, and quad low offset voltage, rail-to-rail input and output precision amplifiers with CMOS input stage and wide supply voltage range. The LMP7701 and LMP7704 are part of the LMPTM precision amplifier family and are ideal for sensor interface and other instrumentation applications. The guaranteed low offset voltage of less than 200 V along with the guaranteed low input bias current of less than 1 pA make the LMP7701 ideal for precision applications. The LMP7701 and LMP7704 are built utilizing VIP50 technology, which allows the combination of a CMOS input stage and a 12V common mode and supply voltage range. This makes the LMP7701 and LMP7704 great choices in many applications where conventional CMOS parts cannot operate under the desired voltage conditions. The LMP7701 and LMP7704 have a rail-to-rail input stage that significantly reduces the CMRR glitch commonly associated with rail-to-rail input amplifiers. This is achieved by trimming both sides of the complimentary input stage, thereby reducing the difference between the NMOS and PMOS offsets. The output of the LMP7701 and LMP7704 swing within 40 mV of either rail to maximize the signal dynamic range in applications requiring low supply voltage. The LMP7701 is offered in the space saving SOT23-5 package, and the quad LMP7704 is offered in the TSSOP-14 package. These small packages are ideal solutions for area constrained PC boards and portable electronics.
Features
Unless otherwise noted, typical values at VS = 5V 200 V (max) n Input offset voltage (LMP7701) 220 V (max) n Input offset voltage (LMP7704) 200 fA n Input bias current n Input voltage noise 9 nV/ n CMRR 130 dB n Open loop gain 130 dB n Temperature range -40C to 125C n Unity gain bandwidth 2.5 MHz n Supply current (LMP7701) 715 A n Supply current (LMP7704) 2.9 mA n Supply voltage range 2.7V to 12V n Rail-to-rail input and output
Applications
n n n n n n High impedance sensor interface Battery powered instrumentation High gain amplifiers DAC buffer Instrumentation amplifier Active filters
Typical Application
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Precision Current Source
LMPTM is a trademark of National Semiconductor Corporation.
(c) 2006 National Semiconductor Corporation
DS201273
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LMP7701/LMP7704
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance (Note 2) Human Body Model Machine Model VIN Differential Supply Voltage (VS = V+ - V-) Voltage at Input/Output Pins Input Current Storage Temperature Range Junction Temperature (Note 3) 2000V 200V
Soldering Information Infrared or Convection (20 sec) Wave Soldering Lead Temp. (10 sec) 235C 260C
Operating Ratings (Note 1)
Temperature Range (Note 3) Supply Voltage (VS = V - V ) Package Thermal Resistance (JA (Note 3)) 5-Pin SOT23 14-Pin TSSOP 234C/W 122C/W
+ -
300 mV
13.2V V++ 0.3V, V- - 0.3V 10 mA -65C to +150C +150C (Note 4)
-40C to +125C 2.7V to 12V
3V Electrical Characteristics
Symbol VOS Parameter Input Offset Voltage
Unless otherwise specified, all limits are guaranteed for TA = 25C, V+ = 3V, V- = 0V, VCM = V+/2, and RL > 10 k to V+/2. Boldface limits apply at the temperature extremes. Conditions LMP7701 LMP7704 TCVOS IB Input Offset Voltage Drift Input Bias Current (Note 7) (Notes 7, 8) -40C TA 85C (Notes 7, 8) -40C TA 125C IOS CMRR Input Offset Current Common Mode Rejection Ratio 0V VCM 3V LMP7701 0V VCM 3V LMP7704 PSRR CMVR AVOL Power Supply Rejection Ratio Input Common-Mode Voltage Range Large Signal Voltage Gain 2.7V V+ 12V, Vo = V+/2 CMRR 80 dB CMRR 77 dB RL = 2 k (LMP7701) VO = 0.3V to 2.7V RL = 2 k (LMP7704) VO = 0.3V to 2.7V RL = 10 k VO = 0.2V to 2.8V 86 80 84 78 86 82 -0.2 -0.2 100 96 100 94 100 96 114 114 124 Min (Note 6) Typ (Note 5) Max (Note 6) Units
37 56 1 0.2 0.2
40 130 130 98
200 500 220 520 5 1 50 1 400
V
V/C
pA
fA
dB
dB 3.2 3.2 V
dB
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LMP7701/LMP7704
3V Electrical Characteristics
Symbol VO Parameter Output Swing High
(Note 4)
(Continued)
Unless otherwise specified, all limits are guaranteed for TA = 25C, V+ = 3V, V- = 0V, VCM = V+/2, and RL > 10 k to V+/2. Boldface limits apply at the temperature extremes. Conditions RL = 2 k to V+/2 LMP7701 RL = 2 k to V+/2 LMP7704 RL = 10 k to V+/2 LMP7701 RL = 10 k to V+/2 LMP7704 Output Swing Low RL = 2 k to V+/2 LMP7701 RL = 2 k to V+/2 LMP7704 RL = 10 k to V+/2 LMP7701 RL = 10 k to V+/2 LMP7704 IO Output Short Circuit Current (Notes 3, 9) Sourcing VO = V+/2 VIN = 100 mV Sinking VO = V+/2 VIN = -100 mV (LMP7701) Sinking VO = V+/2 VIN = -100 mV (LMP7704) IS Supply Current LMP7701 LMP7704 SR GBW THD+N en in Slew Rate (Note 10) Gain Bandwidth Product Total Harmonic Distortion + Noise Input-Referred Voltage Noise Input-Referred Current Noise f = 1 kHz, Av = 1, RL = 10 k f = 1 kHz f = 100 kHz (Note 4) AV = +1, VO = 2 VPP 10% to 90% 25 15 25 20 25 15 Min (Note 6) Typ (Note 5) 40 40 30 35 40 45 20 20 42 42 42 0.670 2.9 0.9 2.5 0.02 9 1 nV/ fA/ 1.0 1.2 3.5 4.5 Max (Note 6) 80 120 80 150 40 60 50 100 60 80 100 170 40 50 50 90 mV from V+ Units
mV
mA
mA
V/s MHz %
5V Electrical Characteristics
Symbol VOS Parameter Input Offset Voltage
Unless otherwise specified, all limits are guaranteed for TA = 25C, V+ = 5V, V- = 0V, VCM = V+/2, and RL > 10 k to V+/2. Boldface limits apply at the temperature extremes. Conditions LMP7701 LMP7704 TCVOS IB Input Offset Voltage Drift Input Bias Current (Note 7) (Notes 7, 8) -40C TA 85C (Notes 7, 8) -40C TA 125C IOS Input Offset Current Min (Note 6) Typ (Note 5) Max (Note 6) Units
37 32 1 0.2 0.2
40
200 500 220 520 5 1 50 1 400
V
V/C
pA
fA
3
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LMP7701/LMP7704
5V Electrical Characteristics
Symbol CMRR Parameter Common Mode Rejection Ratio
(Note 4)
(Continued)
Unless otherwise specified, all limits are guaranteed for TA = 25C, V+ = 5V, V- = 0V, VCM = V+/2, and RL > 10 k to V+/2. Boldface limits apply at the temperature extremes. Conditions 0V VCM 5V LMP7701 0V VCM 5V LMP7704 PSRR CMVR AVOL Power Supply Rejection Ratio Input Common-Mode Voltage Range Large Signal Voltage Gain 2.7V V+ 12V, VO = V+/2 CMRR 80 dB CMRR 78 dB RL = 2 k (LMP7701) VO = 0.3V to 4.7V RL = 2 k (LMP7704) VO = 0.3V to 4.7V RL = 10 k VO = 0.2V to 4.8V VO Output Swing High RL = 2 k to V+/2 LMP7701 RL = 2 k to V+/2 LMP7704 RL = 10 k to V+/2 LMP7701 RL = 10 k to V+/2 LMP7704 Output Swing Low RL = 2 k to V+/2 LMP7701 RL = 2 k to V+/2 LMP7704 RL = 10 k to V+/2 LMP7701 RL = 10 k to V+/2 LMP7704 IO Output Short Circuit Current (Notes 3, 9) Sourcing VO = V+/2 VIN = 100 mV (LMP7701) Sourcing VO = V+/2 VIN = 100 mV (LMP7704) Sinking VO = V+/2 VIN = -100 mV (LMP7701) Sinking VO = V+/2 VIN = -100 mV (LMP7704) IS Supply Current LMP7701 LMP7704 SR GBW THD+N en in Slew Rate (Note 10) Gain Bandwidth Product Total Harmonic Distortion + Noise Input-Referred Voltage Noise Input-Referred Current Noise f = 1 kHz, AV = 1, RL = 10 k f = 1 kHz f = 100 kHz AV = +1, VO = 4 VPP 10% to 90% 40 28 38 25 40 28 40 23 Min (Note 6) 88 83 86 81 86 82 -0.2 -0.2 100 96 100 94 100 96 119 119 130 60 60 40 40 50 50 30 30 66 66 76 76 0.715 2.9 1.0 2.5 0.02 9 1 nV/ fA/ 1.0 1.2 3.7 4.6 mA 110 130 120 200 50 70 60 120 80 90 120 190 40 50 50 100 mV from V+ Typ (Note 5) 130 130 100 5.2 5.2 dB Max (Note 6) Units
dB V
dB
mV
mA
V/s MHz %
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LMP7701/LMP7704
5V Electrical Characteristics (Note 4)
Unless otherwise specified, all limits are guaranteed for TA = 25C, V+ = 5V, V- = -5V, VCM = 0V, and RL > 10 k to 0V. Boldface limits apply at the temperature extremes. Symbol VOS Parameter Input Offset Voltage LMP7701 LMP7704 TCVOS IB Input Offset Voltage Drift Input Bias Current (Note 7) (Notes 7, 8) -40C TA 85C (Notes 7, 8) -40C TA 125C IOS CMRR Input Offset Current Common Mode Rejection Ratio -5V VCM 5V LMP7701 -5V VCM 5V LMP7704 PSRR CMVR AVOL Power Supply Rejection Ratio Input Common-Mode Voltage Range Large Signal Voltage Gain 2.7V V+ 12V, VO = 0V CMRR 80 dB CMRR 78 dB RL = 2 k (LMP7701) VO = -4.7V to 4.7V RL = 2 k (LMP7704) VO = -4.7V to 4.7V RL = 10 k (LMP7701) VO = -4.8V to 4.8V RL = 10 k (LMP7704) VO = -4.8V to 4.8V VO Output Swing High RL = 2 k to 0V LMP7701 RL = 2 k to 0V LMP7704 RL = 10 k to 0V LMP7701 RL = 10 k to 0V LMP7704 Output Swing Low RL = 2 k to 0V LMP7701 RL = 2 k to 0V LMP7704 RL = 10 k to 0V LMP7701 RL = 10 k to 0V LMP7704 IO Output Short Circuit Current (Notes 3, 9) Sourcing VO = 0V VIN = 100 mV (LMP7701) Sourcing VO = 0V VIN = 100 mV (LMP7704) Sinking VO = 0V VIN = -100 mV 50 35 48 33 50 35 92 88 90 86 86 82 -5.2 -5.2 100 98 100 94 100 98 100 97 121 121 134 134 90 90 40 40 90 90 40 40 86 86 84 150 170 180 290 80 100 80 150 130 150 180 290 50 60 60 110 mV from V_ mV from V+ dB Conditions Min (Note 6) Typ (Note 5) Max (Note 6) Units
37 37 1 0.2 0.2
40 138 138 98
200 500 220 520 5
1
V
V/C
50
1
pA
400
fA
dB
dB 5.2 5.2 V
mA
5
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LMP7701/LMP7704
5V Electrical Characteristics (Note 4)
Symbol IS Parameter Supply Current LMP7701 LMP7704 SR GBW THD+N en in Slew Rate (Note 10) Gain Bandwidth Product Total Harmonic Distortion + Noise Input-Referred Voltage Noise Input-Referred Current Noise
(Continued)
Unless otherwise specified, all limits are guaranteed for TA = 25C, V+ = 5V, V- = -5V, VCM = 0V, and RL > 10 k to 0V. Boldface limits apply at the temperature extremes. Conditions Min (Note 6) Typ (Note 5) 0.790 3.2 1.1 2.5 f = 1 kHz, AV = 1, RL = 10 k f = 1 kHz f = 100 kHz 0.02 9 1 nV/ fA/ Max (Note 6) 1.1 1.3 4.2 5.0 Units
mA
AV = +1, VO = 9 VPP 10% to 90%
V/s MHz %
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics Tables. Note 2: Human Body Model is 1.5 k in series with 100 pF. Machine Model is 0 in series with 200 pF. Note 3: The maximum power dissipation is a function of TJ(MAX), JA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/ JA . All numbers apply for packages soldered directly onto a PC board. Note 4: Electrical table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device. Note 5: Typical values represent the parametric norm at the time of characterization. Note 6: Limits are 100% production tested at 25C. Limits over the operating temperature range are guaranteed through correlations using the Statistical Quality Control (SQC) method. Note 7: Guaranteed by design. Note 8: Positive current corresponds to current flowing into the device. Note 9: The short circuit test is a momentary test. Note 10: The number specified is the slower of positive and negative slew rates.
Connection Diagrams
5-Pin SOT23 14-Pin TSSOP
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Top View
Top View
Ordering Information
Package 5-Pin SOT23 14-Pin TSSOP Part Number LMP7701MF LMP7701MFX LMP7704MT LMP7704MTX Package Marking AC2A LMP7704MT Transport Media 1k Units Tape and Reel 3k Units Tape and Reel 94 Units/Rail 2.5k Units Tape and Reel NSC Drawing MF05A MTC14
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LMP7701/LMP7704
Typical Performance Characteristics
Offset Voltage Distribution
Unless otherwise noted: TA = 25C, VCM = VS/2, RL > 10 k. TCVOS Distribution
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Offset Voltage Distribution
TCVOS Distribution
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Offset Voltage Distribution
TCVOS Distribution
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LMP7701/LMP7704
Typical Performance Characteristics Unless otherwise noted: TA = 25C, VCM = VS/2, RL > 10 k.
(Continued) Offset Voltage vs. Temperature CMRR vs Frequency
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Offset Voltage vs. Supply Voltage
Offset Voltage vs. VCM
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Offset Voltage vs. VCM
Offset Voltage vs. VCM
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LMP7701/LMP7704
Typical Performance Characteristics Unless otherwise noted: TA = 25C, VCM = VS/2, RL > 10 k.
(Continued) Input Bias Current vs. VCM Input Bias Current vs. VCM
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20127330
Input Bias Current vs. VCM
Input Bias Current vs. VCM
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Input Bias Current vs. VCM
Input Bias Current vs. VCM
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LMP7701/LMP7704
Typical Performance Characteristics Unless otherwise noted: TA = 25C, VCM = VS/2, RL > 10 k.
(Continued) PSRR vs. Frequency Supply Current vs. Supply Voltage
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20127311
Sinking Current vs. Supply Voltage
Sourcing Current vs. Supply Voltage
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Output Voltage vs. Output Current
Slew Rate vs. Supply Voltage
20127316
20127317
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LMP7701/LMP7704
Typical Performance Characteristics Unless otherwise noted: TA = 25C, VCM = VS/2, RL > 10 k.
(Continued) Open Loop Frequency Response Open Loop Frequency Response
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Large Signal Step Response
Small Signal Step Response
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Large Signal Step Response
Small Signal Step Response
20127319
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LMP7701/LMP7704
Typical Performance Characteristics Unless otherwise noted: TA = 25C, VCM = VS/2, RL > 10 k.
(Continued) Input Voltage Noise vs. Frequency Open Loop Gain vs. Output Voltage Swing
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20127352
Output Swing High vs. Supply Voltage
Output Swing Low vs. Supply Voltage
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Output Swing High vs. Supply Voltage
Output Swing Low vs. Supply Voltage
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LMP7701/LMP7704
Typical Performance Characteristics Unless otherwise noted: TA = 25C, VCM = VS/2, RL > 10 k.
(Continued) THD+N vs. Frequency THD+N vs. Output Voltage
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Crosstalk Rejection Ratio vs. Frequency (LMP7704)
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LMP7701/LMP7704
Application Notes
LMP7701/LMP7704 The LMP7701 and LMP7704 are single and quad low offset voltage, rail-to-rail input and output precision amplifiers with CMOS input stage and wide supply voltage range of 2.7V to 12V. The LMP7701 and LMP7704 have a very low input bias current of only 200 fA at room temperature. The wide supply voltage range of 2.7V to 12V over the extensive temperature range of -40C to 125C makes the LMP7701 and LMP7704 excellent choices for low voltage precision applications with extensive temperature requirements. The LMP7701 and LMP7704 have only 37 V of typical input referred offset voltage and this offset is guaranteed to be less than 500 V and 520 V, respectively, over temperature. This minimal offset voltage allows more accurate signal detection and amplification in precision applications. The low input bias current of only 200 fA along with the low give the LMP7701 input referred voltage noise of 9 nV/ and LMP7704 superiority for use in sensor applications. Lower levels of noise introduced by the amplifier mean better signal fidelity and a higher signal-to-noise ratio. National Semiconductor is heavily committed to precision amplifiers and the market segment they serve. Technical support and extensive characterization data is available for sensitive applications or applications with a constrained error budget. The LMP7701 is offered in the space saving SOT23-5 package, and the LMP7704 is offered in the TSSOP-14 package. These small packages are ideal solutions for area constrained PC boards and portable electronics. CAPACITIVE LOAD The LMP7701 and LMP7704 can be connected as a noninverting unity gain follower. This configuration is the most sensitive to capacitive loading. The combination of a capacitive load placed on the output of an amplifier along with the amplifier's output impedance creates a phase lag which in turn reduces the phase margin of the amplifier. If the phase margin is significantly reduced, the response will be either underdamped or it will oscillate. In order to drive heavier capacitive loads, an isolation resistor, RISO in Figure 1 should be used. By using this isolation resistor, the capacitive load is isolated from the amplifier's output, and hence, the pole caused by CL is no longer in the feedback loop. The larger the value of RISO, the more stable the output voltage will be. If values of RISO are sufficiently large, the feedback loop will be stable independent of the value of CL. However, larger values of RISO result in reduced output swing and reduced output current drive.
INPUT CAPACITANCE CMOS input stages inherently have low input bias current and higher input referred voltage noise. The LMP7701 and LMP7704 enhance this performance by having the low input bias current of only 200 fA, as well as, a very low input . In order to achieve this referred voltage noise of 9 nV/ a larger input stage has been used. This larger input stage increases the input capacitance of the LMP7701, LMP7704. The typical value of this input capacitance, CIN, for the LMP7701 and LMP7704 is 25 pF. The input capacitance will interact with other impedances such as gain and feedback resistors, which are seen on the inputs of the amplifier, to form a pole. This pole will have little or no effect on the output of the amplifier at low frequencies and DC conditions, but will play a bigger role as the frequency increases. At higher frequencies, the presence of this pole will decrease phase margin and will also cause gain peaking. In order to compensate for the input capacitance, care must be taken in choosing feedback resistors. In addition to being selective in picking values for the feedback resistor, a capacitor can be added to the feedback path to increase stability. The DC gain of the circuit shown in Figure 2 is simply -R2/R1.
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FIGURE 2. Compensating for Input Capacitance For the time being, ignore CF. The AC gain of the circuit in Figure 2 can be calculated as follows:
This equation is rearranged to find the location of the two poles:
20127321
(1) As shown in Equation (1), as values of R1 and R2 are increased, the magnitude of the poles is reduced, which in turn decreases the bandwidth of the amplifier. Whenever
FIGURE 1. Isolating Capacitive Load
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LMP7701/LMP7704
Application Notes
(Continued)
possible, it is best to chose smaller feedback resistors. Figure 3 shows the effect of feedback resistor on the LMP7701 and LMP7704 bandwidth.
20127355
FIGURE 4. Closed Loop Gain vs. Frequency with Compensation
20127354
DIODES BETWEEN THE INPUTS FIGURE 3. Closed Loop Gain vs. Frequency Furthermore, R1 and R2 are related by the gain of the amplifier. As shown in Figure 2 AV = -R2 / R1, or alternatively R2 = -AV R1 Equation (1) has two poles. In most cases, it is the presence of pairs of poles that causes gain peaking. In order to eliminate this effect, the poles should be placed in Butterworth position, since poles in Butterworth position do not cause gain peaking. To achieve a Butterworth pair, the quantity under the square root in Equation (1) should be set to equal -1. Using this fact and the relation between R1 and R2, one can find the optimum value for R1 as shown in Equation (2). If R1 is chosen to be larger than this optimum value, gain peaking will occur. The LMP7701 and LMP7704 have a set of anti-parallel diodes between its input pins, as shown in Figure 5. These diodes are present to protect the input stage of the amplifier. At the same time, they limit the amount of differential input voltage that is allowed on the input pins. A differential signal larger than one diode voltage drop might damage the diodes. The differential signal between the inputs needs to be limited to 300 mV or the input current needs to be limited to 10 mA.
(2) In Figure 2, CF is added to compensate for input capacitance and to increase stability. Additionally, CF reduces or eliminates the gain peaking that can be caused by having a larger feedback resistor. Figure 4 shows how CF reduces gain peaking.
20127325
FIGURE 5. Input of LMP7701 PRECISION CURRENT SOURCE The LMP7701 and LMP7704 can be used as a precision current source in many different applications. Figure 6 shows a typical precision current source. This circuit implements a precision voltage controlled current source. Amplifier A1 is a differential amplifier that uses the voltage drop across RS as the feedback signal. Amplifier A2 is a buffer that eliminates the error current from the load side of the RS resistor that would flow in the feedback resistor if it were connected to the load side of the RS resistor. In general, the circuit is stable as long as the closed loop bandwidth of amplifier A2 is greater then the closed loop bandwidth of amplifier A1. Note that if A1 and A2 are the same type of amplifiers, then the feedback around A1 will reduce its bandwidth compared to A2.
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LMP7701/LMP7704
Application Notes
(Continued)
The equation for output current can be derived as follows:
Solving for the current I results in the following equation:
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FIGURE 6. Precision Current Source
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LMP7701/LMP7704
Physical Dimensions
inches (millimeters) unless otherwise noted
5-Pin SOT23 NS Package Number MF05A
14-Pin TSSOP NS Package Number MTC14
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LMP7701/LMP7704 Precision, CMOS Input, RRIO, Wide Supply Range Amplifiers
Notes
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. For the most current product information visit us at www.national.com. LIFE SUPPORT POLICY NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. BANNED SUBSTANCE COMPLIANCE National Semiconductor manufactures products and uses packing materials that meet the provisions of the Customer Products Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain no ``Banned Substances'' as defined in CSP-9-111S2. Leadfree products are RoHS compliant.
National Semiconductor Americas Customer Support Center Email: new.feedback@nsc.com Tel: 1-800-272-9959 www.national.com National Semiconductor Europe Customer Support Center Fax: +49 (0) 180-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Francais Tel: +33 (0) 1 41 91 8790 National Semiconductor Asia Pacific Customer Support Center Email: ap.support@nsc.com National Semiconductor Japan Customer Support Center Fax: 81-3-5639-7507 Email: jpn.feedback@nsc.com Tel: 81-3-5639-7560
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.


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