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ML6429 DEMO Evaluation Kit User's Guide
User Selectable Quad/Octal Video Filters with SCART and EVC Interface
Description
The ML6429 Evaluation Kit is a fully functional octal (2quads) multi-video standard filter operating from a single 5V 10% power source. To reduce setup time the Evaluation Board is configured with quick connect female BNCs (for all video inputs and outputs) and female banana plugs for input power. For designs requiring compliance to current video connector standards the ML6429 Evaluation Board video signals are provided to a SCART (Peritel) and an Enhanced Video Connector (EVC) connector. Note: This Evaluation Board was designed to exhibit all the ML6429 features available. The user can choose only that portion of the circuit required for a cost-effective solution. The ML6429 is packaged in a 24 pin SOIC. It is a quad 4th order filter for applications requiring capacitive coupling of inputs and outputs. In addition to providing DAC output filtering of virtually any video signal (Composite, Y/C, RGB, etc.), the ML6429 includes a 5th wideband channel for use with the device's channel multiplexing and swapping features. These features are detailed in the Additional Features section. All outputs include 2X gain amps for driving 2VP-P into a 150 load or 1VP-P into a 75 load. Additional features of the ML6429 include SYNCOUT and SYNCIN pins for synchronization with SLAVE units or for external synchronization to an HSYNC signal for component video signals lacking embedded sync. Additional filtering of video signals is possible with the ML6429 by cascading a filtered output to an unused input. For minimal noise and cross-coupling the ML6429 was laid out on a double sided printed circuit board with an extensive solder-side ground plane. The board demonstrates performance and illustrates critical layout practices necessary for reliable operation. See Figure 11 for the evaluation board schematic and Figures 8 through 10 for the layout.
Block Diagram
17 2 CVINF/Y1* REQUIRED SYNC STRIP FILTERED CHANNEL 4th-ORDER FILTER
+ -
22 VCCOCV
6 VCC
14 SWAP CVF
13 SWAP CVU
VCCORGB
SYNCIN 23 SYNCOUT 24 3 4 7 8 9 10 11 12 CVINUA/Y2* CVINUB/Y3* RINA/Y4 RINB/Y5 GINA/Y6 GINB/Y7 BINA/C1 BINB/C2 MUX MUX MUX MUX
SYNC TIMER
TRANSCONDUCTANCE ERROR AMP
0.5V
SYNC TIMER SWAP MUX TRANSCONDUCTANCE ERROR AMP
+ -
x2
CVOUT1/YOUTA
21
x2
CVOUT2/YOUTB
20
0.5V 4th-ORDER FILTER 0.5V 4th-ORDER FILTER 0.5V 4th-ORDER FILTER 0.75V GNDO 19 GND 5 x2 x2 x2
ROUT/YOUTC
18
TRANSCONDUCTANCE ERROR AMP
+ -
GOUT/YOUTD
16
TRANSCONDUCTANCE ERROR AMP
+ -
BOUT/COUT
15
TRANSCONDUCTANCE ERROR AMP A/B MUX
+ -
1
*CAN ALSO INPUT SYNC ON GREEN SIGNALS
Figure 1. ML6429 Block Diagram
PRELIMINARY INFORMATION describes products that are not in full production at the time of printing. Specifications are based on design goals and limited characterization. They may change without notice. Contact Fairchild Semiconductor for current information. REV. 1.0.0 5/17/01
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Evaluation Kit Contents
The evaluation package contains the following items: 1. ML6429 Demo User's Guide 2. ML6429 Evaluation Board 3. The latest revision of the ML6429 Data Sheet can be obtained from Fairchild Semiconductor's web site at http://www.fairchildsemi.com or on the CD Catalog.
One 4 inch (or larger) High Resolution CRT monitor: Sony PVM-14M2U One NTSC Composite Video Signal: Magni 2021 Programmable Signal Generator (or an equivalent Composite Video Source, e.g., VCR, TV baseband Video Out) Assorted video cables
Test
Use the following procedure to verify that the ML6429 Evaluation Board is functional. Do not turn the power supply on until all connections are completed. 1. Set the power supply for 0.0V. Connect the power supply to the input voltage terminals of the Evaluation Board. Make the video connections. Note: Use the shortest possible cables (75 suggested, 50 acceptable) for all video connections. Ensure all jumpers and switches are in their default position. See Figure 11 and Table 2. Connect the Magni video out to CVIN2 Connect one of the CVOUT2/YOUT1 outputs from the Evaluation Board to Input A of the CRT monitor. Select Channel A of the monitor. A high quality video test pattern will appear on the monitor screen. Use the remaining CVOUT2/YOUT1 as a Video Signal Source to test the remaining channels of the Evaluation Board. See Tables 2, 3 and 4.
Testing Functionality
Table 1. ML6429Eval Kit Operating Specifications at 5V
Input Output fC (-3dB) filtered/ Typical ICC (No Load) Coupling Coupling unfiltered AC AC 6.7MHz / 40MHz 200mA
2.
Setup
Note: Due to the large number of possible Video input and output permutations (see Tables 2 and 3), a complete testing procedure of the Evaluation Board is outside the scope of this document. General guidelines for setting up the board are provided, along with a list of minimal testing equipment required. To fully evaluate the board requires at least 2 dissimilar synchronized Video Sources and their corresponding HSYNC (TTL or CMOS) signal. The following test equipment is necessary to test the ML6429 Evaluation Board: One Power Supply: 5V 10%, 250mA max
3. 4. 5.
6.
Table 2. Switch and Header Shunt Settings
Switch/Header SW1 - A SW1 - B SW1 - C JP1 JP2 JP3 JP4 JP5 JP6 HSYNCIN VIDEO IN Default open (Note 1) open (Note 1) open (Note 1) 2, 3 1, 2 1, 2 (Note 2) 1, 2 2, 3 1, 2 2, 3 MASTER (U1) Composite open (Note 1) open (Note 1) open (Note 1) 2, 3 1, 2 1, 2 (Note 2) 1, 2 2, 3 1, 2 2, 3 MASTER (U1) Y/C open (Note 1) open (Note 1) open (Note 1) 2, 3 1, 2 1, 2 (Note 2) 1, 2 2, 3 1, 2 2, 3 MASTER (U1) RGB open (Note 1) open (Note 1) open (Note 1) 2, 3 2, 3 1, 2 (Note 2) 1, 2 1, 2 1, 2 2, 3 SLAVE (U2) (Note 3) CVOUT+, Y+ open (Note 1) open (Note 1) open (Note 1) 2, 3 1, 2 1, 2 (Note 2) 1, 2 2, 3 1, 2 2, 3 MASTER (U1)
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Note: 1. The positions of SW1 - A and SW1 - B are set according to the user's discretion as to which output scheme is desired from U1 (MASTER) pins 21 and 22. See Tables 3 and 4 for A/B MUX, SWAP CVU and SWAP CVF function definition settings. 2. For SCART (Peritel) applications requiring HSYNC on pin 16 move the header shunt on JP3 to pins 2 and 3. 3. The ML6429 Evaluation Board was designed to accept RGB video with a composite or Y video signal applied to U1 pin 3 or 4, respectively, to obtain sync for U2 and U3. If these signals are unavailable use one of the following two methods to ensure U2 is provided with a sync signal: 3a. Apply the GREEN channel to CVIN2 or YIN1 (U1) of the Evaluation Board instead of GIN (U2). 3b. If an HSYNC signal is available apply it to HSYNCIN of the Evaluation Board and move the header shunt on JP1 to pins 1 and 2. Move the header shunt on JP4 to pins 2 and 3. Connect the three RGB video lines to their respective Evaluation Board inputs.
Table 3. Inputs and Outputs
Inputs A/B MUX (SW1-C) 1/0 (SW1-C open/ closed) VIDEO CVIN1 CVOUT1 CVIN1/CVIN1 Outputs CVOUT2/YOUT1 (2X) CVIN2/YIN1 YOUT1 YIN2/YIN2 COUT2 CIN1/CIN1
Slave filter (U2) Output vs. Input is functionally identical to Master. Note the different input and output call-outs on the Evaluation Board for the Slave filter (U2). Note: SWAP CVU & SWAP CVF are at logic low levels.
Table 4. Inputs and Outputs
Inputs Swap CVF SW1 - A 0 (open) 0 (open) 0 (open) 0 (open) 1 (closed) 1 (closed) 1 (closed) 1 (closed) Swap CVU SW1 - B 0 (open) 0 (open) 1 (closed) 1 (closed) 0 (open) 0 (open) 1 (closed) 1 (closed) A/B Mux SW1 - C 1 (open) 0 (closed) 1 (open) 0 (closed) 1 (open) 0 (closed) 1 (open) 0 (closed) CVOUT1 CVIN1 CVIN1 CVIN1 CVIN1 CVIN2 YIN1 CVIN2 YIN1 Outputs CVOUT2 / YOUT1 CVIN2 YIN1 CVIN1 CVIN1 CVIN2 YIN1 CVIN1 CVIN1 Remaining Outputs Note 1 Note 1 Note 1 Note 1 Note 1 Note 1 Note 1 Note 1
Additional Features
The ML6429 DEMO Evaluation Board was designed to exhibit all the capabilities of the ML6429. This section describes these functions and shows how to properly implement them. An example of a real application using a single ML6429 is shown in Figure 2.
Unfiltered (Wideband) Inputs
The ML6429 provides 2 channels (CVINUA/Y2, CVINUB/ Y3) with wideband frequency response (fC = 40MHz) to buffer and amplify signals requiring no additional filtering, such as from an RCA video jack (baseband video) available on many televisions and VCRs. These channels contain the SYNC detect/restore required by the remainder of the ML6429 for sync clamp/restore. Both signals must contain embedded sync if sync is not otherwise supplied externally to the SYNCIN pin.
Filtered Input
The ML6429 contains a separate channel (CVINF/Y1) complete with sync clamp/restore for DAC generated signals requiring 4th order reconstruction filtering. This channel is completely independent of the remaining channels and requires an embedded SYNC video signal to function properly.
SYNCOUT and SYNCIN
For proper operation the ML6429 requires either an embedded sync signal on one of the CVINU channels, or the application of an external HSYNC signal (TTL or CMOS compatible) to pin 23 if the video to these two channels lacks
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embedded sync. The sync signals control all internal timing of the ML6429 and provide sync restoration for establishing the proper voltage level of the sync tip of all the video output signals from the part. Whether the sync is embedded or externally applied (HSYNC), the ML6429 generates an output signal, SYNCOUT, for use in cascading additional
filters or general system timing. When the sync is embedded in the video input signal the SYNCOUT pin must be tied to the SYNCIN pin for proper operation. When the signal is externally applied to SYNCIN, a SYNCOUT signal is generated by the ML6429. This pin can be left open or used for synchronization of other ML6429s or as a general system timing signal.
DIGITAL PLAYER or MPEG-2 DECODER
0.1uF ML6429 2 3 4 7 8 9 10 11 12 21 20 18 16 15 24 23 22F
22F
1k
0.1uF
1k
CVINF/Y1 CVINU/A/Y2 CVINUB/Y3 RINA/Y4 RINB/Y5 GINA/Y6 GINB/Y7 BINA/C1 BINB/C2
CVOUT1/YOUTA CVOUT2/YOUTB ROUT/YOUTC GOUT/YOUTD BOUT/COUT SYNCOUT SYNCIN
MODULATOR TV TV
0.1uF MODULATOR VIDEO RECORDER VCR
Figure 2. ML6429 Application
Y/C Video and the Chroma Input
Ensure that the chroma video signal(s) are applied to the correct input(s) -- pins 11 and 12 -- when S-Video is applied to the ML6429. These inputs differ from the other channels in the amount of DC offset applied during sync restoration. Chroma signals have bi-directional voltage swings and require a higher input offset to avoid swinging below ground.
Cascading Channels for Increased Filtering
In applications where the video signal is under-sampled or requires a steeper roll-off see Figures 4 and 11. Two filters are cascaded for an 80dB/decade roll-off. Note the use of 1k termination resistors on the output of U1. This is done to reduce the loading on U1 and preserve the DC restoration capability of U2. Do not increase the termination resistor values above 1k. This cascading technique can be used with additional filters to obtain even steeper roll-offs.
Video Output Drivers
All video outputs drive 2VP-P into a 150 load or 1VP-P into a 75 load. Figure 11 displays the ML6429 driving two 150 loads from one of the SWAP MUX outputs. All ML6429 outputs are capable of driving two 150 or two 75 loads. Ensure the total package power dissipation limit is not exceeded as the number of loads is increased. Another feature of the ML6429 is that the outputs can be DC coupled to the load(s). DC coupling of the outputs draws more power than AC coupling, and the total device dissipation must be monitored for reliable operation well below the maximum operating junction temperature. The user must take into account the tolerance of the sync tip voltage, particularly when the load is a D to A converter, when DC coupling the loads. Note that the offset voltage of the chroma inputs (pins 11 and 12) makes these channels unusable for composite video signals. These 2 inputs must be fed with Blue (RGB) and/or chroma signals only.
Measured Performance
The ML6429 filtering action is demonstrated in the graph shown in Figure 3. A network analyzer is connected to a filtered input channel with a 200mV RMS test signal and a plot is made of the frequency response. The resulting amplitude versus frequency plot demonstrates the accuracy of the ML6429 regarding flatness of response, -3dB cutoff point, and linear 40dB/decade rolloff above cutoff. Time domain measurements can be made using the output of DACs to feed the filter, but the information is not as useful as a Bode plot. To obtain this measurement it is necessary to apply a current limited DC offset voltage (1.4V, 4.7k) directly to the ML6429 input pin.
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Figure 3. Filtered Channel
Figure 5. Unfiltered Channel
This allows the internal sync restore circuitry to establish the correct sync tip value. Refer to the ML6429 data sheet for additional graphs and waveforms.
The unfiltered channels of the ML6429 are intended as buffers for video signals requiring no filtering. Figure 5 displays the high frequency bandwidth of these channels. The high frequency cutoff and response flatness guarantees no degradation of the video signal output of this channel.
Figure 4. Two Cascaded Filtered Channels
Figure 4 illustrates the performance of the ML6429 Evaluation Board using the output of one filtered channel as the input to another filtered channel (2 cascaded filters). Note the increased roll-off above fC of 80dB/decade. This application can be applied to unfiltered video signals which have been under-sampled, or when an anti-aliasing filter is required. Refer to Figure 11 and Table 2 for implementation of this 4-pole filter. Note that it is unnecessary to terminate the output of the first filter into 150. The use of 1k termination resistors reduces the power consumption of the ML6429.
Figure 6. Filtered Channel Response to DAC Generated Luma Video Signals Test Equipment: Tektronix TDS 540 Digitizing Scope Test Conditions: VIN = 5.0V CH1: VOUT @ 500mV/DIV CH2: VDAC @ 200mV/DIV Horiz: 10s/DIV
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Layout Considerations
Figure 11 is the Evaluation board schematic. Figures 8 through 10 show the board layout. Note the proximity of bypass capacitors C10 through C13 to U1 and C29 through C32 to U2. Notice also the use of ferrite beads FB1 and FB2 to provide separate filtered power to the VCC pins. This bypassing minimizes the cross-talk between power and analog circuitry. In addition, the solder side of the Evaluation Board is a large ground plane resulting in low channel to channel cross-talk, and completes the high quality VCC bypassing of the Master and Slave filters. The ML6429 will provide nearly equal performance if carefully laid out on a single-sided P.C. board. Also, the use of the ferrite beads may be unnecessary providing the part is locally bypassed with 2 capacitors (0.1f and 1F) located as near to the IC as possible, with direct connections to the VCC and GND pins. Minimize video input and output trace lengths for the lowest possible P.C. trace inductance and capacitance.
Figure 7. Filtered Channel Response to DAC Generated Chroma Video Signals Test Equipment: Tektronix TDS 540 Digitizing Scope Test Conditions: VIN = 5.0V CH1: VOUT @ 500mV/DIV CH2: VDAC @ 250mV/DIV Horiz: 2s/DIV
Using the ML6429 Evaluation Board for system evaluation is possible providing the size of the board allows for low noise connections. The video and power connectors can be removed and direct solder connections made to the board. Take advantage of the SCART and EVC connectors when evaluating the board. This can save a lot of set-up time.
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ML6429 Evaluation Kit Parts List
Item 1
2
Qty 18 4 9
Description 75, 5% 1206 surface mount 1k, 5% 1206 surface mount
Vendor/Parts Any Any
Designation R1-R5, R10-R17, R20-R24 R6-R9 C1-C9
Resistors
Capacitors 3 220F, 6.3V or 10V, tantalum, 7343 AVX / TPSE227M010R0100 surface mount Sprague / 593D227X06R3E2W NEMCO / LSR 220/10HK100 1F, 50V, ceramic, 1206 surface mount 0.1F, 50V, Ceramic, 1206 surface mount S-Video Filter, 24 pin SOIC Female BNC connectors Any Any
4 5 ICs 6 7
4 19
C10, C12, C29, C31 C11, C13-C28, C30, C32
2 18
Micro Linear / ML6429CS A/D Electronics / 580-002-00
U1, U2 BIN, BOUT, CIN1, CIN2, COUT1, CVIN1, CVIN2, CVOUT1, CVOUT2/YOUT1, CVOUT2/YOUT1, CVOUT+/ YOUT+, GIN, GOUT, RIN, ROUT, YIN1, YIN2, YOUT2 P2
Hardware
8 9 10 11 12 13 14 15 16 17 18
1 1 1 2 2 6 2 6 4 4 1
VESA EVC female right angle connector SCART female right angle connector Switch, 4 position J-Lead slide DIP SMD Ferrite bead, SMD Female banana plug Jumper header, 3 pin Header pin, 0.025 inch dia., gold plating. Header shunt Threaded standoffs, 0.875 inch lg. Hex nuts, 6-32 Printed Circuit Board, ML6429Eval, Rev. A
Molex / 71182-1000
Power Dynamics, Inc. / EI-022 P1 Digi-Key / GH1302 Digi-Key / 240-1030-1-ND Digi-Key / 108-0740-001 Digi-Key / J147-ND Digi-Key / 929647-02-36-ND Digi-Key / 929950-00-ND Digi-Key / J215 Digi-Key / H220 3 Day Protos / ML6429 Eval, Rev. A SW1 FB1, FB2 +5V, GND JP1-JP6 HSYNCIN, GND JP1-JP6 (Ref)
Vendor List
1. AVX 2. Sprague 3. Digi-Key 4. 3M 5. A/D Electronics (207) 282-5111 (207) 324-4140 (800) 344-4539 (800) 321-9668 (206) 851-8005 6. NEMCO 7. 3 Day Protos, Inc. 8. GTI, Inc. 9. Powell Electronics 10.Eric Electronics (408) 894-0130 (800) 275-4884 (408) 943-6442 (408) 432-1111 (800) 406-3743
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Figure 8. Top Silk
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Figure 9. Top Layer
Figure 9. Bottom Layer
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LEGEND
5V FB1 GND C12 1F VCCA C10 1F + C1 R24 75 CVOUT1 FB2 MOVABLE JUMPER 1 JPx PERMANENT SHORT 3
2
C13
0.1F VCCO
C11
0.1F
220F 17 22 19 5 X2 MUX X2 20 + C3 R22 75 CVOUT2 YOUT1 21 + C2 R23 75 CVOUT2 YOUT1
CVIN1
C14 R1 75 C15 R2 75 C16 R3 75 C17
0.1F
6
U1
0.1F 2 FOURTH ORDER FILTER MUX FOURTH ORDER FILTER FOURTH ORDER FILTER FOURTH ORDER FILTER 14 13
CVIN2
220F
YIN1
0.1F 0.1F 0.1F
3 4 7 8
220F MUX X2 18 + 16 C4 R21 75
YIN2 C18 R4 75
YOUT2
9 10
220F
P2--EVC 13 14
MUX
X2
CIN1
C19
0.1F
11 12
MUX
X2
15
+
C5
R20 75
15 COUT1 5 4
220F 23 24 SW1-A 5V
C20 JP5 32 1 JP2 1 23 R5 75
0.1F SW1-C
1
SW1-B
5 9
R6 1k JP1 JP3 1 1 14 13 24 23 JP4 1 X2 MUX X2 20 21 + C6 2 3 2 3
13 17 21
HSYNCIN 1 GND 2 3
19 16 7 11 15
U2
C21 R7 1k 1 R8 1k JP6 2 BIN R10 75 C25 GIN R11 75 C26 0.1F 0.1F 3 R9 1k C23 C24 0.1F 0.1F 9 10 7 8 MUX FOURTH ORDER FILTER FOURTH ORDER FILTER FOURTH ORDER FILTER 17 1F 0.1F C31 C32 VCCO X2 3 4 0.1F 2 FOURTH ORDER FILTER MUX
R17 75
CVOUT+ Y+
P1--SCART
C22
0.1F
220F
18
+
C7
R16 75
BOUT
220F 16 + C8 R15 75
MUX
X2
GOUT
220F 15 + C9 R14 75
11 12
MUX
X2 22 0.1F 0.1F 19 5
ROUT
220F
6 RIN R12 75 C28 R13 75 0.1F VCCA C27 0.1F C29 C30 CIN2
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LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user.
www.fairchildsemi.com 5/17/01 0.0m 001 Stock#DS30005066 2001 Fairchild Semiconductor Corporation
2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

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