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| PRODUCT SPECIFICATION Single chip 915 MHz Transmitter )($785(6 * * * * * * * * * Q5) $33/,&$7,216 * * * * * * * * * * * True single chip FSK transmitter in a small 8-pin package Adjustable output power up to +1dBm FSK data rate up to 50kbits/s Controllable modulation deviation Very few external components Improved frequency stability compared to SAW solutions Wide power supply range: 2.4 to 3.6 V Low supply current, typical 9mA @ -10dBm output power Power Down and Clock modes makes power saving easy Reference Clock output pin for microcontroller Automatic Meter Reading Keyless entry Wireless data communication Alarm and security systems Home Automation Remote control Surveillance Automotive Telemetry Toys *(1(5$/ '(6&5,37,21 NRF904 is a single-chip transmitter for the 902-928 MHz band. It is compliant with the US Federal Communications Commission (FCC) standard CFR47 chapter 15. The transmitter consists of a fully integrated frequency synthesiser, a power amplifier, a crystal oscillator and a modulator. Due to the use of the crystal-oscillator stabilised frequency synthesiser, frequency drift is much lower than in comparable SAWresonator based solutions. Output power and frequency deviation is easily programmable by use of external resistors. Current consumption is very low, only 9 mA at an output power of -10dBm. Built-in Clock and Power Down modes makes power saving easily realisable. 48,&. 5()(5(1&( '$7$ 3DUDPHWHU Supply voltage Maximum output power @ 400, 3 V Maximum FSK data rate Supply current FSK transmitter @ -10dBm output power Supply current in Clock mode Supply current in Power Down mode 9DOXH 2.4 - 3.6 1 50 9 200 <10 8QLW V dBm kbit/s mA A n Table 1. NRF904 quick reference data. 7\SH 1XPEHU NRF904 - IC NRF904 - EVKIT 'HVFULSWLRQ 8 pin SOIC Evaluation kit with NRF904 IC on board 9HUVLRQ Table 2. NRF904 ordering information. Main office: Nordic VLSI ASA - Vestre Rosten 81, N-7075 Tiller, Norway Revision: 2.1 Page 1 of 16A - Phone +4772898900 - Fax +4772898989 October 2001 PRODUCT SPECIFICATION Q5) 6LQJOH FKLS 0+] 7UDQVPLWWHU %/2&. ',$*5$0 C r y s ta l O s c i lla to r C lo c k D iv id e r XTAL D IN 1 /4 F r e q u e n c y s y n th e s iz e r P h ase D e te c to r Loop F i lte r 1 /2 XO8 VCO P ow er A m p l if ie r ANT1 ANT2 P r e s c a le r 1 /2 5 6 REXT Figure 1. NRF904 block diagram. 3,1 )81&7,216 3LQ 1 2 3 4 5 6 7 8 1DPH XTAL REXT XO8 VDD DIN ANT2 ANT1 VSS 3LQ IXQFWLRQ Input Input Output Power Input Output Output Power 'HVFULSWLRQ Crystal pin / Power Up Power adjust / Clock Mode / ASK modulation digital input Reference Clock Output (Crystal Frequency / 8) Power Supply (+ 3 V DC) Digital Data Input Antenna terminal Antenna terminal Ground (0V) Table 3. NRF904 pin functions. 3,1 $66,*10(17 XTAL REXT XO8 VDD 1 2 3 4 8 7 6 5 VSS ANT1 ANT2 DIN nRF 904 Figure 2. NRF904 pin assignment. Nordic VLSI ASA Revision: 2.1 - Vestre Rosten 81, N-7075 Tiller, Norway QhtrA!AsA % - Phone +4772898900 - Fax +4772898989 October 2001 PRODUCT SPECIFICATION Q5) 6LQJOH FKLS 0+] 7UDQVPLWWHU (/(&75,&$/ 63(&,),&$7,216 Conditions: VDD = +3V, VSS = 0V, TA = - 40C to + 85C 6\PERO 3DUDPHWHU FRQGLWLRQ fTX fXTAL VDD Tamb PRF IDD IDD f RFSK IDD IDD 2SHUDWLQJ FRQGLWLRQV Transmit frequency Crystal frequency Supply voltage Operating temperature range Maximum Output Power Supply current CLOCK Mode Supply current POWER DOWN Mode )6. PRGXODWLRQ Frequency deviation (peak) FSK data rate Supply current @ 1dBm output power Supply current @ -10dBm output power $6. PRGXODWLRQ ASK data rate Transmitted power at data = `1' Transmitted power at data = `0' Supply current @ 1dBm output power Supply current @ -50dBm output power ',1 LQSXW SLQ HIGH level input voltage LOW level input voltage ;2 RXWSXW SLQ HIGH level output voltage LOW level output voltage 1RWHV 1) 1) 0LQ 902 14.094 2.4 - 40 7\S 0D[ 928 14.500 3.6 + 85 1 300 100 8QLWV MHz MHz V C dBm A nA 3) 2) 175 10 6) 3) 3) 10 0 20 18 9 40 50 27 17 kHz kbit/s mA mA RASK PRF1 PRF0 IDD IDD 0 3) 3) 18 175 10 1 -50 27 300 kbit/s dBm dBm mA uA VIH VIL 4) 4) VDD - 0.5 Vss VDD 0.3 V V VOH VOL 5) 5) VDD VDD -1.0 VDD V V NOTES: 1) The crystal frequency may be altered to produce any desired frequency within the 902MHz to 928MHz band. 2) Measured with no load on XO8 output pin. 3) Antenna load impedance = 400 . 4) The levels stated are supplied to a external series resistor in front of the DIN input pin 5) Output is an open collector. 6) Controllable with crystal parameters and external data filter. Table 4. NRF904 electrical specifications. Nordic VLSI ASA Revision: 2.1 - Vestre Rosten 81, N-7075 Tiller, Norway QhtrA"AsA % - Phone +4772898900 - Fax +4772898989 October 2001 PRODUCT SPECIFICATION Q5) 6LQJOH FKLS 0+] 7UDQVPLWWHU 3$&.$*( 287/,1( NRF904, uses the SOIC 8 package. Dimensions are in mm. 8765 E H 1234 D A1 A L e 3DFNDJH 7\SH SOIC 8 0LQ 0D[ b ' 4.80 4.98 ( 3.81 3.99 + 5.84 6.20 $ 1.55 1.73 $ 0.127 0.250 H 1.27 E 0.35 0.49 / 0.41 0.89 &RSO 0.25 D 0 8 Figure 3. NRF904 package outline. $EVROXWH 0D[LPXP 5DWLQJV 6XSSO\ YROWDJHV VDD............................... - 0.3V to + 6V VSS ...................................................0V ,QSXW YROWDJH VI....................... - 0.3V to VDD + 0.3V 2XWSXW YROWDJH VO...................... - 0.3V to VDD + 0.3V 1RWH 6WUHVV H[FHHGLQJ RQH RU PRUH RI WKH OLPLWLQJ YDOXHV PD\ FDXVH SHUPDQHQW GDPDJH WR WKH GHYLFH $77(17,21 7RWDO 3RZHU 'LVVLSDWLRQ PD (TA=85C)............................220mW 7HPSHUDWXUHV Operating Temperature.... - 40C to + 85C Storage Temperature...... - 40C to + 125C Electrostatic Sensitive Device Observe Precaution for handling. Nordic VLSI ASA Revision: 2.1 - Vestre Rosten 81, N-7075 Tiller, Norway QhtrA#AsA % - Phone +4772898900 - Fax +4772898989 October 2001 PRODUCT SPECIFICATION Q5) 6LQJOH FKLS 0+] 7UDQVPLWWHU 02'(6 2) 23(5$7,21 2YHUYLHZ RI 2SHUDWLRQDO 0RGHV Table 5 provides an overview of the different modes that the NRF904 may be set to. VR1 to VR4 are the control nodes for resistors 1 to 4 (R1 to R4 see Figure 4) and represent the voltage state needed to set a particular mode. Mode Power Down Clock ASK FSK VR1 GND VDD VDD VDD VR2 GND ASK DATA VDD VR3 VDD VDD or GND VDD or GND VR4 VDD FSK DATA Table 5 Overview of Operational Modes for NRF904. X1 14.2992MHz R1 VR1 R2 XTAL 1 2 3 4 8 NRF904 7 6 5 GND ANT1 ANT2 R4 DIN VR2 R3 REXT XO8 VDD Antenna VR3 VDD C 1 C 2 VR4 Figure 4. NRF904 with External Components. )6. 0RGH FSK modulation is realised by feeding the modulating data to the digital DIN input pin (see Figure 4). This is the normal operating mode for NRF904. In applications where high data rate and low spectrum bandwidth is required; a low pass filter should replace R4 as in Figure 5 to shape the input FSK bit stream. Figure 5 shows both a 1st order (a), and a 2nd order (b) low pass filter. Nordic VLSI ASA Revision: 2.1 - Vestre Rosten 81, N-7075 Tiller, Norway QhtrA$AsA % - Phone +4772898900 - Fax +4772898989 October 2001 PRODUCT SPECIFICATION Q5) 6LQJOH FKLS 0+] 7UDQVPLWWHU DATA R41 R42 DIN DATA R43 R44 C42 R45 DIN C43 C41 R41=3.9k R42=22k C41=680pF R43=680 R44=3.9k R45=22k C42=3.3nF C43=330pF a) 1st Order external filter 3dB frequency = 50kHz b) 2nd Order external filter 3dB frequency = 45kHz Figure 5. Alternative external DIN components for setting the spectral bandwidth. $6. PRGXODWLRQ ASK modulation can be realised by using the REXT pin (see Figure 4). When R2 is connected to VDD, the chip transmits a carrier. When R2 is connected to GND then the internal output power amplifier is turned off. These two situations represent logic `1' and logic `0' in an ASK system. When ASK modulation is used, the DIN pin must be connected to VDD. &ORFN PRGH Clock mode is available so that an external microprocessor may have a reference signal without the cost of a second crystal. In Clock mode, the crystal oscillator and reference clock output, XO8, are operating, while the rest of the transmitter is disabled. Connecting the power-adjusting resistor R2 to ground sets clock mode. Current consumption in Clock mode is typically 175A when no load is applied at the XO8 clock output pin. If a capacitive load is applied at the XO8 output, then current consumption in Clock mode will increase. Start-up time when switching between Clock mode and Transmit mode is extremely fast, less than 50s. The frequency of the clock signal is 1/8th of the crystal frequency i.e. a crystal frequency of 14.2992 MHz will result in an output clock frequency of 1.7874 MHz. The XO8 output is an open collector with an internal 30 k resistor. The internal XO8 series resistor has a typical value of 30 k. For a given value of the external resistor R3 the output voltage VXO8 (peak-to-peak) may be calculated as: 53 9 ;28 = 9'' 53 + 30 N [Vpp] Nordic VLSI ASA Revision: 2.1 - Vestre Rosten 81, N-7075 Tiller, Norway QhtrA%AsA % - Phone +4772898900 - Fax +4772898989 October 2001 PRODUCT SPECIFICATION Q5) 6LQJOH FKLS 0+] 7UDQVPLWWHU The suggested value of R3 is 15 k. Using the above equation this should provide a typical output voltage of 1.0Vpp. Note that if a significant capacitive load (more than a few picofarads) is present at the XO8 pin this will lead to a voltage loss due to lowpass filtering. Using a capacitive load of 10 pF the typical output voltage swing will drop from 1.0Vpp to 0.8Vpp. The XO8 signal will be present in Transmit mode and Clock mode if R3 is connected to VDD. If the XO8 pin is not used, it should be connected directly to ground on the circuit board. If a micro-controller is being used any internal pull up resistor within the microcontroller should also be factored into the above equation. 3RZHU 'RZQ PRGH Power Down mode is used to achieve very low current consumption. Effectively the chip is disabled with minimal leakage current consumption, typically less than 10nA. Operating in this mode when not transmitting data significantly increases battery lifetime. The resistor R1 connected from the crystal pin towards VDD supplies the crystal oscillator with bias current (see Figure 4). When R1 is connected to ground, the chip enters Power Down mode. A typical value for R1 is 150 k. Nordic VLSI ASA Revision: 2.1 - Vestre Rosten 81, N-7075 Tiller, Norway QhtrA&AsA % - Phone +4772898900 - Fax +4772898989 October 2001 PRODUCT SPECIFICATION Q5) 6LQJOH FKLS 0+] 7UDQVPLWWHU ,03257$17 7,0,1* '$7$ 7LPLQJ LQIRUPDWLRQ The timing information for the different operations is summarised in Table 6. (TX is Transmit mode, Clk is Clock mode, Pwr_Dn is Power Down Mode.) Change of Mode Pwr_Dn I TX Clk I TX Max Delay 5ms 50s Table 6. Switching times for NRF904. 6ZLWFKLQJ EHWZHHQ 3RZHU 'RZQ 0RGH DQG 7UDQVPLWPRGH The minimum time from Power Down mode until the synthesised frequency is stable and data can be transmitted is seen in Figure 6. XTAL is controlled by VR1, Figure 4. VDD XTAL DIN 5ms ms 0 5 Figure 6. Timing diagram when going from Power Down mode to Transmit-mode. 6ZLWFKLQJ EHWZHHQ &ORFN 0RGH DQG 7UDQVPLWPRGH The minimum time from Clock mode until the synthesised frequency is stable and data can be transmitted is seen in Figure 7. REXT is controlled by VR2, Figure 4. VDD REXT DIN 50us s 0 50 Figure 7. Timing diagram when going from Clock mode to Transmit-mode. Nordic VLSI ASA Revision: 2.1 - Vestre Rosten 81, N-7075 Tiller, Norway QhtrA'AsA % - Phone +4772898900 - Fax +4772898989 October 2001 PRODUCT SPECIFICATION Q5) 6LQJOH FKLS 0+] 7UDQVPLWWHU 3(5,3+(5$/ 5) ,1)250$7,21 $QWHQQD RXWSXW The "ANT" output pins provide a balanced RF output to the antenna. The pins must have a DC path to VDD, either via a RF choke or via the centre point in a loop antenna. The load impedance seen between the ANT1/ANT2 outputs should be in the range 200-700 . A load impedance of 400 is recommended if maximum output power (10dBm) is needed. Lower load impedance (for instance 50 ) can be obtained by fitting a simple matching network or a RF transformer (balun). The 50 load can also be connected directly between the ANT1/ANT2 pins, but this will result in higher current consumption for a given output power to the antenna. A single ended antenna or 50 test instrument may be connected to NRF904 by using a differential to single ended matching network (BALUN) as shown in Figure 8. xxxxxx VDD 33pF 1K 68nH ANT1 3.3pF RF out 50 ohm xxxxxx xxxxxx NRF904 15nH ANT2 3.3pF Figure 8. Connection of NRF904 to single ended antenna (50 ) by using a differential to single ended matching network. xxxxxx The inductors in Figure 8 need to have a Self-Resonance Frequency (SRF) above the carrier frequency (902-928MHz). Suitable 68nH inductors are listed in Table 7. 9HQGRUV Pulse Coilcraft muRata Stetco KOA ::: DGGUHVV http://www.pulseeng.com http://www.coilcraft.com http://www.murata.com http://www.stetco.com http://www.koaspeer.com 3DUW QR Q+ LQGXFWRUV VL]H PE-0603CD680JTT 0603CS-68NXJBC LQW1608A68NJ00 0603G680JTE KQ0603TE68NJ Table 7. Vendors and part no. for suitable 68nH inductors. Nordic VLSI ASA Revision: 2.1 - Vestre Rosten 81, N-7075 Tiller, Norway QhtrA(AsA % - Phone +4772898900 - Fax +4772898989 October 2001 PRODUCT SPECIFICATION Q5) 6LQJOH FKLS 0+] 7UDQVPLWWHU Suitable 15nH inductors are listed in Table 8. 9HQGRUV Pulse Coilcraft muRata Stetco KOA ::: DGGUHVV http://www.pulseeng.com http://www.coilcraft.com http://www.murata.com http://www.stetco.com http://www.koaspeer.com 3DUW QR Q+ LQGXFWRUV VL]H PE-0603CD150GTT 0603CS-15NXGBC LQW1608A15NG00 0603G150GTE KQ0603TE15NG Table 8. Vendors and part no. for suitable 15nH inductors. &U\VWDO 6SHFLILFDWLRQ Modulation is achieved by pulling of the crystal capacitance. As such to achieve correct frequency deviation operation as specified in Table 4 the crystal must meet the following specification: Parallel resonant frequency: Load capacitance: Series resistance, ESR: Crystal parallel capacitance: Motional capacitance: fp = transmitter centre frequency divided by 64 CL = 10 pF Rs < 60 ohm Co < 7 pF Cs = 9 fF (Guideline specification) )UHTXHQF\ GHYLDWLRQ VHWWLQJ The frequency modulation is achieved by pulling the crystal load by the use of an internal varactor. As the external resistor R4 is varied, the varactor voltage swing will vary linearly. R4 is equal to the sum of resistor values if an input filter is used as shown in Figure 5. Changing the value of R4 enables easy variation of the frequency deviation, see Figure 9. 45 40 35 C x A 30 v 25 h v 20 r q A x 15 h r Q 10 5 0 10 15 20 25 S#Abxud 30 35 Figure 9. Typical RF Frequency Deviation for varing values of R4. Nordic VLSI ASA Revision: 2.1 - Vestre Rosten 81, N-7075 Tiller, Norway QhtrA AsA % - Phone +4772898900 - Fax +4772898989 October 2001 PRODUCT SPECIFICATION Q5) 6LQJOH FKLS 0+] 7UDQVPLWWHU 2XWSXW 3RZHU DGMXVWPHQW A bias resistor R2 (see Figure 4) should be connected from the REXT pin to the positive power supply VDD. The value of this resistor sets the output power level. See table 9 for choice of R2 value. Power setting resistor R2 47k 120k RF output power 1dBm -10dBm DC current consumption 18mA 9mA Conditions: VDD = 3.0V, VSS = 0V, TA = 27C, Load impedance = 400 . Table 9. RF output power setting for the NRF904. 3&% OD\RXW DQG GHFRXSOLQJ JXLGHOLQHV A well-designed PCB is necessary to achieve good RF performance. A PCB with a minimum of two layers including a ground plane is recommended for optimum performance. The NRF904 DC supply voltage should be decoupled as close as possible to the VDD pins with high performance RF capacitors, see Table 10. It is preferable to mount a large surface mount capacitor (e.g. 4.7 F tantalum) in parallel with the smaller value capacitors. The NRF904 supply voltage should be filtered and routed separately from the supply voltages of any digital circuitry. Long power supply lines on the PCB should be avoided. All device grounds, VDD connections and VDD bypass capacitors must be connected as close as possible to the NRF904 IC. For a PCB with a topside RF ground plane, the VSS pins should be connected directly to the ground plane. For a PCB with a bottom ground plane, the best technique is to have via holes in or close to the VSS pads. Full swing digital data or control signals should not be routed close to the crystal and the XTAL pin. 3&% OD\RXW H[DPSOH Figure 11 shows a PCB layout example for the application schematic in Figure 10. A double-sided FR-4 board of 1.6mm thickness is used. This PCB has a continuous ground plane on the bottom layer. Additionally, there are ground areas on the component side of the board to ensure sufficient grounding of critical components. A large number of via holes connect the top layer ground areas to the bottom layer ground plane. There is no ground plane beneath the antenna. Nordic VLSI ASA Revision: 2.1 - Vestre Rosten 81, N-7075 Tiller, Norway QhtrA AsA % - Phone +4772898900 - Fax +4772898989 October 2001 PRODUCT SPECIFICATION Q5) 6LQJOH FKLS 0+] 7UDQVPLWWHU aaaaaaaa VDD + C6 4.7uF R1 150k PWR_DOWN CLOCK/ASK aaaaaaaa R2 47K R3 15K U1 1 2 3 4 XTAL REXT XO8 VDD VSS ANT1 ANT2 DIN 8 7 6 5 VDD C5 33pF C10 6.8pF J1 Loop Antenna 9.5x9.5mm X1 14.2992MHz C8 3.3pF aaaaaaaa XO8 C9 3.9pF R6 18K NRF904 915MHz Single chip RF Transmitter C1 33pF C2 4.7nF C3 4.7nF C4 33pF R5 3.9K DIN R4 22K C7 680pF aaaaaaaa Figure 10. NRF904 application schematic. &RPSRQHQW C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 R1 R2 R3 R4 R5 R6 X1 'HVFULSWLRQ NP0 ceramic chip capacitor, (REXT pin decoupling) X7R ceramic chip capacitor, (REXT pin decoupling) X7R ceramic chip capacitor, (Supply decoupling) NP0 ceramic chip capacitor, (Supply decoupling) NP0 ceramic chip capacitor, (Supply decoupling) Tantalum chip capacitor, (Supply decoupling) X7R ceramic chip capacitor, (Data bit stream filter) NP0 ceramic chip capacitor, (Antenna tuning) NP0 ceramic chip capacitor, (Antenna tuning) NP0 ceramic chip capacitor, (Antenna tuning) 0.1W chip resistor, (Crystal oscillator bias) 0.1W chip resistor, (Transmitter power setting) 0.1W chip resistor, (XO8 output level setting) 0.1W chip resistor, (Data bit stream filter/Frequency deviation setting) 0.1W chip resistor, (Data bit stream filter/Frequency deviation setting) 0.1W chip resistor, (Antenna Q reduction) Crystal 6L]H 0603 0603 0603 0603 0603 3216 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 - 9DOXH 33 4.7 4.7 33 33 4.7 680 3.3 3.9 6.8 150 47 15 22 3.9 18 14.094-14.500 7ROHUDQFH 8QLWV pF nF nF pF pF F pF pF pF pF k k k k k k MHz 0.1 0.1 0.1 Table 10. Recommended external components. Nordic VLSI ASA Revision: 2.1 - Vestre Rosten 81, N-7075 Tiller, Norway QhtrA !AsA % - Phone +4772898900 - Fax +4772898989 October 2001 PRODUCT SPECIFICATION Q5) 6LQJOH FKLS 0+] 7UDQVPLWWHU a) Top silk screen b) Bottom silk screen c) Top view d) Bottom view Figure 11. PCB layout (example) for NRF904 with loop antenna. Nordic VLSI ASA Revision: 2.1 - Vestre Rosten 81, N-7075 Tiller, Norway QhtrA "AsA % - Phone +4772898900 - Fax +4772898989 October 2001 PRODUCT SPECIFICATION Q5) 6LQJOH FKLS 0+] 7UDQVPLWWHU '(),1,7,216 'DWD VKHHW VWDWXV Objective product specification Preliminary product specification Product specification This datasheet contains target specifications for product development. This datasheet contains preliminary data; supplementary data may be published from Nordic VLSI ASA later. This datasheet contains final product specifications. Nordic VLSI ASA reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. /LPLWLQJ YDOXHV Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Specifications sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. $SSOLFDWLRQ LQIRUPDWLRQ Where application information is given, it is advisory and does not form part of the specification. Table 11. Definitions Nordic VLSI ASA reserves the right to make changes without further notice to the product to improve reliability, function or design. Nordic VLSI does not assume any liability arising out of the application or use of any product or circuits described herein. /,)( 6833257 $33/,&$7,216 These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Nordic VLSI ASA customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Nordic VLSI ASA for any damages resulting from such improper use or sale. Product specification: Revision Date: 30.10.2001. Datasheet order code: 301001-NRF904. All rights reserved (R). Reproduction in whole or in part is prohibited without the prior written permission of the copyright holder. Nordic VLSI ASA Revision: 2.1 - Vestre Rosten 81, N-7075 Tiller, Norway QhtrA #AsA % - Phone +4772898900 - Fax +4772898989 October 2001 PRODUCT SPECIFICATION Q5) 6LQJOH FKLS 0+] 7UDQVPLWWHU <285 127(6 Nordic VLSI ASA Revision: 2.1 - Vestre Rosten 81, N-7075 Tiller, Norway QhtrA $AsA % - Phone +4772898900 - Fax +4772898989 October 2001 PRODUCT SPECIFICATION Q5) 6LQJOH FKLS 0+] 7UDQVPLWWHU 1RUGLF 9/6, $6$ :RUOG :LGH 'LVWULEXWRUV )RU Revision 2.1 QhtrA %AsA % October 2001 |
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