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| LMC555 CMOS Timer July 1999 LMC555 CMOS Timer General Description The LMC555 is a CMOS version of the industry standard 555 series general purpose timers. In addition to the standard package (SOIC, MSOP, and MDIP) the LMC555 is also available in a chip sized package (8 Bump micro SMD) using National's micro SMD package technology. The LMC555 offers the same capability of generating accurate time delays and frequencies as the LM555 but with much lower power dissipation and supply current spikes. When operated as a one-shot, the time delay is precisely controlled by a single external resistor and capacitor. In the stable mode the oscillation frequency and duty cycle are accurately set by two external resistors and one capacitor. The use of National Semiconductor's LMCMOSTM process extends both the frequency range and low supply capability. Features n n n n n n n n n n Less than 1 mW typical power dissipation at 5V supply 3 MHz astable frequency capability 1.5V supply operating voltage guaranteed Output fully compatible with TTL and CMOS logic at 5V supply Tested to -10 mA, +50 mA output current levels Reduced supply current spikes during output transitions Extremely low reset, trigger, and threshold currents Excellent temperature stability Pin-for-pin compatible with 555 series of timers Available in 8 pin MSOP Package and 8-Bump micro SMD package Block and Connection Diagrams 8-Pin SOIC, MSOP, and MDIP Packages 8-Bump micro SMD DS008669-1 Top View Top View (bump side down) DS008669-9 LMCMOSTM is a trademark of National Semiconductor Corp. (c) 1999 National Semiconductor Corporation DS008669 www.national.com Ordering Information Package Temperature Range Industrial -40C to +85C 8-LeadSmall Outline (SO) 8-Lead Mini Small Outline (MSOP) 8-Lead Molded Dip (MDIP) 8-Bump micro SMD LMC555CM LMC555CMX LMC555CMM LMC555CMX LMC555CN LMC555CBP LMC555CBPX LMC555CM LMC555CM ZC5 ZC5 LMC555CN F01 F01 Rails Tape and Reel Rails Tape and Reel Rails 250 Units Tape and Reel 3k Units Tape and Reel MUA08A M08A Package Marking Transport Media NSC Drawing N08E BPA08EFB micro SMD Marking Orientation Top View DS008669-23 www.national.com 2 Absolute Maximum Ratings (Notes 2, 3) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage, V+ Input Voltages, VTRIG, VRES, VCTRL, VTHRESH Output Voltages, VO, VDIS Output Current IO, IDIS Storage Temperature Range Soldering Information MDIP Soldering (10 seconds) SOIC, MSOP Vapor Phase (60 sec) SOIC, MSOP Infrared (15 sec) 15V -0.3V to VS + 0.3V 15V 100 mA -65C to +150C 260C 215C 220C Operating Ratings(Notes 2, 3) Termperature Range Thermal Resistance (JA) (Note 2) SO, 8-lead Small Outline MSOP, 8-lead Mini Small Outline MDIP, 8-lead Molded Dip 8-Bump micro SMD Maximum Allowable Power Dissipation @25C MDIP-8 SO-8 MSOP-8 8 Bump micro SMD -40C to +85C 169C/W 225C/W 111C/W 220C/W 1126mW 740mW 555mW 568mW Note: See AN-450 "Surface Mounting Methods and Their Effect on Product Reliability" for other methods of soldering surface mount devices. Electrical Characteristics (Notes 1, 2) Test Circuit, T = 25C, all switches open, RESET to VS unless otherwise noted Symbol IS Parameter Supply Current Conditions VS = 1.5V VS = 5V VS = 12V VS = 1.5V VS = 5V VS = 12V VS = 1.5V, IDIS = 1 mA VS = 5V, IDIS = 10 mA VS = 1.5V, IO = 1 mA VS = 5V, IO = 8 mA VS = 12V, IO = 50 mA VS = 1.5V, IO = -0.25 mA VS = 5V, IO = -2 mA VS = 12V, IO = -10 mA VS = 1.5V VS = 12V VS = 5V VS = 1.5V (Note 4) VS = 12V VS = 5V VS = 5V VS = 12V SW 2, 4 Closed VS = 1.5V VS = 5V VS = 12V VS = 5V 1V VS = 5V -40C T +85C SW 1, 3 Closed, VS = 12V Max. Freq. Test Circuit, VS = 5V Max. Freq. Test Circuit VS = 5V, CL = 10 pF 4.0 0.9 1.0 1.0 Min Typ 50 100 150 0.8 2.9 7.4 1.0 3.3 8.0 75 150 0.2 0.3 1.0 1.0 4.4 10.5 0.4 3.7 0.4 0.4 1.25 4.7 11.3 0.5 4.0 10 0.7 0.75 10 10 1.0 1.1 1.1 1.1 0.3 75 4.8 3.0 15 5.6 100 1.25 1.20 1.25 1.0 1.1 0.6 4.3 Max 150 250 400 1.2 3.8 8.6 150 300 0.4 0.6 2.0 Units (Limits) A VCTRL Control Voltage V VDIS VOL Discharge Saturation Voltage Output Voltage (Low) mV V VOH Output Voltage (High) Trigger Voltage Trigger Current Reset Voltage Reset Current Threshold Current Discharge Leakage Timing Accuracy V VTRIG ITRIG VRES IRES ITHRESH IDIS t V pA V pA pA nA ms t/VS t/T fA fMAX tR, tF Timing Shift with Supply Timing Shift with Temperature Astable Frequency Maximum Frequency Output Rise and Fall Times %/V ppm/C kHz MHz ns 3 www.national.com Electrical Characteristics (Notes 1, 2) Test Circuit, T = 25C, all switches open, RESET to VS unless otherwise noted (Continued) Symbol tPD Parameter Trigger Propagation Delay Conditions VS = 5V, Measure Delay from Trigger to Output Min Typ Max Units (Limits) ns 100 Note 1: All voltages are measured with respect to the ground pin, unless otherwise specified. Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit is given, however, the typical value is a good indication of device performance. Note 3: See AN-450 for other methods of soldering surface mount devices, and also AN-1112 for micro SMD considerations. Note 4: If the RESET pin is to be used at temperatures of -20C and below VS is required to be 2.0V or greater. Note 5: For device pinout please refer to table 1 Test Circuit (Note 5) Maximum Frequency Test Circuit (Note 5) DS008669-3 DS008669-2 TABLE 1. Package Pinout Names vs. Pin Function Pin Function GND Trigger Output Reset Control Voltage Threshold Discharge V+ 1 2 3 4 5 6 7 8 Package Pin numbers 8-Pin SO,MSOP, and MDIP 8-Bump micro SMD 7 6 5 4 3 2 1 8 www.national.com 4 Application Info MONOSTABLE OPERATION In this mode of operation, the timer functions as a one-shot (Figure 1). The external capacitor is initially held discharged by internal circuitry. Upon application of a negative trigger pulse of less than 1/3 VS to the Trigger terminal, the flip-flop is set which both releases the short circuit across the capacitor and drives the output high. When the reset function is not use, it is recommended that it be connected to V+ to avoid any possibility of false triggering. Figure 3 is a nomograph for easy determination of RC values for various time delays. Note: In monstable operation, the trigger should be driven high before the end of timing cycle. DS008669-11 DS008669-4 FIGURE 3. Time Delay ASTABLE OPERATION If the circuit is connected as shown in Figure 4 (Trigger and Threshold terminals connected together) it will trigger itself and free run as a multivibrator. The external capacitor charges through RA + RB and discharges through RB. Thus the duty cycle may be precisely set by the ratio of these two resistors. FIGURE 1. Monostable (One-Shot) The voltage across the capacitor then increases exponentially for a period of tH = 1.1 RAC, which is also the time that the output stays high, at the end of which time the voltage equals 2/3 VS. The comparator then resets the flip-flop which in turn discharges the capacitor and drives the output to its low state. Figure 2 shows the waveforms generated in this mode of operation. Since the charge and the threshold level of the comparator are both directly proportional to supply voltage, the timing internal is independent of supply. DS008669-5 DS008669-10 FIGURE 4. Astable (Variable Duty Cycle Oscillator) In this mode of operation, the capacitor charges and discharges between 1/3 VS and 2/3 VS. As in the triggered mode, the charge and discharge times, and therefore the frequency are independent of the supply voltage. VCC = 5V TIME = 0.1 ms/Div. RA = 9.1k C = 0.01F Top Trace: Input 5V/Div. Middle Trace: Output 5V/Div. Bottom Trace: Capacitor Voltage 2V/Div. FIGURE 2. Monostable Waveforms Reset overrides Trigger, which can override threshold. Therefore the trigger pulse must be shorter than the desired tH. The minimum pulse width for the Trigger is 20ns, and it is 400ns for the Reset. During the timing cycle when the output is high, the further application of a trigger pulse will not effect the circuit so long as the trigger input is returned high at least 10s before the end of the timing interval. However the circuit can be reset during this time by the application of a negative pulse to the reset terminal. The output will then remain in the low state until a trigger pulse is again applied. Figure 5 shows the waveform generated in this mode of operation. 5 www.national.com Application Info (Continued) DS008669-14 DS008669-12 VCC = 5V TIME = 20 s/Div. RA = 3.9k RB = 9k C = 0.01F Top Trace: Output 5V/Div. Bottom Trace: Capacitor Voltage 1V/Div. VCC = 5V TIME = 20 s/Div. RA = 9.1 k C = 0.01F Top Trace: Input 4V/Div. Middle Trace: Output 2V/Div. Bottom Trace: Capacitor 2V/Div. FIGURE 7. Frequency Divider Waveforms PULSE WIDTH MODULATOR When the timer is connected in the monostable mode and triggered with a continuous pulse train, the output pulse width can be modulated by a signal applied to the Control Voltage Terminal. Figure 8 shows the circuit, and in Figure 9 are some waveform examples. FIGURE 5. Astable Waveforms The charge time (output high) is given by t1 = Ln2 (RA + RB)C And the discharge time (output low) by: t2 = Ln2 (RB)C Thus the total period is: T = t1 + t2 = Ln2 (RA + RB)C The frequency of oscillation is: Figure 6 may be used for quick determination of these RC Values. The duty cycle, as a fraction of total period that the output is low, is: DS008669-20 FIGURE 8. Pulse Width Modulator DS008669-13 DS008669-15 FIGURE 6. Free Running Frequency FREQUENCY DIVIDER The monostable circuit of Figure 1 can be used as a frequency divider by adjusting the length of the timing cycle. Figure 7 shows the waveforms generated in a divide by three circuit. VCC = 5V TIME = 0.2 ms/Div. RA = 9.1 k C = 0.01F Top Trace: Modulation 1V/Div. Bottom Trace: Output Voltage 2V/Div. FIGURE 9. Pulse Width Modulator Waveforms PULSE POSITION MODULATOR This application uses the timer connected for astable operation, as in Figure 10, with a modulating signal again applied to the control voltage terminal. The pulse position varies with www.national.com 6 Application Info (Continued) the modulating signal, since the threshold voltage and hence the time delay is varied. Figure 11 shows the waveforms generated for a triangle wave modulation signal. DS008669-16 DS008669-21 VCC = 5V TIME = 0.1 ms/Div. RA = 3.9 k RB = 3 k C = 0.01F Top Trace: Modulation Input 1V/Div. Bottom Trace: Output Voltage 2V/Div. FIGURE 10. Pulse Position Modulator FIGURE 11. Pulse Position Modulator Waveforms 50% DUTY CYCLE OSCILLATOR The frequency of oscillation is f = 1/(1.4 RCC) DS008669-6 FIGURE 12. 50% Duty Cycle Oscillator 7 www.national.com Physical Dimensions inches (millimeters) unless otherwise noted Molded Small Outline (SO) Package (M) NS Package Number M08A www.national.com 8 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 8-Lead (0.118" Wide) Molded Mini Small Outline Package NS Package Number MUA08A 9 www.national.com Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Molded Dual-in-line Package (N) NS Package Number N08E www.national.com 10 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) NOTES: UNLESS OTHERWISE SPECIFIED 1. EPOXY COATING 2. 63Sn/37Pb EUTECTIC BUMP 3. RECOMMEND NON-SOLDER MASK DEFINED LANDING PAD. 4. PIN 1 IS ESTABLISHED BY LOWER LEFT CORNER WITH RESPECT TO TEXT ORIENTATION. REMAINING PINS ARE NUMBERED COUNTERCLOCKWISE. 5. XXX IN DRAWING NUMBER REPRESENTS PACKAGE SIZE VARIATION WHERE X1 IS PACKAGE WIDTH, X2 IS PACKAGE LENGTH AND X3 IS PACKAGE HEIGHT. 6. REFERENCE JEDEC REGISTRATION MO-211, VARIATION BC. micro SMD Package NS Package Number BPA08EFB X1 = 1.387 X2 = 1.412 X3 = 0.850 11 www.national.com LMC555 CMOS Timer Notes LIFE SUPPORT POLICY NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: support@nsc.com www.national.com National Semiconductor Europe Fax: +49 (0) 1 80-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 1 80-530 85 85 English Tel: +49 (0) 1 80-532 78 32 Francais Tel: +49 (0) 1 80-532 93 58 Italiano Tel: +49 (0) 1 80-534 16 80 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: sea.support@nsc.com National Semiconductor Japan Ltd. Tel: 81-3-5639-7560 Fax: 81-3-5639-7507 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. |
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