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| MICROCIRCUIT DATA SHEET MNCLC401A-X REV 0B0 Original Creation Date: 11/24/98 Last Update Date: 03/09/99 Last Major Revision Date: 11/24/98 FAST SETTLING, WIDEBAND HIGH-GAIN MONOLITHIC OP AMP General Description The CLC401 is a wideband, fast-settling operational amplifier designed for applications requiring a gain greater than +7. Constructed using an advanced complementary bipolar process and a proprietary design, the CLC401 features dynamic performance far beyond that of typical high-speed monolithic operational amplifiers. For example, at a gain of +20 V/V, the -3dB bandwidth is 150MHz and the rise/fall time is only 2.5ns. The wide bandwidth and linear phase (0.2 deviation from linear at 50MHz) and a very flat gain response makes the CLC401 ideal for many digital communication system applications. For example, demodulators need both DC coupling and high-frequency amplification requirements that are ordinarily difficult to meet. The very fast 10ns settling to 0.1% and the ability to drive capacitive loads lend themselves well to flash A/D applications. Systems employing D/A converters also benefit from the settling time and also by the fact that current-to-voltage transimpedance amplification is easily accomplished. The CLC401 provides a quick, effective design solution. Its stable operation over the entire +7 to +50 gain range precludes the need for external compensation. And, unlike many other high-speed op amps, the CLC401's power dissipation of 150mW is compatible with designs which must limit total power dissipation or power supply requirements. Industry Part Number CLC401A NS Part Numbers CLC401AJ-MLS CLC401AJ-QML Prime Die UB1364A Controlling Document SEE FEATURES SECTION Processing MIL-STD-883, Method 5004 Subgrp Description 1 2 3 4 5 6 7 8A 8B 9 10 11 Static tests at Static tests at Static tests at Dynamic tests at Dynamic tests at Dynamic tests at Functional tests at Functional tests at Functional tests at Switching tests at Switching tests at Switching tests at Temp ( oC) +25 +125 -55 +25 +125 -55 +25 +125 -55 +25 +125 -55 Quality Conformance Inspection MIL-STD-883, Method 5005 1 MNCLC401A-X REV 0B0 MICROCIRCUIT DATA SHEET Features - -3dB bandwidth of 150MHz - 0.1% settling in 10ns - Low power, 150mW - Overload and short circuit protected - Stable without compensation - Recommended gain range +7 to +50 - CONTROLLING DOCUMENT: CLC401AJ-QML 5962-8997301PA Applications Flash, precision A/D conversion Photodiode, CCD preamps IF processors High-speed modems, radios Line drivers DC-coupled log ampifiers High-speed communications 2 MNCLC401A-X REV 0B0 MICROCIRCUIT DATA SHEET (Absolute Maximum Ratings) (Note 1) Supply Voltage (Vs) +7V dc Output Current (Iout) +70mA Maximum Power Dissipation (Pd) (Note 2) 1.2W Junction Temperature (Tj) +175 C Storage Temperature Range -65 C to +150 C Lead Temperature (soldering, 10 seconds) +300 C Thermal Resistance Junction-to-ambient (ThetaJA) Ceramic DIP (Still Air) (500 LFPM) Junction-to-case (ThetaJC) Ceramic DIP Package Weight (typical) Ceramic DIP ESD Tolerance (Note 3) ESD Rating Note 1: 134 C/W 80 C/W 27 C/W TBD 1000 V Note 2: Note 3: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. The maximum power dissipation must be derated at elevated temperatures and is dictated by Tjmax (maximum junction temperature), ThetaJA (package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is Pdmax = (Tjmax - TA)/ThetaJA or the number given in the Absolute Maximum Ratings, whichever is lower. Human body model, 100pF discharged through 1.5K Ohms. Recommended Operating Conditions Supply Voltage (Vs) +5V dc Gain Range +7 to +40 and -1 to -40 Ambient Operating Temperature Range (Ta) -55 C to +125 C 3 MNCLC401A-X REV 0B0 MICROCIRCUIT DATA SHEET Electrical Characteristics DC PARAMETERS: Open Loop Characteristics (The following conditions apply to all the following parameters, unless otherwise specified.) DC: Rl = 100 Ohms, Vs = +5V dc, and Av = +20. -55 C < Ta < +125 C (Note 3) SYMBOL +Iin PARAMETER Input Bias Current noninverting Input Bias Current (Inverting) CONDITIONS NOTES PINNAME MIN -20 -36 -30 -40 -46 Tc (+Iin) Average +Input Bias Current Drift Average -Input Bias Current Drift Input Offset Voltage 1 -200 MAX +20 +36 +30 +40 +46 +200 UNIT uA uA uA uA uA SUBGROUPS 1, 2 3 1 2 3 -Iin nA/C 1, 2, 3 nA/C 1, 2, 3 mV mV mV 1 2 3 Tc (-Iin) 1 -200 +200 Vio -6 -11 -10 +6 +11 +10 +50 +21 Tc (Vio) IS PSRR +RIN Average Offset Voltage Drift Supply Current Power Supply Rejection Ratio Input Resistance No Load +VS = +4.5V to +5.0V -VS = -4.5V to -5.0V 1 -50 uV/C 1, 2, 3 mA dB 1, 2, 3 1, 2, 3 50 1 1 100 50 0.3 2.5 50 2.9 2.7 kOhm 1, 2 kOhm 3 Ohm pF dB V V 1, 2, 3 4 4, 5, 6 1, 2 3 Rout CIN CMRR Vout Output Impedance (DC) Input Capacitance Common Mode Rejection Ratio Output Voltage Swing No Load TA=+25C 1 1 1 4 MNCLC401A-X REV 0B0 MICROCIRCUIT DATA SHEET Electrical Characteristics AC PARAMETERS: Closed Loop Characteristics (The following conditions apply to all the following parameters, unless otherwise specified.) AC: Rl = 100 Ohms, Vs = +5V dc, and Av = +20. -55 C < Ta < +125 C (Note 3) SYMBOL SSBW PARAMETER Small Signal Bandwidth CONDITIONS -3dB bandwidth, VOUT < 2 VPP NOTES PINNAME MIN 100 70 100 LSBW Large Signal Bandwidth Gain Flatness Peaking Gain Flatness Peaking Gain Flatness Rolloff -3dB bandwidth, VOUT < 4 VPP 1 1 GFPL 0.1 MHz to 25 MHz, VOUT < 2 VPP 65 55 0.1 0.1 GFPH > 25 MHz, VOUT < 2 VPP 0.2 0.2 GFR 0.1 MHz to 50 MHz, VOUT < 2 VPP 1.0 1.3 1.0 MAX UNIT MHz MHz MHz MHz MHz dB dB dB dB dB dB dB SUBGROUPS 4 5 6 4, 6 5 4 5, 6 4 5, 6 4 5 6 AC PARAMETERS: Distortion (The following conditions apply to all the following parameters, unless otherwise specified.) AC: Rl = 100 Ohms, Vs = +5V dc, and Av = +20. -55 C < Ta < +125 C (Note 3) HD2 2nd Harmonic Distortion 3rd Harmonic Distortion 2 VPP at 20 MHz -35 -35 HD3 2 VPP at 20 MHz -50 -45 -50 dBc dBc dBc dBc dBc 4 5, 6 4 5 6 AC PARAMETERS: Equivalent Input Noise (The following conditions apply to all the following parameters, unless otherwise specified.) AC: Rl = 100 Ohms, Vs = +5V dc, and Av = +20. -55 C < Ta < +125 C (Note 3) NF Noise Floor > 1.0 MHz 1, 2 1, 2 INV Integrated Noise 1.0 MHz to 150 MHz 1, 2 1, 2 -155 -154 50 55 dBm dBm uV uV 4, 6 5 4, 6 5 5 MNCLC401A-X REV 0B0 MICROCIRCUIT DATA SHEET Electrical Characteristics AC PARAMETERS: Time Domain Response (The following conditions apply to all the following parameters, unless otherwise specified.) AC: Rl = 100 Ohms, Vs = +5V dc, and Av = +20. -55 C < Ta < +125 C (Note 3) SYMBOL SR PARAMETER Slew Rate CONDITIONS AV = +2, measured at +1V at 6V step AV = +2, measured at +1V at 6V step TRS Rise Time 2V Step NOTES 1 1 1 1 TRL Fall Time 5V Step 1 1 TSP OS Settling Time to +0.1% Overshoot 2V Step at 0.1% 2V Step 1 1 PINNAME MIN 800 700 3.5 5.0 7.0 8.0 15 10 MAX UNIT SUBGROUPS V/uS 9, 11 V/uS 10 nS nS nS nS nS % 9, 11 10 9, 11 10 9, 10, 11 9, 10, 11 DC PARAMETERS: DRIFT LIMITS (The following conditions apply to all the following parameters, unless otherwise specified.) DC: Rl = 100 Ohms, Vs = +5V dc, and Av = +20. "Deltas not required on B-level product. Deltas required for S-level (-MLS) product as specified on Internal Processing Instructions (IPI)." (Note 3) +Iin Input Bias Current (noninverting) Input Bias Current (inverting) Input Offset Voltage Supply Current Note 1: Note 2: Note 3: Note 4: No Load -2.0 2.0 uA 1 -Iin -3.0 3.0 uA 1 Vio IS -1.0 1.0 2.0 mV mA 1 1 If not tested, shall be guaranteed to the limits specified in Table 1 Noise tests are performed from 5MHz to 200MHz. The algebraic convention, whereby the most negative value is a minimum and most positive is a maximum, is used in this table. Negative current shall be defined as convential current flow out of a device terminal. Group A testing only. 6 MNCLC401A-X REV 0B0 MICROCIRCUIT DATA SHEET Graphics and Diagrams GRAPHICS# 07081HRA3 J08ARL P000421A CERDIP (J), 8 LEAD (B/I CKT) CERDIP (J), 8 LEAD (P/P DWG) CERDIP (J), 8 LEAD (PINOUT) DESCRIPTION See attached graphics following this page. 7 N/C VINV VNON-INV -VCC 1 2 3 4 8 7 6 5 N/C +VCC VOUT N/C CLC401J 8 - LEAD DIP CONNECTION DIAGRAM TOP VIEW P000421A MIL/AEROSPACE OPERATIONS 2900 SEMICONDUCTOR DRIVE SANTA CLARA, CA 95050 N MNCLC401A-X REV 0B0 MICROCIRCUIT DATA SHEET Revision History Rev 0A0 0B0 ECN # Rel Date Originator Shaw Mead Rose Malone Changes Initial MDS Release Update MDS: MNCLC401A-X, Rev. 0A0 to MNCLC401A-X, Rev. 0B0. Moved Reference to Controlling Document to Features Section. Added Reference to MIL-STD-883, Method 5004 and Method 5005 to Main Table, and limits to Thermal Resistance under Absolute Section. M0003170 03/09/99 M0003271 03/09/99 8 |
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