 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| MICROCIRCUIT DATA SHEET MNLMX2315-X REV 2A1 PLL FREQUENCY SYNTHESIZER General Description The LMX2315 is a high performance frequency synthesizer with integrated prescalers designed for RF operation up to 1.2 GHz. They are fabricated using National's ABiC IV BiCMOS process. A 64/65 or a 128/129 divide ratio can be selected for the LMX2315 RF synthesizer at input frequencies of up to 1.2 GHz. Using a proprietary digital phase locked loop technique, the LMX2315's linear phase detector characteristics can generate very stable, low noise signals for controlling a local oscillator. Serial data is transferred into the LMX2315 via a three line MICROWIRE(TM) interface (Data Enable, Clock). Supply voltage can range from 2.7V to 5.5V. The LMX2315 features very low current consumption, typically 6 mA. The LMX2315, is available in a SOIC 20-pin surface mount ceramic package. Original Creation Date: 09/05/97 Last Update Date: 07/30/99 Last Major Revision Date: 05/10/99 Industry Part Number LMX2315 NS Part Numbers LMX2315WG-QML Prime Die LMX2315 Controlling Document SEE FEATURES SECTION: Processing MIL-STD-883, Method 5004 Subgrp Description 1 2 3 4 5 6 7 8A 8B 9 10 11 Static tests at Static tests at Static tests at Dynamic tests at Dynamic tests at Dynamic tests at Functional tests at Functional tests at Functional tests at Switching tests at Switching tests at Switching tests at Temp ( oC) +25 +105 -55 +25 +105 -55 +25 +105 -55 +25 +105 -55 Quality Conformance Inspection MIL-STD-883, Method 5005 1 MNLMX2315-X REV 2A1 MICROCIRCUIT DATA SHEET Features RF operation up to 1.2 GHz. 2.7V to 5.5V operation. Low current consumption. Dual modulus prescaler: 64/65 or 128/129 Internal balanced, low leakage charge pump. Power down feature for sleep mode: Icc = 30 uA (typ) at Vcc = 3V - Small-outline ceramic surface mount SOIC, 0.300" wide. - CONTROLLING DOCUMENT: LMX2315WG-QML 5962-9855001QXA Applications Satellite Communications Payloads Navigation Systems Military Wireless Communications 2 MNLMX2315-X REV 2A1 MICROCIRCUIT DATA SHEET (Absolute Maximum Ratings) (Note 1) Power Supply Voltage Vcc Vp Voltage on Any Pin with Gnd = 0V (Vi) Storage Temperature Range (Ts) Power Dissipation (Note 2) Pd Junction Temperature (Note 2) Tj Lead Temperature (Tl) (Solder, 4 sec.) Thermal Resistance (Note 2) ThetaJA (Still Air @ 0.5W) (500LF/Min Air Flow @ 0.5W) ThetaJC Package Weight (Typical) ESD Tolerance (Note 3) -0.3V to +6.5V -0.3V to +6.5V -0.3V to +6.5V -65 C to +150 C 1 Watt +150 C +260 C 120 C/W 86 C/W 19 C/W 600mg Less Than 500V Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guaranteed specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. The maximum power dissipation must be derated at elevated temperatures and is dictated by Tjmax (maximum junction temperature), ThetaJA (package junction to ambient theraml resistance), and TA (ambient temperature). The maximum allowable power dissiaption at any temperature is Pdmax = (Tjmax -TA) /ThetaJA or the number given in the Absolute Maximum Ratings, whichever is lower. This device is a high performance RF integrated circuit with an ESD rating <500V and is ESD sensitive. Handling and assembly of this device should be done at ESD workstations. Note 2: Note 3: Recommended Operating Conditions Power Supply Voltage Vcc Vp Operating Temperature (TA) 2.7V to 5.5V Vcc to +5.5V -55 C to +105 C 3 MNLMX2315-X REV 2A1 MICROCIRCUIT DATA SHEET Electrical Characteristics DC PARAMETERS: (The following conditions apply to all the following parameters, unless otherwise specified.) DC: Vcc = 5.5V, Vp = 5.5V SYMBOL Icc PARAMETER Power Supply Current Power Down Current Vcc = 5.5V CONDITIONS NOTES PINNAME MIN MAX 8.5 9.5 Icc-pwdn Vcc = 2.7V Vcc = 5.5V VIH VIL IIH High Level Input Voltage Low Level Input Voltage High Level Input Current (Clock Data) Low Level Input Current (Clock Data) Oscillator Input Current Oscillator Input Current High Level Input Current (LE, FC, PWDN) Low Level Input Current (LE, FC, PWDN) Charge Pump TRI-STATE Current Charge Pump Output Current Vcc = Vp = 2.7V Vcc = Vp = 2.7V VIH = Vcc = 5.5V 1, 4 1, 4 -1.0 0.7Vcc 180 350 UNIT mA mA uA uA V 0.3Vcc V 1.0 uA SUBGROUPS 1, 3 2 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 3 2 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 IIL VIL = 0, Vcc = 5.5V -1.0 1.0 uA IIH IIL IIH VIH = Vcc = 5.5V VIL = 0, Vcc = 5.5V VIH = Vcc = 5.5V -100 -1.0 100 uA uA 1.0 uA IIL VIL = 0, Vcc = 5.5V -100 1.0 uA IDO-Tri 0.5V < Vdo < 3.1V, Vcc = Vp = 3.6V -2.5 -25 2.5 25 nA nA mA mA IDO-Source Vcc = Vp = 2.7V, Vdo = 1.35V Vcc = Vp = 5.0V, Vdo = 2.5V -3.2 -8.0 3.2 8.0 15 IDO-Sink Charge Pump Output Current Vcc = Vp = 2.7V, Vdo = 1.35V Vcc = Vp = 5.0V, Vdo = 2.5V mA mA % IDO vs VDO Charge Pump Output Current Magnitude Variation vs Voltage Vcc = Vp = 5.0V, 0.5V < Vdo < 4.5V 4 MNLMX2315-X REV 2A1 MICROCIRCUIT DATA SHEET Electrical Characteristics DC PARAMETERS:(Continued) (The following conditions apply to all the following parameters, unless otherwise specified.) DC: Vcc = 5.5V, Vp = 5.5V SYMBOL IDOsink vs IDOsource PARAMETER Charge Pump Output Current Sink vs Source Mismatch High Level Output Voltage Low Level Output Voltage High Level Output Voltage Low Level Output Voltage Open Drain Output Current (PHP) Open CONDITIONS Vcc = Vp = 5.0V, VDO = 2.5V NOTES PINNAME MIN MAX 10 UNIT % SUBGROUPS 1, 2, 3 VOH VOL VOH (OSCout) VOL (OSCout) IOL IOH IOH = -1.0mA IOL = 1.0mA IOH = -200uA, Vcc = Vp = 3.0V IOL = 200uA, Vcc = Vp = 3.0V VOL = 0.4V VOH = 5.5V 2 2 Vcc -0.8 0.4 Vcc -0.8 0.4 V V V V mA 100 uA 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 4 1.0 5 MNLMX2315-X REV 2A1 MICROCIRCUIT DATA SHEET Electrical Characteristics AC PARAMETERS: (The following conditions apply to all the following parameters, unless otherwise specified.) AC: Vcc = 2.7V, Vp = 2.7V SYMBOL tCS tCH tCWH tCWL tES tEW fIN PARAMETER Data to Clock Setup Time Data to Clock Hold Time Clock Pulse Width High Clock Pulse Width Low Clock to Enable Setup Time Enable Pulse Width Maximum Operating Frequency CONDITIONS See Data Input Timing for Figure 3 See Data Input Timing for Figure 3 See Data Input Timing for Figure 3 See Data Input Timing for Figure 3 See Data Input Timing for Figure 3 See Data Input Timing for Figure 3 Divide Ratio 193, fout (diff) = +322Hz Divide Ratio 385, fout (diff) = +243Hz Pfin Input Sensitivity Vcc = 2.7V Vcc = 5.5V NOTES 4 4 4 4 4 4 5 5 4 4 4 Locktime Freq. Jump 51MHz (f = 864 to 915Mhz), lock time within +5KHz, Vcc = Vp = 5.0V fop = 900Mhz at 1KHz offset, Vcc = Vp = 5.0V fop = 900Mhz at 10KHz offset, Vcc = Vp = 5.0V Spurs Note Note Note Note Note 1: 2: 3: 4: 5: fop = 900Mhz, fref = 200KHz, Vcc = Vp = 5.0V 3 PINNAME MIN 50 10 50 50 50 50 1.2 1.2 -15 -9 -7 +5 +6 +6 500 MAX UNIT nS nS nS nS nS nS GHz GHz dBm dBm dBm uS SUBGROUPS 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10 11 9 Phase Noise 3 3 3 -70 -70 -60 dBc dBc dBc 9 9 9 Except fIN and OSCin. Except OSCout. QMLV/MLS only Used as Setup Conditions for Functional Testing. The limits shown are the maximum operating frequency. It is tested by dividing the 1.2GHz by the divide ratio in the condition column and measuring the difference between output frequency pin and the expected output frequency. 6 MNLMX2315-X REV 2A1 MICROCIRCUIT DATA SHEET Graphics and Diagrams GRAPHICS# 06346HRA3 AN00035A P000390A WG20ARB DESCRIPTION CERPACK, 20 LEAD GULL WING (B/I CKT) (LMX2305/15/25) TIMING DIAGRAM CERAMIC SOIC (WG), 20 LEAD (PINOUT) CERPACK, 20 LEAD GULL WING (P/P DWG) See attached graphics following this page. 7 DATA N18: MSB N17 N10 N9 N1 CONTROL BIT: LSB (R15: MSB) (R14) (R8) (R7) (R6) (R1) CONTROL BIT: LSB CLK tCWL LE OR tCS tCH tCWH tES tEW LE figure 3 AN00035A Notes: 1. Parenthesis data indicates programmable reference divider data. 2. Data shifted into register in clock rising edges. 3. Data is shifted in MSB first. MIL/AEROSPACE OPERATIONS 2900 SEMICONDUCTOR DRIVE SANTA CLARA, CA 95050 N OSCIN N/C OSCOUT VP VCC DO GND LD N/C FIN 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 R PWDN P FOUT BISW FC LE DATA N/C CLOCK LMX2315WG 20 - LEAD CERAMIC SOIC CONNECTION DIAGRAM TOP VIEW P000390A MIL/AEROSPACE OPERATIONS 2900 SEMICONDUCTOR DRIVE SANTA CLARA, CA 95050 N MNLMX2315-X REV 2A1 MICROCIRCUIT DATA SHEET Revision History Rev 0A0 1A1 ECN # Rel Date Originator Rose Malone Rose Malone Changes Initial Release of MDS: Update MDS: MNLMX2315-X, Rev. 0A0 to MNLMX2315-X, Rev. 1A1. Moved Reference to Controlling Document to Features Section. Added Power Dissipation and Junction Temperature reference to Absolute Section. Changed Electrical Conditions for VIH, VIL, IDO-Tri, IDO vs VDO, IDOsink vs IDOsource, VOH(OSCout), VOL(OSCout) and IOL. Added NOTE 4 to VIH, VIL, IOL, fIN and Pfin. Updated B/I graphic. Update MDS: MNLMX2315-X, Rev. 1A1 to MNLMX2315-X, Rev. 2A1. Deleted Vosc Electrical parameter, Corrected typo in parameter field for IIH from High Level Input Current (LE, PC, PWDN) to High Level Input Current (LE, FC, PWDN) and IIL from Low Level Input Current (LE, PC, PWDN) to Low Level Input Current (LE, FC, PWDN). Added Condition to fIN Parameter, NOTE 4 and NOTE 5. M0002486 03/16/99 M0003258 07/30/99 2A1 M0003448 07/30/99 Rose Malone 8 |
Price & Availability of NSC05576
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |