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Technical Data Sheet Features
* * * * * * * Enables Low-cost Networking Products
SSC P200 PL Network Interface Controller
4MHZ CS* VSSD XIN
1 2 3 4 5 6 7 8 9 10
20 19 18 17
VSSD TP0 VDDA SI C1 C2 SO VSSA RST* TS
EIA-600 (CEBus) Compatible Channel Access with Unacknowledged Services EIA-600 Physical Layer Transceiver Spread Spectrum CarrierTM Communication Technology SPI Host Processor Interface Single +5 Volt Power Supply Requirement 20 Pin SOIC Package
XOUT VDDD INT* SCLK SDO SDI
SSC P200
16 15 14 13 12 11
Introduction
The Intellon SSC P200 PL Network Interface Controller is a highly integrated spread spectrum communication transceiver and channel access interface for implementing low-cost networking products. The SSC P200 provides the Data Link Layer (DLL) control logic for EIA-600 channel access using unacknowledged services, a Spread Spectrum CarrierTM (SSC) transceiver, signal conditioning circuitry, and an SPI compatible host interface. A minimum of external circuitry is required to connect the SSC P200 to the AC power line, a twisted pair cable, or other communication medium. The SSC P200 is used with a host microcontroller to construct simple sensor and actuator devices for use in lighting control, process monitoring, access control, point-of-sale, telemetry and other systems requiring low-cost network capability. The inherent reliability of SSC signaling technology and incorporation of basic data link functionality combine to provide substantial improvement in network and communication performance over other low-cost communication methods. The SSC P200 is the ideal basic communications element for a wide variety of low-cost networking applications.
SSC P200 Node Block Diagram
AC Line
4 MHz RST* SDI 3 MHz
Clk Gen
Osc
12 MHz
Line Coupling
Host Micro
SDO SCLK CS* INT*
DLL Micro
Xcvr
ADC
Amp
SI
Input Filter Output Filter / TriState Switch
TS SO
DAC
Buf
AMP
Application I/O Host System SSC P200 PL Network Interface Controller Power Line Analog Functions
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Absolute Maximum Ratings (1)
Symbol
VDD VIN TSTG TL
Parameter
DC Supply Voltage Input Voltage at any Pin Storage Temperature Lead Temperature (Soldering, 10 seconds)
Value
-0.3 to 7.0 VSS-0.3 to VDD+0.3 -65 to +150 300
Unit
V V C C
Note: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages.
Recommended Operating Conditions
Symbol
VDD FOSC TA
Parameter
DC Supply Voltage Oscillator Frequency Operating Temperature Humidity
Min
4.5 -40
Typical
5.0 12 +/- 0.3% +25 non-condensing
Max
5.5 +85
Unit
V MHz C
Electrical Characteristics
Conditions: VDD = 4.5 to 5.5 V T= -40 to +85C Symbol
VOH VOL VIH VIL Hys IIL vSO IDD
Parameter
Minimum High-level Output Voltage Maximum Low-level Output Voltage (1) Minimum High-level Input Voltage Maximum Low-level Input Voltage Minimum Input Hysteresis Maximum Input Leakage Current SSC Signal Output Voltage (2) Total Power Supply Current
Min
2.4 2.0
Typical
Max
0.4 0.8
Units
V V V V mV A VP-P mA
350 +/-10 4 25
Notes: 1. IOL = 2 mA 2. ZL = 2K || 10 pF
SSC P200 Control Timing
Symbol
tRL tRESET
Parameter
RST* Pulse Width Power-on Reset to Host Interface Active
Min
150 10
Typical
Max
Unit
nsec msec
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SSC P200 Pin Assignments
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Mnemonic 4MHZ CS* VSSD XIN XOUT VDDD INT* SCLK SDO SDI TS RST* VSSA SO C2 C1 SI VDDA TP0 VSSD Name 4 MHz Clock Out Chip Select Digital Ground Crystal Input Crystal Output Digital Supply Interrupt SPI Data Clock SPI Data Out SPI Data In Tristate Reset Analog Ground Signal Output Capacitor 2 Capacitor 1 Signal Input Analog Supply Test Point 0 Digital Ground Description 4 MHz clock output available for host microcontroller. Digital input, active low. Enables serial peripheral interface. Digital ground reference. Connected to external crystal to excite the IC's internal oscillator and digital clock. Connected to external crystal to excite the IC's internal oscillator and digital clock. 5.0 VDC +/- 10% digital supply voltage with respect to VSSD. Digital output, active low. Attention request to host microcontroller. Serial peripheral interface clock input from host microcontroller. Data output to host microcontroller serial peripheral interface. SDO is tristate when CS* is false. Data input from host microcontroller serial peripheral interface. Active low digital output signal driven from the same internal signal that enables the output amplifier. Active low digital input. Analog ground reference. Analog signal output. Tristate enabled with internal TS signal. Connection for 680pF capacitor to ground. Connection for 680pF capacitor to ground. Analog signal input. 5.0 VDC +/- 10% analog supply voltage with respect to VSSA. Reserved pin for testing. Digital ground reference.
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SSC P200 Node Overview
The SSC P200 may be used in a wide variety of applications. A typical power line node application using the SSC P200 is illustrated in Figure 1. Resource intensive Data Link functions and Physical layer services of the protocol are provided by the SSC P200. Specific DLL services include transmission and reception of unacknowledged (UNACK) EIA-600 compatible packets, byte-to-symbol conversion for transmitted packets, symbol-to-byte conversion for received packets, transmit channel access based on packet priority and EIA-600 access rules, and CRC generation for transmitted packets and error checking of received packets. The Host Microcontroller generates and decodes device addresses, interprets commands and data for the User Application and performs end to end protocol functions. Output signal amplification and filtering, input signal filtering, and coupling of the node to the power line are performed using external components.
4 MHz RST* SDI 3 MHz
Clk Gen
Osc
12 MHz
Host Micro
SDO SCLK CS* INT*
DLL Micro
Xcvr
A/D
Amp
SI
Input Filter Line Coupling PreFilter SSC P111 AC Line
SPI Interface D/A Application I/O Host System SSC P200 PL Network Interface Controller Buf
TS SO
Power Line Analog Functions
Figure 1. SSC P200 Power Line Node Application
SSC P200 Host Interface
SSC P200 interface to the Host system is supported through a Serial Peripheral Interface (SPI) using five I/O lines. A hardware, active-low, Reset (RST*) signal is also supplied by the Host. A simple protocol is used to transfer commands and data between the host and SSC P200. These commands and data include packets to be transmitted, received packets, status and configuration information.
SSC P200 Power Line Interface
Analog data is transferred between the AC power line and the SSC P200 over the P200 Signal In (SI) and Signal Out (SO) pins. In transmit mode, SSC "chirps" from the SSC P200 SO pin are filtered by the Pre-filter to remove harmonic energy (distortion) from the transmit signal and then amplified by the SSC P111 Power Line Media Interface IC. The SSC P111 is a high-efficiency amplifier and tri-state switch specifically designed for use in power line network systems. The amplifier is powered down and its output set to a high impedance condition when the SSC P200 TS signal is logic low, isolating the amplifier from the receive circuitry and reducing node power consumption during receive operation. When the SSC P200 TS signal is logic high, the communication signal is routed to the 60 Hz power line through the Power Line Coupling circuit. In receive mode, the communication signal passes through the Power Line Coupling Circuit and is filtered by the bandpass Input Filter. The resulting signal is then applied to the SSC P200 SI pin for processing.
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P200 Host Interface Specification Introduction
This section describes the functionality of the SSC P200 from the host's perspective. The services provided allow a host processor to optimally implement a network application, relying on the P200 for real-time network processing. All SSC P200 system information is loaded by the host processor per the following description. All downloaded information is volatile and must be reloaded in the event of a power failure. Following verification of SSC P200 initialization (see Initialization Flow) system information (Layer_Config_Info) is written to the SSC P200 through a "write transaction" and the Layer_Mgmt_Write command (see Write Transaction Flow). The host may now transmit packets (Packet) using a "write transaction" and the Packet_Transmit command. Completion of the packet transmission and notification of the receipt of a packet are through an "attention sequence" (see Attention Sequence Flow) after which the host must determine the reason for the attention through a "read transaction" and the Interface_Read command (see Read Transaction Flow). Packets are retrieved through a "read transaction" and the Packet_Receive command. Details of the various data structures, commands and command protocol are indicated below.
Data Structures
Table 1. presents a map of the data structures accessible by the host. Subsequent sections describe the content of the structures. Table1. Data Structures Map Structure Name (full) Structure Name (abbr.)
Layer Configuration Information Interface Flags Node Control Flags Status Information DLL Link Access Control Data Link Receive Link Status Packet Format
Bytes
7 1 2 6 1 1 41
Layer_Config_Info Interface_Flags Node_Control Status_Info DLL_Access_Control DLL_Rc_Link_Status Packet
Layer Configuration Information (Layer_Config_Info)
Table 2. presents a map of the read-write Layer_Config_Info structure which determines: * * The mode of operation. The maximum number of unsuccessful channel accesses due to backoffs per transmit attempt (Max_Restarts). Table 2. Layer_Config_Info Use
Defines operating mode and Max_Restarts Reserved
Byte
0 1-6
Name
Mode_Control Reserved
Reset State
0x00 0x0000
Layer_Config_Info.Mode_Control
Bit 7 -0 6 MR3 0 5 MR2 0 4 MR1 0 3 MR0 0 2 -0 1 SL1 0 0 SL0 0
RESET: MC7
Reserved for future use and must be set to 0.
MC6-MC3 Max_Restarts (MR3-MR0) specifies the maximum restarts allowable due to backoffs before a transmit attempt failure is determined (a value of 120 is recommended for moderately to heavily active networks).
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SSC P200 PL Network Interface Controller MR3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 MC2 MC1-MC0 MR2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 MR1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 MR0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Max_Restarts 0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120
Reserved for future use and must be set to 0.
Service_Level (SL1-SL0) determines mode of operation and must be set to 0x11.
SL1 0 0 1 1 SL0 0 1 0 1
Service_Level Reserved Reserved Reserved P200 mode The P200 acts as a Medium Access device utilizing the EIA CEBus channel access protocol, transmit service, and packet format. The host is responsible for address recognition and may redefine the contents of the address fields within the header and the NPDU (see Packet Format (Packet)). Packet Receive Received packets are transferred to the host without address detection, which requires the host to determine the address status of the packet. The receipt of a new Receive_Header is posted via Interface_Flags.Rc_Except. After retrieving the header via the Read_Receive_Header command the host must verify that the receive service is UNACK before determining if the packet is to be accepted or ignored based on the destination addresses. The host must issue Node_Control.Rcv_Disposition prior to the receipt of the packet's CRC such that appropriate action at the end of the packet can be performed. If Node_Control.Rcv_Disposition is not issued in time, the packet will be ignored. If the packet has been accepted, Interface_Flags.Rc_Attn will be posted. The Receive_NPDU can be retrieved via the Read_Receive_Information (preferred) or Packet_Receive command. Packet Transmit The host establishes the addresses and NPDU for transmitted packets. Only UNACK service is allowed. Transmission with other services will be ignored with an Misc_Xmit transmit error posted.
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Interface Flags (Interface_Flags)
The read-only Interface_Flags register contains information relative to the state of the P200 including: * * * * The fact that a packet has been received and whether a receive exception exists. Whether a transmit has completed and whether a transmit exception exists. The presence of a physical layer failure or host interface error. The reset state of the device.
NOTE: All flags are cleared upon executing the Interface_Read command (see Table); therefore, it is the responsibility of the host to service all flags in Interface_Flags when read.
Interface_Flags
Bit 7 RA 0 6 TA 0 5 TEX 0 4 REX 0 3 PLF 0 2 IE 0 1 -0 0 RES 1
RESET: IF7
Rc_Attn (RA) indicates that a valid packet has been received.
0 1 No packet received. Packet received (Attention sequence generated).
IF6
Tr_Attn (TA) indicates that a pending packet transmission is complete.
0 1 No packet transmitted. Packet transmit completed (Attention sequence generated).
IF5 Tr_Except (TEX) indicates that the Preamble EOF of a transmission attempt has been successfully transmitted to the medium. 0 1 IF4 Preamble EOF not yet transmitted. Preamble EOF transmitted (Attention sequence generated).
Rc_Except (REX) indicates that a complete header has been received.
0 1 No header received. Header received (Attention sequence generated).
IF3 Physical_Layer_Failure (PLF) indicates an error was detected in the physical layer. DLL_Rc_Link_Status.Phy_Layer_Fail_Status may be read to determine cause for failure. 0 1 No physical layer exists. Physical failure occurred (Attention sequence generated).
IF2 Interface_Error (IE) indicates an SPI protocol error occurred on the last attempted host command sequence. 0 1 IF1 No SPI protocol error occurred. SPI protocol error detected.
Reserved for future use and will be read as 0.
IF0 IC_Reset (RES) indicates the P200 is in a reset condition. A Layer_Mgmt_Write command is required to initialize and activate. 0 1 P200 not reset (running). P200 reset (waiting for Layer_Mgmt_Write command).
Node Control Flags (Node_Control)
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SSC P200 PL Network Interface Controller The write-only Node_Control structure contains flags which control node operation including: * * * Specifying general and specific host busy situations. Aborting the transmission of a packet. Controlling the receipt of packets.
Node_Control.Flag_0
Bit 7 RD2 0 6 RD1 0 5 RD0 0 4 -0 3 HB 0 2 AT 0 1 ULB 0 0 -0
RESET:
F0-7 - F0-5 Rcv_Disposition (RD2-RD0) determines the response to a received header and therefore the subsequent disposition of the received packet.
F0-4 F0-3
Rcv_Disposition Ignore the packet. Receive packet and generate Interface_Flags.Rc_Attn at packet end. 0 1 0 Reserved 0 1 1 Reserved 1 0 0 Reserved 1 0 1 Reserved 1 1 0 Reserved 1 1 1 Reserved Reserved for future use and must be set to 0.
RD2 0 0 RD1 0 0 RD0 0 1
Host_Busy (HB) indicates host cannot process any attention requests at this time.
0 1 All attention requests generated. No attention requests generated.
F0-2 Abort_Transmission (AT) aborts current packet transmission (if not already completed). Abort occurs prior to channel access or after transmission completes (i.e. fragments will not be produced). 0 1 No abort Abort the current transmission.
Upper_Layer_Busy (ULB) indicates host cannot process received packets at this time. No F0-1 attention requests for received packets are generated (the first received packet is stored--subsequent received packets are refused/ignored). Other attention requests (including transmit complete) are generated normally. If an attention request is generated due to a non-"received packet" reason, but a packet has been received, it is the responsibility of the host to either process the received packet immediately or store the fact and process the received packet later. See description of Interface_Flags pertaining to processing all set flags.
0 1 F0-1-F0-0 All attention requests generated. No attention requests generated for received packets. Reserved for future use and must be set to 0.
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Status Information (Status_Info)
The read-only Status_Info structure as shown in Table 3 contains flags including: * * The status of the last packet's transmission. The P200 device type and version. Table 3. Status_Info Use Contains various flags regarding transmit completion and statistics counter overflow conditions. Reserved Reserved Reserved Reserved Contains device identifier and version control information.
Byte 0
Name Status_Flags
Reset State 0x00
1 2 3 4 5
Reserved Reserved Reserved Reserved Device_ID
0x00 0x00 0x00 0x00 Device Based
Status_Info.Status_Flags
Bit 7 -0 6 -0 5 -0 4 -0 3 TS3 0 2 TS2 0 1 TS1 0 0 TS0 0
RESET: SF7-SF4 SF3-SF0
Reserved for future use and will be read as 0.
Tx_Status_Code (TS3-TS0) indicates the last packet's transmit completion status.
TS3 0 0 0 0 0 0 0 0 1 TS2 0 0 0 0 1 1 1 1 0 TS1 0 0 1 1 0 0 1 1 0 TS0 0 1 0 1 0 1 0 1 0
1 1 1 1 1 1 1
0 0 0 1 1 1 1
0 1 1 0 0 1 1
1 0 1 0 1 0 1
Tx_Status_Code Success: packet transmit succeeded Reserved Reserved Reserved Excessive_Collisions: exceeded Max_Restarts attempts Reserved Reserved Reserved Misc_Xmit: detected unexpected packet termination or attempted to transmit ACK, ADRACK or ADRUNACK packet. Physical_Failure: transceiver or medium failure detected. Transmit_Aborted: host aborted transmission via Node_Control.Flag_0.Abort_Transmission. Max_Retrans_Exceeded: could not complete transmission within Max_Retrans time. Reserved Reserved Reserved Reserved
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Status_Info. Device_ID
Bit 7 DT3 0 6 DT2 0 5 DT1 1 4 DT0 1 3 DV3 x 2 DV2 x 1 DV1 x 0 DV0 x
RESET: DID7-DID4
Device_Type (DT3-DT0) indicates the network interface controller type.
DT3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 DT2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 DT1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 DT0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Device_Type CEThinx P400 R400 P200 P300 Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
DID3-DID0
Device_Version (DV3-DV0) indicates the device firmware version type.
DV3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 DV2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 DV1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 DV0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Device_Version 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
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Data Link Access Control (DLL_Access_Control)
The write-only DLL_Access_Control register specifies the time between channel accesses:
DLL_Access_Control
Bit 7 -0 6 -0 5 CAP1 0 4 CAP0 0 3 -0 2 -0 1 -0 0 -0
RESET:
DAC7-DAC6 Reserved for future use and must be set to 0. DAC5-DAC4 Ch_Access_Period (CAP1-CAP0) specifies the minimum required time in milliseconds between attempted transmit channel accesses and is used to limit the duty cycle of packet transmissions based on the device's power supply design. CAP1 0 0 1 1 CAP0 0 1 0 1
Ch_Access_Period 0 ms 100 ms 200 ms 300 ms
DAC3-DAC0 Reserved for future use and must be set to 0.
Data Link Receive Link Status (DLL_Rc_Link_Status)
The read-only DLL_Rc_Link_Status register indicates the type of physical layer failure detected:
DLL_Rc_Link_Status
Bit 7 -0 6 -0 5 PLS2 0 4 PLS1 0 3 PLS0 0 2 -0 1 -0 0 -0
RESET:
DLS7-DLS6 Reserved for future use and will be set to 0. DLS7 - DLS5 Phy_Layer_Fail_Status (PLS2-PLS0) If Interface_Flags.Physical_Layer_Failure is TRUE, indicates cause of physical layer failure. PLS2 0 0 0 0 1 1 1 1 PLS1 0 0 1 1 0 0 1 1 PLS0 0 1 0 1 0 1 0 1
Phy_Layer_Fail_Status Unexpected end-of-packet was detected. Transceiver interface error. Reserved Reserved Reserved Reserved Reserved Reserved
DLS2-DLS0 Reserved for future use and will be read as 0.
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Packet Format (Packet)
The format of the Packet data structure conforms to EIA-600 and is included as a convenience and to aid in understanding the host command protocol (see Command Protocol). A Packet (Table 4) is comprised of a header ( Tables 5 and 6) containing the data link control field and addressing fields, and the information to be transmitted, called a Network Layer Protocol Data Unit (NPDU). Table 4. Packet Field Transmit_Header OR Receive_Header Transmit_NPDU OR Receive_NPDU Table 5. Transmit_Header Comments Transmit DLL_Control_Field Transmit address fields--see DLL_Control_Field for use.
Bytes 0-8 9-40
Bytes 0 1-2 3-4 5-6 7-8
Field Name Tr_Control_Field Tr_Address_Field_0 Tr_Address_Field_1 Tr_Address_Field_2 Tr_Address_Field_3
Bytes 0 1-2 3-4 5-6 7-8
Field Name Rc_Control_Field Rc_Address_Field_0 Rc_Address_Field_1 Rc_Address_Field_2 Rc_Address_Field_3
Table 6. Receive_Header Comments Receive DLL_Control_Field Receive address fields--see DLL_Control_Field for use.
DLL_Control_Field
Bit 7 -0 Reserved 6 CL 0 5 -0 4 PR1 0 3 PR0 0 2 PT2 0 1 PT1 0 0 PT0 0
RESET: CF7 CF6
Service_Class (CL) indicates the service class bit value of the current packet.
0 1 Basic service (normal CEBus addressing) Extended service NOTE: Service_Class determines the network usage of the Tr_Address_Field_n and Rc_Address_Field_n in Transmit_Header and Receive_Header, respectively. Transmit/Receive Address Field Address_Field_0 Address_Field_1
Address_Field_2 Address_Field_3
Service_Class = Basic CEBus destination address CEBus destination house code CEBus source address CEBus source house code
Service_Class = Extended Host determined
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CF5 CF4-CF3 packet.
Reserved
Packet_Priority (PR1-PR0) indicates the transmit priority field value of the current
PR1 0 0 1 1 PR0 0 1 0 1
Priority High Standard Deferred Reserved
Packet_Type (PT2-PT0) indicates the packet type or transmit level field value of the CF2-CF0 1 current packet.
PT2 0 0 0 0 1 1 1 1 PT1 0 0 1 1 0 0 1 1 PT0 0 1 0 1 0 1 0 1
Packet_Type Reserved Reserved UNACK Reserved Reserved Reserved Reserved Reserved
Field Name Tr_NPDU
Bytes 0-31
Table 7. Transmit_NPDU Comments NPDU (Data Link Information Field) is stored for transmission in the order received from the host.
Field Name Rc_NPDU
Bytes 0-31
Table 8. Receive_NPDU Comments NPDU (Data Link Information Field) is stored in the order received from the medium.
1
EIA-600 allows other transmit levels (ACK, ADRACK and ADRUNACK) which are supported by Intellon's P300 and P400 products.
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Host Commands Command Descriptions
The host interface supports the commands given in Table 9 below. Table 9. Commands Command Name Force_Interface_Error Reset
Cmd Value 0x00 0x01
Cmd Code FIE RST
Use
0x02 0x03 0x04 0x05 0x06 0x07 0x08
LR LW IR CW SR -PR
Layer_Mgmt_Read Layer_Mgmt_Write Interface_Read Control_Write Status_Read Reserved Packet_Receive
Forces interface error condition. Disables all functions and I/O except host interface. (Reset signal line is more reliable as it does not require that host interface be operational.) A Layer_Mgmt_Write command is necessary to initiate any activity subsequent to a reset. Read Layer_Config_Info Write Layer_Config_Info Read Interface_Flags. All flags are cleared following the execution of this command. Write Node_Control Read Status_Info Reserved Read received Packet. Accesses buffered data link header (Control field, Destination Address and Source Address) and NPDU field.
0x09
PT
Packet_Transmit
Packet_Read can always be used in response to Interface_Flags.Rc_Attn. However, host interface traffic can be reduced if, after reading a FALSE DLL_Rc_Link_Status.Rc_Addr_DIff, Read_Receive_Information is used to retrieve the Receive_NPDU (it is assumed that the Receive_Header has been retrieved previously via Packet_Receive or Read_Receive_Header). Write Packet Packet_Transmit can always be used to transmit Packet. If multiple Packets are being sent to the same remote device, Transmit_Header can be set using Packet_Transmit or Write_Transmit_Header, and the Transmit_NPDU can be sent using Write_Transmit_Invoke.
Issuing the Packet_Transmit command when a previous transmit is still in progress (Interface_Flags.Tr_Attn is FALSE and Interface_Flags.Tr_Except is TRUE) will result in the command being ignored and posting an Interface_Flags.Interface_Error. Read buffered Receive_NPDU. (See Packet_Receive command)
0x0A
RRI
Read_Receive_Information
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SSC P200 PL Network Interface Controller Cmd Value 0x0B Cmd Code WTI Command Name Write_Transmit_Invoke Use Write Transmit_NPDU. (See Packet_Transmit command) Issuing the Write_Transmit_Invoke command when a previous transmit is still in progress (Interface_Flags.Tr_Attn is FALSE and Interface_Flags.Tr_Except is TRUE) will result in the command being ignored and posting an Interface_Flags.Interface_Error. Read Receive_Header. This command accesses the unbuffered header. (See Packet_Receive command) Write Transmit_Header for subsequent transmit packets. (See Packet_Transmit command) Issuing the Write_Transmit_Header command when a previous transmit is still in progress (Interface_Flags.Tr_Attn is FALSE and Interface_Flags.Tr_Except is TRUE) will result in the command being ignored and posting an Interface_Flags.Interface_Error. Completion of the Write_Transmit_Header command is posted via Interface_Flags.Tr_Attn and Interface_Flags.Tr_Except. Reserved Write DLL_Access_Control Reserved Read DLL_Rc_Link_Status Reserved
0x0C
RRH
Read_Receive_Header
0x0D
WTH
Write_Transmit_Header
0x0E0x45 0x46 0x470x83 0x84 0x850xFF
--
Reserved
WRS-46 Write_Register_46 -Reserved RRS-4 Read_Register_4 -Reserved
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Command Protocol
Commands and data structures are conveyed between the host and the P200 via the Serial Peripheral Interface and a protocol sequence described in Table 10 below. Cmd Code FIE RST LR LW Sequence From Host [FIE] [RST][Length] [LR] [LW][Length] [Layer_Config_Info] Table 10. Command Protocol Sequence From P200 [Length] -[Length] [Layer_Config_Info] -Comments
IR CW SR PR
[IR] [CW][Length] [Node_Control] [SR] [PR]
[Length] [Interface_Flags] -[Length][Status_Info] [Length] [Packet]
PT
[PT][Length] [Packet]
--
Length = 0 Length = 0 All bytes in Layer_Config_Info are transferred (Length = 7). Bytes 0..(Length-1) in Layer_Config_Info are transferred starting at Layer_Config_Info.Mode_Control. Interface_Flags is transferred (Length = 1). Bytes 0..(Length-1) in Node_Control are transferred. All bytes in Status_Info are transferred (Length = 6). All received bytes in Packet are transferred preceded by Length which is the number of bytes following. (Length is determined by received packet) All bytes in Packet are transferred preceded by Length which is the number of bytes following. NOTE: If Length=0, the previously transmitted packet is retransmitted. All received bytes in Receive_NPDU are transferred preceded by Length which is the number of bytes following. (Length is determined by received packet) All received bytes in Transmit_NPDU are transferred preceded by Length which is the number of bytes following. NOTE: If Length=0, the previously transmitted packet is retransmitted. All bytes in Receive_Header are transferred (Length = 9). All bytes in Transmit_Header are transferred (Length = 9) DLL_Access_Control is transferred (Length = 1). DLL_Rc_Link_Status is transferred (Length = 1).
RRI
[RRI]
[Length] [Receive_NPDU]
WTI
[WTI][Length] [Transmit_NPDU]
--
RRH WTH WRS46 RRS-4
[RRH] [WTH][Length] [Transmit_Header] [WRS-46][Length] [DLL_Access_Control] [RRS-4]
[Length] [Receive_Header] --
[Length] [DLL_Rc_Link_Status]
Serial Peripheral Interface
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Signal Description
The Serial Peripheral Interface (SPI) between the Host and P200 uses 5 unidirectional I/O lines. An additional interface line is Reset. See Table 11. Table 11. SPI Mode Pin Descriptions Direction Use Output Active low. Used to indicate an attention request (packet received or transmit packet completed) or "ready for SPI byte transfer." Input Active low. Must be asserted during a read or write command operation ("transaction"). Input Used to synchronize data transfer. Input Serial data input (normally connected to host's SDO signal). Data is shifted MSB first. Output Serial data output (normally connected to host's SDI signal). Data is shifted MSB first. Input Reset signal line. The host may assert this signal low (open collector drive) to provide a hardware reset.
Mnemonic INT*
Name Interrupt
CS* SCLK SDI SDO RST*
Chip Select Shift Clock Serial Data In Serial Data Out Reset
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Host Interactions Description
Host interactions are of the following four basic types: * * * * Initialization Write Transaction Read Transaction Attention Sequence
Initialization Flow
Upon power-up, or following a Reset command, the P200 performs an internal diagnostic and setup sequence. Commands cannot be sent to the device until this sequence is complete. The following sequence of commands in Figure 2 may be used to check for the ready condition:
System Power-On
Wait t RESETfor P200 to reset Transaction starts Assert CS*
Transfer IR Command to P200
Transfer Interface_Flags from P200
Yes
INT* Asserted within t XFER of start of SPI transfer?
No INT* Asserted within t XFER of start of SPI transfer? Transaction ends No Deassert CS*
Yes Transaction ends Deassert CS*
Flags (RESET) = 1?
No
ERROR
Yes Ready Proceed to DLL Initialization
Figure 2. Initialization Flow Diagram
At this point, the host should set up the Layer_Config_Info, using the Write Transaction sequence described in the next section.
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Version 1.1
SSC P200 PL Network Interface Controller
Write Transaction Flow
The following steps in Figure 3 should be taken to issue write commands and data and control to the P200:
Transaction starts Assert CS*
Transfer Write Command to P200
INT* Asserted within t XFER of start of SPI transfer?
Transaction ends Yes More Data to Transfer? No Deassert CS*
Yes
No
Transfer Next Byte to P200
Write Complete
Yes
Transaction ends INT* Asserted within t XFER of start of SPI transfer?
Deassert CS*
No
Error
Figure 3. Write Transaction Flow Diagram
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Version 1.1
SSC P200 PL Network Interface Controller
Read Transaction Flow
The following steps in Figure 4 should be taken to issue read commands and read data and status from the P200:
Transaction starts Assert CS*
Transfer Read Command to P200
INT* Asserted within t XFER of start of SPI transfer?
Transaction ends Yes More Data to Transfer? No Deassert CS*
Yes
No
Transfer Next Byte from P200
Read Complete
Yes
Transaction ends INT* Asserted within t XFER of start of SPI transfer?
Deassert CS*
No
Error
Figure 4. Read Transaction Flow Diagram
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Version 1.1
SSC P200 PL Network Interface Controller
Attention Sequence Flow
An Attention request, as shown in Figure 5, is an unsolicited assertion of INT* and is used to inform the host that data or status is available:
Attention Sequence Starts with Assertion of INT*
Transaction starts Assert CS*
Transfer IR Command to P200
Transfer Interface_Flags from P200
Yes
INT* Asserted within t XFER of start of SPI transfer?
No INT* Asserted within t XFER of start of SPI transfer? Transaction ends No Deassert CS*
Yes Transaction ends Deassert CS*
ERROR
Ready
Process Flags with Subsequent Read/Write Transactions
Figure 5. Attention Sequence Flow Diagram
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SSC P200 PL Network Interface Controller
Transaction Timing Write Transaction Figures:
CS* tXFER
INT* tXFER SCLK tXFER
SDI
WRITE CMD
WRITE BYTE #1
WRITE BYTE #n
Figure 6. Write Transaction Timing Diagram
CS* tXREF INT* tCC tCH tR tCL tF tCSon tCSoff
SCLK tDC SDI b 7 b 6 tCDH b 5 b 4 b 3 b 2 b 1 b 0 b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0
WRITE COMMAND
WRITE BYTE #1
Figure 7. Write Byte #1 Timing Diagram
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SSC P200 PL Network Interface Controller
CS* tXREF tXFER tCSS INT* tCSoff SCLK tDC SDI b 7 b 6 tCDH b 5 b 4 b 3 b 2 b 1 b 0 tCH tR tCL tF tCSon tSCH
WRITE BYTE #n
Figure 8. Write Byte #n Timing Diagram
Read Transaction Figures:
CS* tXFER
INT* tXFER SCLK tXFER
SDI
READ CMD
SDO
READ BYTE #1
READ BYTE #n
Figure 9. Read Transaction Timing Diagram
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SSC P200 PL Network Interface Controller
CS* tXREF INT* tCC tCH tR tCL tF tCSon tCSoff
SCLK tDC SDI b 7 b 6 tCDH b 5 b 4 b 3 b 2 b 1 tCDNZ b 0 tCDD b7 b6 b5 b4 b3 b2 tCDHO b1 b0
READ COMMAND
SDO
READ BYTE #1
Figure 10. Read Byte #1 Timing Diagram
CS* tXREF tXFER tCSS INT* tCSoff SCLK tCH tR tCL tF tCSon tSCH
SDI tCDD SDO b7 b6 b5 b4 b3 b2 tCDHO tDSZ b1 b0
READ BYTE #n
Figure 11. Read Byte #n Timing Diagram
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SSC P200 PL Network Interface Controller
CS* tCSS INT* tSAtt ATTENTION tCC tCH tR tCL tF tCSon tCSoff tCSoff
SCLK tDC SDI b 7 b 6 tCDH b 5 b 4 b 3 b 2 b 1 tCDNZ b 0 tCDD b7 b6 b5
READ COMMAND
SDO
READ BYTE #1
Figure 12. Attention/Read Byte #1 Timing Diagram
SPI Timing Parameters and Characteristics
Table 12. Timing Characteristics (-40C to 85C; VCC=5V) Symbol Parameter Min Max Units Notes tRESET RESET to READY delay 10 msec tXFER Control Transfer Delay (1 msec typ.) 10 msec tSCH CS* Inactive Time 0 2 sec tCC CS* to SCLK Setup 50 nsec 2 tCL SCLK Low Time 250 nsec 2 tCH SCLK High Time 250 nsec 2 tR, tF SCLK Rise and Fall 200 nsec tCSon SCLK to INT* Setup 500 1,2 sec tCSoff INT* to SCLK Delay 250 nsec 1,2 tDC SDI to SCLK Setup 50 nsec 1, 2 tCDH SCLK to SDI Hold 70 nsec 1, 2 tSAtt INT* Attention Delay 2 sec tCSS CS* to INT* Delay 100 nsec 1, 2 1, 2, 3 tCDNZ SCLK to SDO Delay 500 sec tCDD SCLK to SDO Delay 100 nsec 1, 2, 3 tCDHO SCLK to SDO Hold 200 nsec 1, 2 1, 2 tDSZ INT* to SDO High Z Setup 500 sec NOTES: 1. Measured at VIH=2.0V or VIL=0.8V and 10msec rise maximum rise and fall time. 2. Measured with 50 pF load. 3. Measured at VOH=2.4V or VOL=0.4V.Modes
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SSC P200 PL Network Interface Controller
SSC P200 Mechanical Specifications
Figure 13. 20-Pin SOIC Package Outline
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Version 1.1
SSC P200 PL Network Interface Controller Ordering Information SSC P200 PL Network Interface Controller
5100 West Silver Springs Boulevard Ocala, Florida 34482 Phone: (352) 237-7416 Fax: (352) 237-7616 Internet http://www.intellon.com ftp://ftp.intellon.com
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