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74AC16623 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
SCAS172 - D3680, JANUARY 1991 - REVISED APRIL 1993
* * * * * *
Member of the Texas Instruments Widebus TM Family Packaged in Plastic 300-mil Shrink Small-Outline Package Using 25-mil Center-to-Center Pin Spacings Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise EPICTM (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125C
DL PACKAGE (TOP VIEW)
description
The 74AC16623 is a 16-bit transceiver designed for asynchronous communication between data buses. The control function implementation allows for maximum flexibility in timing. This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic level at the output-enable (OEBA and OEAB) inputs. The output-enable inputs can be used to disable the device so that the buses are effectively isolated.
1OEAB 1B1 1B2 GND 1B3 1B4 VCC 1B5 1B6 GND 1B7 1B8 2B1 2B2 GND 2B3 2B4 VCC 2B5 2B6 GND 2B7 2B8 2OEAB
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
1OEBA 1A1 1A2 GND 1A3 1A4 VCC 1A5 1A6 GND 1A7 1A8 2A1 2A2 GND 2A3 2A4 VCC 2A5 2A6 GND 2A7 2A8 2OEBA
The dual-enable configuration gives the bus transceiver the capability to store data by simultaneous enabling of OEBA and OEAB. Each output reinforces its input in this transceiver configuration. Thus, when both control inputs are enabled and all other data sources to the two sets of bus lines are at high impedance, the bus lines will remain at their last states. The 74AC16623 is packaged in TI's shrink small-outline package (DL), which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area. The 74AC16623 is characterized for operation from - 40C to 85C.
FUNCTION TABLE (each 8-bit section) INPUTS OEBA L H H L OEAB L H L H OPERATION B data to A bus A data to B bus Isolation B data to A bus, A data to B bus
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright (c) 1993, Texas Instruments Incorporated
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* DALLAS, TEXAS 75265
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74AC16623 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
SCAS172 - D3680, JANUARY 1991 - REVISED APRIL 1993
logic symbol
1OEBA 1OEAB 2OEBA 2OEAB 1A1 48 1 25 24 47 EN1 EN2 EN3 EN4 1 1 1 1A2 1A3 1A4 1A5 1A6 1A7 1A8 2A1 46 44 43 41 40 38 37 36 3 1 1 2A2 2A3 2A4 2A5 2A6 2A7 2A8 35 33 32 30 29 27 26 4 14 16 17 19 20 22 23 2B2 2B3 2B4 2B5 2B6 2B7 2B8 2 3 5 6 8 9 11 12 13 1B2 1B3 1B4 1B5 1B6 1B7 1B8 2B1 2 1B1
logic diagram (positive logic)
1OEBA 1OEAB 1A1 48 1 47
2
1B1
To Seven Other Channels
2OEBA 2OEAB 2A1
25 24 36
13
2B1
To Seven Other Channels
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.5 V to VCC + 0.5 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400 mA Maximum power package dissipation at TA = 55C (in still air) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.85 W Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65C to 150C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
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POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
74AC16623 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
SCAS172 - D3680, JANUARY 1991 - REVISED APRIL 1993
recommended operating conditions (see Note 2)
MIN VCC VIH Supply voltage High-level input voltage VCC = 3 V VCC = 4.5 V VCC = 5.5 V VCC = 3 V VIL VI VO IOH Low-level input voltage Input voltage Output voltage High-level output current VCC = 3 V VCC = 4.5 V VCC = 5.5 V VCC = 3 V IOL t /v Low-level output current Input transition rise or fall rate VCC = 4.5 V VCC = 5.5 V 0 - 40 VCC = 4.5 V VCC = 5.5 V 0 0 3 2.1 3.15 3.85 0.9 1.35 1.65 VCC VCC -4 - 24 - 24 12 24 24 10 85 ns/ V C mA mA V V V V NOM 5 MAX 5.5 UNIT V
TA Operating free-air temperature NOTE 2: Unused or floating pins (input or I/O) must be held high or low.
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS VCC 3V IOH = - 50 A VOH IOH = - 4 mA IOL = - 24 mA A IOH = - 75 mA IOL = 50 A VOL IOL = 12 mA IOL = 24 mA IOL = 75 mA II IOZ ICC Ci Control inputs A or B ports VI = VCC or GND VO = VCC or GND VI = VCC or GND, VI = VCC or GND IO = 0 4.5 V 5.5 V 3V 4.5 V 5.5 V 5.5 V 3V 4.5 V 5.5 V 3V 4.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5V 4.5 0.1 0.5 8 0.1 0.1 0.1 0.36 0.36 0.36 TA = 25C MIN 2.9 4.4 5.4 2.58 3.94 4.94 TYP MAX MIN 2.9 4.4 5.4 2.48 3.8 4.8 3.85 0.1 0.1 0.1 0.44 0.44 0.44 1.65 1 5 80 A A A pF pF V V MAX UNIT
Control inputs
Cio A or B ports VO = VCC or GND 5V 16 Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms. For I/O ports, the parameter IOZ includes the input leakage current.
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
3-3
74AC16623 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
SCAS172 - D3680, JANUARY 1991 - REVISED APRIL 1993
switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V 0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ tPLZ FROM (INPUT) A or B TO (OUTPUT) B or A A A B B MIN 2.7 3.1 2.7 3.5 4.8 4.1 2.8 3.8 4.7 4.3 TA = 25C TYP MAX 8.1 9.3 8.3 11.8 7.7 7.5 8.1 10.7 7.5 7.3 10 11.4 10.3 14.2 9.3 9.2 9.9 14.1 9.1 8.9 MIN 2.7 3.1 2.7 3.5 4.8 4.1 2.8 3.8 4.7 4.3 MAX 11.2 12.5 11.5 15.6 9.9 9.8 11.1 15.1 9.5 9.3 UNIT ns ns ns ns ns
OEBA OEBA OEAB OEAB
switching characteristics over recommended operating free-air temperature range, VCC = 5 V 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ tPLZ FROM (INPUT) A or B TO (OUTPUT) B or A A A B B MIN 2.3 2.6 2.1 2.8 4.7 4 2.3 3 4.5 4 TA = 25C TYP MAX 5.1 6 5.3 6.9 6.9 6.3 5.2 6.7 6.9 6.2 6.9 7.8 6.8 8.5 8.4 7.7 6.7 8.4 8.4 7.6 MIN 2.3 2.6 2.1 2.8 4.7 4 2.3 3 4.5 4 MAX 7.7 8.6 7.6 9.4 8.9 8.2 7.5 9.3 8.9 7.9 UNIT ns ns ns ns ns
OEBA OEBA OEAB OEAB
operating characteristics, VCC = 5 V, TA = 25C
PARAMETER Cpd d Power dissipation capacitance per transceiver Outputs enabled Outputs disabled TEST CONDITIONS CL = 50 pF pF, f = 1 MHz TYP 47 8 UNIT pF
3-4
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
74AC16623 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
SCAS172 - D3680, JANUARY 1991 - REVISED APRIL 1993
PARAMETER MEASUREMENT INFORMATION
2 x VCC From Output Under Test CL = 50 pF (see Note A) 500 S1 Open GND 500 TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH S1 Open 2 x VCC GND
LOAD CIRCUIT
Output Control (low-level enabling) VCC Output Waveform 1 S1 at 2 x VCC (see Note C) Output Waveform 2 S1 at GND (see Note C)
VCC 50% tPZL tPLZ 50% VCC tPHZ 80% VCC VOH 20% VCC 50% 0V
Input (see Note B) tPLH
50%
50% 0V tPHL VOH 50% VCC 50% VCC VOL
[ VCC
VOL
tPZH
Output
50% VCC
[0V
VOLTAGE WAVEFORMS
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr = 3 ns, tf = 3 ns. C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
3-5
74AC16623 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
SCAS172 - D3680, JANUARY 1991 - REVISED APRIL 1993
3-6
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, warranty or endorsement thereof.
Copyright (c) 1998, Texas Instruments Incorporated

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