View SCAS202_999732.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

74AC11593 8-BIT BINARY COUNTER WITH 3-STATE I/O INPUT REGISTERS
SCAS202 - MARCH 1992 - REVISED APRIL 1993
* * * * * * *
Parallel 3-State I/O: Register Inputs/ Counter Outputs Counter Has Direct Overriding Load and Clear Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPICt (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125C Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs
DW OR NT PACKAGE (TOP VIEW)
A/QA B/QB C/QC D/QD GND GND GND GND E/QE F/QF G/QG H/QH
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
CCK CCLR CCKEN CCKEN CLOAD VCC VCC OE OE RCK RCK RCO
description
The 74AC11953 consists of a parallel input, an 8-bit storage register feeding an 8-bit counter, and a 3-state I/O which provides parallel count outputs. Both the register and the counter have individual positive-edge triggered clocks. The function tables show the operation of the counter clock-enable (CCKEN, CCKEN) and output-enable (OE, OE) inputs. A register clock-enable (RCK) input is also provided. The counter (RCO) input has direct load and clear functions. A low-going RCO pulse will be obtained when the counter reaches the hex word FF. Expansion is easily accomplished for two stages by connecting RCO of the first stage to CCKEN of the second stage. Cascading for larger count chains can be accomplished by connecting RCO of each stage to CCK of the following stage. The 74AC11593 is characterized for operation from - 40C to 85C. Function Tables
COUNTER CLOCK ENABLE INPUTS CCKEN L L H H CCKEN L H L H OUTPUTS A/QA THRU H/QH Enable Disable Enable Enable OE L L H H OUTPUT ENABLE INPUTS OE L H L H OUTPUTS A/QA THRU H/QH Input mode Input mode Output mode Input mode
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright (c) 1993, Texas Instruments Incorporated
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
2-1
74AC11593 8-BIT BINARY COUNTER WITH 3-STATE I/O INPUT REGISTERS
SCAS202 - MARCH 1992 - REVISED APRIL 1993
logic symbol
OE OE CCLR CCKEN CCKEN CCK CLOAD RCK RCK A/QA B/QB C/QC D/QD E/QE F/QF G/QQ H/QH 17 16 23 22 21 24 20 14 15 1 4+ C3 G1 1C2 2D 5, 6 CT = 0 >1 G4 CT = 255 13 & EN6 CTR8
RCO
3D
Z5
2 3 4 9 10 11 12
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
2-2
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
74AC11593 8-BIT BINARY COUNTER WITH 3-STATE I/O INPUT REGISTERS
SCAS202 - MARCH 1992 - REVISED APRIL 1993
logic diagram (positive logic)
OE OE CCLR CCKEN CCKEN CCK CLOAD RCK RCK A/QA 17 16 23 22 21 24 20 14 15 1 1 G2 2 1D C1 S T R 13 RCO
B/QB
2
1D C1
S T R
C/QC
3
1D C1
S T R
D/QD
4
1D C1
S T R
E/QE
9
1D C1
S T R
F/QF
10
1D C1
S T R
G/QG
11
1D C1
S T R
H/QH
12
1D C1
S T R
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
2-3
74AC11593 8-BIT BINARY COUNTER WITH 3-STATE I/O INPUT REGISTERS
SCAS202 - MARCH 1992 - REVISED APRIL 1993
typical operating sequence
OE
OE
CCLR
CLOAD
CCK
CCKEN
CCKEN
RCK
RCK Output Hex FE
Output Hex A/QA thru H/QH 00 Input Hex FC
Output Hex FC
Output Hex FD
Output Hex FF
Output Hex 00
RCO
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.5 V to VCC + 0.5 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225 mA Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65C to 150C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2-4
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
74AC11593 8-BIT BINARY COUNTER WITH 3-STATE I/O INPUT REGISTERS
SCAS202 - MARCH 1992 - REVISED APRIL 1993
recommended operating conditions (see Note 2)
MIN VCC VIH Supply voltage High-level input voltage VCC = 3 V VCC = 4.5 V VCC = 5.5 V VCC = 3 V VIL VI VO IOH Low-level input voltage Input voltage Output voltage High-level output current VCC = 3 V VCC = 4.5 V VCC = 5.5 V VCC = 3 V IOL Low-level output current Input transition rise or fall rate Operating free-air temperature VCC = 4.5 V VCC = 5.5 V 0 - 40 VCC = 4.5 V VCC = 5.5 V 0 0 3 2.1 3.15 3.85 0.9 1.35 1.65 VCC VCC -4 - 24 - 24 12 24 24 10 85 ns / V C mA mA V V V V NOM 5 MAX 5.5 UNIT V
Dt/Dv
TA
NOTE 2: Unused or floating inputs must be held high or low.
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS VCC 3V IOH = - 50 mA VOH IOH = - 4 mA IOH = - 24 mA IOH = - 75 mA{ IOL = 50 mA VOL IOL = 12 mA IOL = 24 mA IOL = 75 mA{ VI = VCC or GND VO = VCC or GND VI = VCC or GND, IO = 0 4.5 V 5.5 V 3V 4.5 V 5.5 V 5.5 V 3V 4.5 V 5.5 V 3V 4.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 0.1 0.5 8 0.1 0.1 0.1 0.36 0.36 0.36 TA = 25C MIN TYP MAX 2.9 4.4 5.4 2.58 3.94 4.94 MIN 2.9 4.4 5.4 2.48 3.8 4.8 3.85 0.1 0.1 0.1 0.44 0.44 0.44 1.65 1 5 80 V V MAX UNIT
II IOZ ICC Ci
mA mA mA
pF
VI = VCC or GND 5V 4.5 Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
2-5
74AC11593 8-BIT BINARY COUNTER WITH 3-STATE I/O INPUT REGISTERS
SCAS202 - MARCH 1992 - REVISED APRIL 1993
timing requirements over recommended operating free-air temperature range, VCC = 3.3 V 0.3 V (unless otherwise noted) (see Figure 1)
TA = 25C MIN MAX fclock Clock frequency, CCK or RCK CCK high or low RCK high or low tw Pulse duration RCK high or low CCLR low CLOAD low CCKEN low before CCK CCKEN high before CCK tsu Setup time CCLR high before CCK CLOAD high before CCK RCK before CLOAD{ Data A thru H before RCK th Hold time Data A thru H after RCK All others 6 6 4.5 7.5 6.1 5.2 6.4 1.7 8.2 11.1 2.3 0.5 0.2 40 6 6 4.5 7.5 6.1 5.2 6.4 1.7 8.2 11.1 2.3 0.5 0.2 ns ns ns MIN MAX 40 UNIT MHz
timing requirements over recommended operating free-air temperature range, VCC = 5 V 0.5 V (unless otherwise noted) (see Figure 1)
TA = 25C MIN MAX fclock Clock frequency, CCK or RCK CCK high or low RCK high or low tw Pulse duration RCK high or low CCLR low CLOAD low CCKEN low before CCK CCKEN high before CCK tsu Setup time CCLR high before CCK CLOAD high before CCK RCK before CLOAD{ Data A thru H before RCK th Hold time Data A thru H after RCK All others 5 5 4.5 5 4.7 3.1 4.3 1.1 5.4 7.8 2 1.1 0.8 70 5 5 4.5 5 4.7 3.1 4.3 1.1 5.4 7.8 2 1.1 0.8 ns ns ns MIN MAX 70 UNIT MHz
This time insures the data saved by RCK will also be loaded into the counter.
2-6
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
74AC11593 8-BIT BINARY COUNTER WITH 3-STATE I/O INPUT REGISTERS
SCAS202 - MARCH 1992 - REVISED APRIL 1993
switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V 0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER fmax tPLH tPHL tPLH tPHL tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ tPLH tPHL tPLH tPHL tPLH tPLH tPHL FROM (INPUT) TO (OUTPUT) MIN 40 CCK Q Q Q Q Q Q Q 6.8 6.4 6.7 3.9 5.4 7.3 8 6.9 7.8 6.4 6.6 5.7 5.9 5.3 RCO RCO RCO RCO 7.1 5.9 CLOAD CCLR RCK 10.1 5.6 8.6 10.3 14.4 14.1 17.3 18.9 13 15.7 17.7 15.2 17.3 10.3 10.8 9.6 10.2 12 15.4 12.4 19.6 12.3 17.3 20.3 19.3 18.8 23.6 29.1 17.6 20.8 23.2 20.2 22.7 13.8 14.1 12.8 13.4 16 20.3 16.5 25.5 16.6 22.2 26.2 TA = 25C TYP MAX MIN 40 6.8 6.4 6.7 3.9 5.4 7.3 8 6.9 7.8 6.4 6.6 5.7 5.9 5.3 7.1 5.9 10.1 5.6 8.6 10.3 22.4 21.1 27.1 32.3 19.8 24.1 26.7 23.3 26.1 15.2 16.1 14.1 15.2 18.6 23.1 18.8 29.4 19.2 25.8 30.3 MAX UNIT MHz ns ns ns ns ns ns ns ns ns ns ns
CLOAD CCLR OE
OE OE
OE CCK
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
2-7
74AC11593 8-BIT BINARY COUNTER WITH 3-STATE I/O INPUT REGISTERS
SCAS202 - MARCH 1992 - REVISED APRIL 1993
switching characteristics over recommended operating free-air temperature range, VCC = 5 V 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER fmax tPLH tPHL tPLH tPHL tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ tPLH tPHL tPLH tPHL tPLH tPLH tPHL FROM (INPUT) TO (OUTPUT) MIN 70 CCK Q Q Q Q Q Q Q 4.1 4.2 3.7 3.4 3.3 4.1 4.1 3.8 3.9 4.2 5.3 4.4 5.2 3.5 RCO RCO RCO RCO 4.1 3.5 CLOAD CCLR RCK 5.6 3.6 5 5.5 8.7 8.9 10 11.4 7.9 9.1 9.4 8.7 9.1 7.6 8.8 7.3 8.5 7.6 9.2 7.8 11.7 8 10.3 11.7 12.4 12.6 15.3 18.3 11.8 13.2 13.8 13 13.4 10.6 11.8 10.1 11.6 11.2 13.4 11.2 16.6 11.6 14.4 16.6 TA = 25C TYP MAX MIN 70 4.1 4.2 3.7 3.4 3.3 4.1 4.1 3.8 3.9 4.2 5.3 4.4 5.2 3.5 4.1 3.5 5.6 3.6 5 5.5 14.3 14.2 17.4 20.6 13.4 15.3 16 15 15.4 11.6 13.1 11 13 12.8 15.4 12.8 19 13.4 16.7 19.2 MAX UNIT MHz ns ns ns ns ns ns ns ns ns ns ns
CLOAD CCLR OE
OE OE
OE CCK
operating characteristics, VCC = 5 V, TA = 25C
PARAMETER Cpd d Power dissipation capacitance Outputs enabled Outputs disabled TEST CONDITIONS CL = 50 pF pF, f = 1 MHz TYP 66 15 UNIT pF
2-8
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
74AC11593 8-BIT BINARY COUNTER WITH 3-STATE I/O INPUT REGISTERS
SCAS202 - MARCH 1992 - REVISED APRIL 1993
PARAMETER MEASUREMENT INFORMATION
2 x VCC From Output Under Test CL = 50 pF (see Note A) 500 S1 Open GND 500 TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH S1 Open 2 x VCC GND
LOAD CIRCUIT Timing Input (see Note B) tw VCC Input 50% 50% 0V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS Data Input tsu 50% 50% th VCC 50% 0V VCC 0V
Input (see Note B) tPLH In-Phase Output tPHL Out-of-Phase Output
VCC 50% 50% 0V tPHL 50% VCC VOH 50% VCC VOL tPLH 50% VCC VOH 50% VCC VOL
Output Control (low-level enabling) Output Waveform 1 S1 at 2 x VCC (see Note C) Output Waveform 2 S1 at GND (see Note C)
VCC 50% tPZL tPLZ 50% VCC tPHZ 80% VCC VOH 20% VCC 50% 0V
[ VCC
VOL
tPZH
50% VCC
[0V
VOLTAGE WAVEFORMS
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr = 3 ns, tf = 3 ns. C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
2-9
74AC11593 8-BIT BINARY COUNTER WITH 3-STATE I/O INPUT REGISTERS
SCAS202 - MARCH 1992 - REVISED APRIL 1993
2-10
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, warranty or endorsement thereof.
Copyright (c) 1998, Texas Instruments Incorporated

▲Up To Search▲

Price & Availability of SCAS202

	To Download SCAS202 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .