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 SN54LV4066A, SN74LV4066A QUADRUPLE BILATERAL ANALOG SWITCHES
SCLS427C - APRIL 1999 - REVISED JUNE 2000
D D D D D D D D D
EPIC TM (Enhanced-Performance Implanted CMOS) Process 2-V to 5.5-V VCC Operation Support Mixed-Mode Voltage Operation on All Ports High On-Off Output-Voltage Ratio Low Crosstalk Between Switches Individual Switch Controls Extremely Low Input Current ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Package Options Include Plastic Small-Outline (D, NS), Shrink Small-Outline (DB), Thin Very Small-Outline (DGV), Thin Shrink Small-Outline (PW), Ceramic Flat (W) Packages, and Standard Plastic (N) and Ceramic (J) DIPs
SN54LV4066A . . . J OR W PACKAGE SN74LV4066A . . . D, DB, DGV, N, NS, OR PW PACKAGE (TOP VIEW)
1A 1B 2B 2A 2C 3C GND
1 2 3 4 5 6 7
14 13 12 11 10 9 8
VCC 1C 4C 4A 4B 3B 3A
description
This quadruple silicon-gate CMOS analog switch is designed for 2-V to 5.5-V VCC operation. These switches are designed to handle both analog and digital signals. Each switch permits signals with amplitudes up to 5.5 V (peak) to be transmitted in either direction. Each switch section has its own enable-input control (C). A high-level voltage applied to C turns on the associated switch section. Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems. The SN54LV4066A is characterized for operation over the full military temperature range of -55C to 125C. The SN74LV4066A is characterized for operation from -40C to 85C.
FUNCTION TABLE (each switch) INPUT CONTROL (C) L H SWITCH OFF ON
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC is a trademark of Texas Instruments.
UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303
Copyright (c) 2000, Texas Instruments Incorporated
* DALLAS, TEXAS 75265
1
SN54LV4066A, SN74LV4066A QUADRUPLE BILATERAL ANALOG SWITCHES
SCLS427C - APRIL 1999 - REVISED JUNE 2000
logic symbol
1C 1A 2C 2A 3C 3A 4C 4A 13 1 5 4 6 8 12 11 10 4B 9 3B 3 2B X1 1 1 2 1B
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
A VCC VCC
B C
One of Four Switches
2
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
SN54LV4066A, SN74LV4066A QUADRUPLE BILATERAL ANALOG SWITCHES
SCLS427C - APRIL 1999 - REVISED JUNE 2000
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Switch I/O voltage range, VIO (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to VCC + 0.5 V Control-input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -20 mA I/O diode current, IIOK (VIO < 0 or VIO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA On-state switch current, IT (VIO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Package thermal impedance, JA (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86C/W DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96C/W DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. This value is limited to 5.5 V maximum. 3. The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions (see Note 4)
SN54LV4066A VCC Supply voltage VCC = 2 V VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V VCC = 2 V VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V 0 0 VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V 0 0 0 MIN 2 1.5 VCC x 0.7 VCC x 0.7 VCC x 0.7 0.5 VCC x 0.3 VCC x 0.3 VCC x 0.3 5.5 VCC 200 100 20 0 0 0 0 0 MAX 5.5 SN74LV4066A MIN 2 1.5 VCC x 0.7 VCC x 0.7 VCC x 0.7 0.5 VCC x 0.3 VCC x 0.3 VCC x 0.3 5.5 VCC 200 100 20 V V MAX 5.5 UNIT V
VIH
High-level High level input voltage, control inputs voltage
VIL
Low-level Low level input voltage, control inputs voltage
VI VIO t/v
Control input voltage Input/output voltage Input transition rise or fall rate
V V ns/V
TA Operating free-air temperature -55 125 -40 85 C With supply voltages at or near 2 V, the analog switch on-state resistance becomes very nonlinear. Only digital signals should be transmitted at these low supply voltages. NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
3
SN54LV4066A, SN74LV4066A QUADRUPLE BILATERAL ANALOG SWITCHES
SCLS427C - APRIL 1999 - REVISED JUNE 2000
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS IT = -1 mA, VI = VCC or GND, GND VC = VIH (see Figure 1) IT = -1 mA, 1 VI = VCC to GND, VC = VIH IT = -1 mA, 1 VI = VCC to GND, VC = VIH VI = VCC or GND VI = VCC and VO = GND, or VI = GND and VO = VCC, VC = VIL (see Figure 2) VI = VCC or GND, VC = VIH (see Figure 3) VI = VCC or GND VCC 2.3 V 3V 4.5 V 2.3 V 3V 4.5 V 2.3 V 3V 4.5 V 0 V to 5.5 V MIN TA = 25C TYP MAX 38 29 21 143 57 31 6 3 2 180 150 75 500 180 100 30 20 15 0.1 SN54LV4066A MIN MAX 225 190 100 600 225 125 40 30 20 1 SN74LV4066A MIN MAX 225 190 100 600 225 125 40 30 20 1 A UNIT
Ron
On-state O tt switch resistance
Ron(p) ()
Pk Peak on-state resistance Difference in on-state resistance between switches Control input current
Ron II
Isoff
Off-state switch leakage current
5.5V
0.1
1
1
A
Ison ICC Cic Cio Cf
On-state switch leakage current Supply current Control input capacitance Switch input/output capacitance Feedthrough capacitance
5.5 V 5.5 V 1.5 5.5 0.5
0.1
1 20
1 20
A A pF pF pF
PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.
4
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
SN54LV4066A, SN74LV4066A QUADRUPLE BILATERAL ANALOG SWITCHES
SCLS427C - APRIL 1999 - REVISED JUNE 2000
switching characteristics over recommended operating free-air temperature range, VCC = 2.5 V 0.2 V (unless otherwise noted)
PARAMETER tPLH, tPHL tPZH, tPZL tPLZ, tPHZ tPLH, tPHL tPZH, tPZL tPLZ, tPHZ Propagation delay time Switch turn-on time Switch turn-off time Propagation delay time Switch turn-on time Switch turn-off time FROM (INPUT) A or B TO (OUTPUT) B or A TEST CONDITIONS CL = 15 pF, (see Figure 4) CL = 15 pF, RL = 1 k (see Figure 5) CL = 15 pF, RL = 1 k (see Figure 5) CL = 50 pF, (see Figure 4) CL = 50 pF, RL = 1 k (see Figure 5) CL = 50 pF, RL = 1 k (see Figure 5) MIN TA = 25C TYP MAX 1.2 10 SN54LV4066A MIN MAX 16 SN74LV4066A MIN MAX 16 UNIT ns
C
A or B
3.3
15
20
20
ns
C
A or B
6
15
23
23
ns
A or B
B or A
2.6
12
18
18
ns
C
A or B
4.2
25
32
32
ns
C
A or B
9.6
25
32
32
ns
switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V 0.3 V (unless otherwise noted)
PARAMETER tPLH, tPHL tPZH, tPZL tPLZ, tPHZ tPLH, tPHL tPZH, tPZL tPLZ, tPHZ Propagation delay time Switch turn-on time Switch turn-off time Propagation delay time Switch turn-on time Switch turn-off time FROM (INPUT) A or B TO (OUTPUT) B or A TEST CONDITIONS CL = 15 pF, (see Figure 4) CL = 15 pF, RL = 1 k (see Figure 5) CL = 15 pF, RL = 1 k (see Figure 5) CL = 50 pF, (see Figure 4) CL = 50 pF, RL = 1 k (see Figure 5) CL = 50 pF, RL = 1 k (see Figure 5) TA = 25C MIN TYP MAX 0.8 6 SN54LV4066A MIN MAX 10 SN74LV4066A MIN MAX 10 UNIT ns
C
A or B
2.3
11
15
15
ns
C
A or B
4.5
11
15
15
ns
A or B
B or A
1.5
9
12
12
ns
C
A or B
3
18
22
22
ns
C
A or B
7.2
18
22
22
ns
PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
5
SN54LV4066A, SN74LV4066A QUADRUPLE BILATERAL ANALOG SWITCHES
SCLS427C - APRIL 1999 - REVISED JUNE 2000
switching characteristics over recommended operating free-air temperature range, VCC = 5 V 0.5 V (unless otherwise noted)
PARAMETER tPLH, tPHL tPZH, tPZL tPLZ, tPHZ tPLH, tPHL tPZH, tPZL tPLZ, tPHZ Propagation delay time Switch turn-on time Switch turn-off time Propagation delay time Switch turn-on time Switch turn-off time FROM (INPUT) A or B TO (OUTPUT) B or A TEST CONDITIONS CL = 15 pF, (see Figure 4) CL = 15 pF, RL = 1 k (see Figure 5) CL = 15 pF, RL = 1 k (see Figure 5) CL = 50 pF, (see Figure 4) CL = 50 pF, RL = 1 k (see Figure 5) CL = 50 pF, RL = 1 k (see Figure 5) MIN TA = 25C TYP MAX 0.3 4 SN54LV4066A MIN MAX 7 SN74LV4066A MIN MAX 7 UNIT ns
C
A or B
1.6
7
10
10
ns
C
A or B
3.2
7
10
10
ns
A or B
B or A
0.6
6
8
8
ns
C
A or B
2.1
12
16
16
ns
C
A or B
5.1
12
16
16
ns
analog switch characteristics over operating free-air temperature range (unless otherwise noted)
PARAMETER FROM (INPUT) TO (OUTPUT) TEST CONDITIONS CL = 50 pF, RL = 600 , F, fin = 1 MHz (sine wave) 20log10(VO/VI) = -3 dB (see Figure 6) CL = 50 pF, RL = 600 F , fin = 1 MHz (sine wave) (see Figure 7) CL = 50 pF, RL = 600 F , fin = 1 MHz (square wave) (see Figure 8) CL = 50 pF, RL = 600 fin = 1 MHz F , MH (see Figure 9) VI = 2 Vp-p VI = 2.5 Vp-p VI = 4 Vp-p VCC 2.3 V 3V 4.5 V 2.3 V 3V 4.5 V 2.3 V 3V 4.5 V 2.3 V 3V 4.5 V CL= 50 pF, RL = 10 k, F, fin = 1 kHz (sine wave) (see Figure 10) 2.3 V 3V 4.5 V MIN TA = 25C TYP MAX 30 35 50 -45 -45 -45 15 20 50 -40 -40 -40 0.1 0.1 0.1 dB mV dB MHz UNIT
Frequency response F (switch on)
A or B
B or A
C t lk Crosstalk (between any switches) Crosstalk (control input to signal output) Feedthrough attenuation F dth h tt ti (switch off)
A or B
B or A
C
A or B
A or B
B or A
Sine-wave distortion
A or B
B or A
operating characteristics, TA = 25C
PARAMETER Cpd Power dissipation capacitance TEST CONDITIONS CL = 50 pF, f = 10 MHz TYP 4.5 UNIT pF
PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.
6
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
SN54LV4066A, SN74LV4066A QUADRUPLE BILATERAL ANALOG SWITCHES
SCLS427C - APRIL 1999 - REVISED JUNE 2000
PARAMETER MEASUREMENT INFORMATION
VCC VC = VIH VCC VI = VCC or GND (ON) GND VO R ON 1 mA - + V 10 V
I -3 O
W
V VI - VO
Figure 1. On-State Resistance Test Circuit
VCC VC = VIL VCC VI A (OFF) GND VO
Condition 1: VI = 0, VO = VCC Condition 2: VI = VCC, VO = 0
Figure 2. Off-State Switch Leakage-Current Test Circuit
VCC VC = VIH VCC VI A (ON) GND Open
VI = VCC or GND
Figure 3. On-State Leakage-Current Test Circuit
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
7
SN54LV4066A, SN74LV4066A QUADRUPLE BILATERAL ANALOG SWITCHES
SCLS427C - APRIL 1999 - REVISED JUNE 2000
PARAMETER MEASUREMENT INFORMATION
VCC VC = VIH VCC VI 50 (ON) GND CL VO
TEST CIRCUIT tr VI A or B tPLH VO B or A 90% 50% 10% 90% 50% 10% tPHL VOH 50% VOLTAGE WAVEFORMS 50% VOL tf VCC 0V
Figure 4. Propagation Delay Time, Signal Input to Signal Output
8
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
SN54LV4066A, SN74LV4066A QUADRUPLE BILATERAL ANALOG SWITCHES
SCLS427C - APRIL 1999 - REVISED JUNE 2000
PARAMETER MEASUREMENT INFORMATION
VCC
50
TEST VC VCC VO GND RL = 1 k S2 CL tPZL tPZH tPLZ tPHZ
S1 GND VCC GND VCC
S2 VCC GND VCC GND
S1
VI
TEST CIRCUIT VCC VC 0V tPZL VCC VO VOL 50% (tPZL, tPZH) VCC VC 0V tPLZ VCC VO VOL VOL + 0.3 V (tPLZ, tPHZ) VOLTAGE WAVEFORMS VOH 0 V 50% 0V tPHZ VOH - 0.3 V VCC 50% VOH 50% 0 V 50% 0V tPZH VCC 50%
Figure 5. Switching Time (tPZL, tPLZ, tPZH, tPHZ), Control to Signal Output
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
9
SN54LV4066A, SN74LV4066A QUADRUPLE BILATERAL ANALOG SWITCHES
SCLS427C - APRIL 1999 - REVISED JUNE 2000
PARAMETER MEASUREMENT INFORMATION
VCC VCC 0.1 F fin 50 VI VCC (ON) GND RL = 600 VCC/2
VO CL = 50 pF
Figure 6. Frequency Response (Switch On)
VCC VC = VCC VI 0.1 F 600 VCC (ON) GND RL = 600 VCC/2 VI VCC VC = GND VCC (OFF) 600 GND RL = 600 VCC/2
fin 50
VO1 CL = 50 pF
VO2 CL = 50 pF
Figure 7. Crosstalk Between Any Two Switches
VCC 50 VC VCC VO 600 VCC/2 GND RL = 600 VCC/2 CL = 50 pF
Figure 8. Crosstalk (Control Input - Switch Output)
10
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
SN54LV4066A, SN74LV4066A QUADRUPLE BILATERAL ANALOG SWITCHES
SCLS427C - APRIL 1999 - REVISED JUNE 2000
PARAMETER MEASUREMENT INFORMATION
VCC VC = GND 0.1 F fin 50 600 VCC/2 VI VCC (OFF) GND RL = 600 VCC/2
VO CL = 50 pF
Figure 9. Feedthrough Attenuation (Switch Off)
VCC VC = VCC 10 F fin 600 VI VCC (ON) GND RL = 10 k VCC/2 10 F VO CL = 50 pF
Figure 10. Sine-Wave Distortion
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
11
IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Customers are responsible for their applications using TI components. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, warranty or endorsement thereof.
Copyright (c) 2000, Texas Instruments Incorporated


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