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THS4062 Dual High Speed Amplifier Evaluation Module
User's Guide
March 1999
Mixed-Signal Products
SLOU040
IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, warranty or endorsement thereof.
Copyright (c) 1999, Texas Instruments Incorporated
Preface
Related Documentation From Texas Instruments
J
THS4062 DUAL HIGH-SPEED OPERATIONAL AMPLIFIER (literature number SLOS234). This is the data sheet for the THS4062 operational amplifier integrated circuit that is used in the THS4062 evaluation module. PowerPAD Thermally Enhanced Package (literature number SLMA002). This is the Texas Instruments technical brief detailing the PowerPAD package of the THS4062 operational amplifier integrated circuit that is used in the THS4062 evaluation module.
J
FCC Warning
This equipment is intended for use in a laboratory test environment only. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of this equipment in other environments may cause interference with radio communications, in which case the user at his own expense will be required to take whatever measures may be required to correct this interference.
Trademarks
Ti is a trademark of Texas Instruments Incorporated. PowerPAD is a trademark of Texas Instruments Incorporated.
Chapter Title--Attribute Reference
iii
iv
Running Title--Attribute Reference
Contents
1 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 1.1 Feature Highlights . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 1.3 THS4062 EVM Inverting Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4 1.4 Using The THS4062 EVM In The Inverting Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6 1.5 THS4062 EVM Noninverting Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7 1.6 Using The THS4062 EVM In The Noninverting Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-10 1.7 THS4062 EVM Differential Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-11 1.8 Using The THS4062 EVM WIth Differential Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-15 1.9 THS4062 EVM Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-15 1.10 THS4062 EVM Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-16 1.11 General High-Speed Amplifier Design Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . 1-17 1.12 General PowerPADTM Design Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-18 Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1 THS4062 EVM Complete Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1 THS4062 Dual High-Speed Operational Amplifier EVM Parts List . . . . . . . . . . . . . . . . . 2.2 THS4062 EVM Board Layouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 2-2 2-3 2-4
2
Chapter Title--Attribute Reference
v
Running Title--Attribute Reference
Figures
1-1 1-2 1-3 1-4 1-5 1-6 1-7 1-8 1-9 2-1 2-2 2-2 2-3 THS4062 Evaluation Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 THS4062 EVM Schematic -- Noninverting Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4 THS4062 EVM Schematic -- Inverting Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7 THS4062 EVM Schematic -- Differential Input (Noninverting Operation) . . . . . . . . . . . . 1-11 THS4062 EVM Schematic -- Differential Input (Inverting Operation) . . . . . . . . . . . . . . . . 1-13 THS4062 EVM Frequency Response at VCC = 5 V and Gain = 2 . . . . . . . . . . . . . . . . . 1-16 THS4062 EVM Phase vs. Frequency at VCC = 15 V and Gain = 2 . . . . . . . . . . . . . . . . 1-16 PowerPAD PCB Etch and Via Pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-18 Maximum Power Dissipation vs. Free-Air Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-19 THS4062 EVM Complete Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . THS4062 EVM Component Placement Silkscreen and Solder Pads . . . . . . . . . . . . . . . . . THS4062 EVM PC Board Layout - Component Side . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . THS4062 EVM PC Board Layout - Back Side . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 2-4 2-5 2-6
Tables
2-1 THS4062 EVM Parts List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
vi
Chapter 1
General
This chapter details the Texas Instruments (TITM) THS4062 dual high-speed amplifier evaluation module (EVM), SLOP235. It includes a list of EVM features, a brief description of the module illustrated with a pictorial and a schematic diagram, EVM specifications, details on connecting and using the EVM, and discussions on high-speed amplifier design and thermal considerations.
Topic
1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9
Page
Feature Highlights . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 THS4062 EVM Noninverting Operation . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4 Using The THS4062 EVM In The Noninverting Mode . . . . . . . . . . . . . 1-6 THS4062 EVM Inverting Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7 Using The THS4062 EVM In The Inverting Mode . . . . . . . . . . . . . . . . . 1-9 THS4062 EVM Differential Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-10 Using The THS4062 EVM With Differential Inputs . . . . . . . . . . . . . . 1-14 THS4062 EVM Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-14
1.10 THS4062 EVM Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-15 1.11 General High-Speed Amplifier Design Considerations . . . . . . . . . 1-16 1.12 General PowerPADTM Design Considerations . . . . . . . . . . . . . . . . . . 1-17
General
1-1
Feature Highlights
1.1 Feature Highlights
THS4062 dual high-speed amplifier EVM features include:
J J J J J J J
High Bandwidth -- 45 MHz, -3 dB at 15 VCC and Gain = 2 5-V to 15-V Operation Noninverting Single-Ended Inputs -- Inverting-Capable Through Component Change Module Gain Set to 2 (Noninverting) -- Adjustable Through Component Change Nominal 50- Impedance Inputs and Outputs Standard SMA Input and Output Connectors Good Example of High-Speed Amplifier Design and Layout
1-2
General
Description
1.2 Description
The TI THS4062 dual high-speed amplifier evaluation module (EVM) is a complete dual high-speed amplifier circuit. It consists of the TI THS4062 dual high-speed amplifier IC, along with a small number of passive parts, mounted on a small circuit board measuring approximately 1.9 inch by 2.2 inch (Figure 1-1). The EVM uses standard SMA miniature RF connectors for inputs and outputs and is completely assembled, tested, and ready to use -- just connect it to power, a signal source, and a load (if desired).
Figure 1-1. THS4062 Evaluation Module
-VCC GND +VCC + C1 J2 J1 Vin1 + C2 J3 Vout1
R1 C4 R8 J4 Vin2 R9
SLOP235 THS4062 EVM Board
Note: The EVM is shipped with the following component locations empty: C3, C6, R2, R4, R8, R10, R12
Although the THS4062 EVM is shipped with components installed for dual-channel single-ended noninverting operation, it can also be configured for single-channel differential and/or inverting operation by moving components. Noninverting gain is set to 2 with the installed components. The input of each channel is terminated with a 50- impedance to provide correct line impedance matching. The amplifier IC outputs are routed through 50- resistors both to provide correct line impedance matching and to help isolate capacitive loading on the outputs of the amplifier. Capacitive loading directly on the output of the IC decreases the amplifier's phase margin and can result in peaking or oscillations.
R2 R10
R3 R11
R4 R12
R5 R13
U1 C5 R14 C6 R15
R6
C3
R7 TEXAS INSTRUMENTS J5 Vout2
General
1-3
THS4062 EVM Noninverting Operation
1.3 THS4062 EVM Noninverting Operation
The THS4062 EVM is shipped preconfigured for dual-channel noninverting operation, as shown in Figure 1-2. Note that compensation capacitors C3 and C6 are not installed.
Figure 1-2. THS4062 EVM Schematic -- Noninverting Operation
J2 -VCC GND +VCC 1 2 3 C1 6.8 F C2 6.8 F -VCC +VCC R5 301 +VCC C3 x F
R6 301 C5 0.1 F
2 J1 Vin1 R1 49.9 R3 0 3
- +
8
U1:A THS4062 1
R7 49.9
J3 Vout1
4
C4 0.1 F
-VCC
C6 x F
R13 301
R14 301
6 J4 Vin2 R9 49.9 R11 0 5
- +
U1:B THS4062 7
R15 49.9
J5 Vout2
The gain of the EVM can easily be changed to support a particular application by simply changing the ratio of resistors R6 and R5 (channel 1) and R14 and R13 (channel 2) as described in the following equation:
Noninverting Gain
R + 1 ) R + 1 ) R6 R5
F G
and 1
) R14 R13
In addition, some applications, such as those for video, may require the use of 75- cable and 75- EVM input termination and output isolation resistors.
1-4
General
THS4062 EVM Noninverting Operation
Any of the resistors on the EVM board can be replaced with a resistor of a different value; however, care must be taken because the surface-mount solder pads on the board are somewhat fragile and will not survive many desoldering/soldering operations. External factors can significantly affect the effective gain of the EVM. For example, connecting test equipment with 50- input impedance to the EVM output will divide the output signal level by a factor of 2 (assuming the output isolation resistor on the EVM board remains 50 ). Similar effects can occur at the input, depending upon how the input signal sources are configured. The gain equations given previously assume no signal loss in either the input or the output. Frequency compensation capacitors C3 and C6 may need to be installed to improve stability at lower gains. The appropriate value depends on the particular application. The EVM circuit board is an excellent example of proper board layout for high-speed amplifier designs and can be used as a guide for user application board layouts.
General
1-5
Using the THS4062 EVM In The Noninverting Mode
1.4 Using the THS4062 EVM In The Noninverting Mode
The THS4062 EVM operates from power-supply voltages ranging from 5 V to 15 V. As shipped, the EVM is configured for noninverting operation and the gain is set to 2. Signal inputs on the module are terminated for 50- nominal source impedance. An oscilloscope is typically used to view and analyze the EVM output signal. 1) Ensure that all power supplies are set to OFF before making power supply connections to the THS4062 EVM. 2) Connect the power supply ground to the module terminal block (J2) location marked GND. 3) Select the operating voltage for the EVM and connect appropriate split power supplies to the module terminal block (J2) locations marked -VCC and +VCC. 4) Connect an oscilloscope to the module SMA output connector (J3/J5) through a 50- nominal impedance cable (an oscilloscope having a 50- input termination is preferred for examining very high frequency signals). 5) Set the power supply to ON. 6) Connect the signal input to the module SMA input connector (J1/J4). Each EVM input connector is terminated with a 50- impedance to ground. With a 50- source impedance, the voltage seen by the THS4062 amplifier IC on the module will be the source signal voltage applied to the EVM. This is due to the voltage division between the source impedance and the EVM input terminating resistors (R1, R9).
1/2
7) Verify the output signal on the oscilloscope. The signal shown on an oscilloscope with a 50- input impedance will be the actual THS4062 amplifier IC output voltage. This is due to the voltage division between the output resistor (R7, R15) and the oscilloscope input impedance.
1/2
1-6
General
THS4062 EVM Inverting Operation
1.5 THS4062 EVM Inverting Operation
Although the THS4062 EVM is shipped preconfigured for dual-channel noninverting operation, it can be reconfigured for inverting operation by making the following component changes: 1) Move resistor R3 to the R2 location on the board. 2) Move resistor R11 to the R10 location on the board. 3) Remove resistors R5 and R12. 4) Add resistors R4 and R13 with values appropriate for the input termination required for the application. 5) Replace R1 and R9 with values appropriate for the input termination required for the application. Typical termination value is 50 . This configuration is shown in Figure 1-3. Note that compensation capacitors C3 and C6 are not installed.
Figure 1-3. THS4062 EVM Schematic -- Inverting Operation
J2 -VCC GND +VCC 1 2 3 C1 6.8 F C2 6.8 F +VCC R4 100 R1 100 3 C6 x F R2 0 -VCC R14 301 R12 100 R9 100 5 +VCC R6 301 C5 0.1 F -VCC C3 x F
J1 Vin1
2
- +
8
U1:A THS4062 1
R7 49.9
J3 Vout1
4
C4 0.1 F
J4 Vin2
6
- +
U1:B THS4062 7
R15 49.9
J5 Vout2
R10 0
General
1-7
THS4062 EVM Inverting Operation
The gain of the EVM can easily be changed to support a particular application by simply changing the ratio of resistors R6 and R4 (channel 1) and R14 and R12 (channel 2) as described in the following equation:
Inverting Gain
+ -R + -R6 R R4
F G
and -R14 R12
In addition, some applications, such as those for video, may require the use of 75- cable and 75- EVM input termination and output isolation resistors. Because the noninverting terminals are at ground potential, the inverting terminal becomes a virtual ground and is held to 0 V. At low frequencies, this causes the input impedance to ground at the input terminal to look like two 100- resistors in parallel (R1 and R4 for channel 1, and R9 and R12 for channel 2). Because the virtual ground is created by the amplifier's negative feedback signal, the virtual ground may not hold true at very high frequencies and/or with very fast input pulses. This will show up as a frequency-dependant input impedance to the external signal source. To help minimize this, increase the values of R4 and R12 so that R1 and R9 become dominant in their respective parallel combination resistances. In simplified form, these equations are:
RT
+ R1 ) R4 R1 R4
and
RT
+ R9 ) R12 R9 R12
As R4 and R12 increase in value, R1 and R9 must decrease. Because R1 and R9 are connected to true ground, the frequency dependant input is minimized. To further assist selecting appropriate resistor values, the above equations can be reconfigured as shown below. Channel 1:
R4
Channel 2:
+ R1 R R1-R
T
T
and
R1
+ R4 R R4-R
T
T
R12
+ R9 R R9-R
T
T
and
R9
+ R12 R R12-R
T
T
where RT is the source impedance.
1-8
General
THS4062 EVM Inverting Operation
Any of the resistors on the EVM board can be replaced with a resistor of a different value; however, care must be taken because the surface-mount solder pads on the board are somewhat fragile and will not survive many desoldering/soldering operations. External factors can significantly affect the effective gain of the EVM. For example, connecting test equipment with 50- input impedance to the EVM output will divide the output signal level by a factor of 2 (assuming the output isolation resistor on the EVM board remains 50 ). Similar effects can occur at the input, depending upon how the input signal sources are configured. The gain equations given above assume no signal loss in either the input or the output. Frequency compensation capacitors C3 and C6 may need to be installed to improve stability at lower gains. The appropriate value depends on the particular application. The EVM circuit board is an excellent example of proper board layout for high-speed amplifier designs and can be used as a guide for user application board layouts.
General
1-9
Using the THS4062 EVM In The Inverting Mode
1.6 Using the THS4062 EVM In The Inverting Mode
The THS4062 EVM operates from power-supply voltages ranging from 5 V to 15 V. As shipped, the EVM is configured for noninverting operation. Move the resistors as detailed above to configure the EVM for inverting operation, which sets the gain to -3. Signal inputs on the module are terminated for 50- nominal source impedance. An oscilloscope is typically used to view and analyze the EVM output signal. 1) Ensure that all power supplies are set to OFF before making power supply connections to the THS4062 EVM. 2) Connect the power supply ground to the module terminal block (J2) location marked GND. 3) Select the operating voltage for the EVM and connect appropriate split power supplies to the module terminal block (J2) locations marked -VCC and +VCC. 4) Connect an oscilloscope to the module SMA output connector (J3/J5) through a 50- nominal impedance cable (an oscilloscope having a 50- input termination is preferred for examining very high frequency signals). 5) Set the power supply to ON. 6) Connect the signal input to the module SMA input connector (J1/J2). Each EVM input connector is terminated with an equivalent 50- impedance to ground. With a 50- source impedance, the voltage seen by the THS4062 amplifier IC on the module will be the source signal voltage applied to the EVM. This is due to the voltage division between the source impedance and the EVM input terminating resistors (R1 || R4 and R9 || R12).
1/2
7) Verify the output signal on the oscilloscope. The signal shown on an oscilloscope with a 50- input impedance will be the actual THS4062 amplifier IC output voltage. This is due to the voltage division between the output resistor (R7, R15) and the oscilloscope input impedance.
1/2
1-10
General
THS4062 EVM Differential Input
1.7 THS4062 EVM Differential Input
The THS4062 EVM is shipped preconfigured for dual-channel, single-ended noninverting operation. It can be reconfigured for single-channel, differential operation, either noninverting or inverting.
1.7.1
Differential Input, Noninverting Operation
Configure the THS4062 EVM for differential noninverting operation by removing two resistors and adding a resistor on the board: 1) Remove resistors R1 and R9. 2) Add a 100- resistor to the R8 location on the board. This configuration (noninverting) is shown in Figure 1-4. For a noninverting differential input, R8 should be 100 to match 50- source impedances. Note that compensation capacitors C3 and C6 are not installed.
Figure 1-4. THS4062 EVM Schematic -- Differential Input (Noninverting Operation)
J2 -VCC GND +VCC 1 2 3 C1 6.8 F C2 6.8 F +VCC R5 301 +VCC R6 301 C5 0.1 F -VCC C3 x F
2 J1 Vin1 R3 0 3
- +
8
U1:A THS4062 1
R7 49.9
J3 Vout1
4
C4 0.1 F
R8 100 R13 301
-VCC
C6 x F
R14 301
6 J4 Vin2 R11 0 5
- +
U1:B THS4062 7
R15 49.9
J5 Vout2
General
1-11
THS4062 EVM Differential Input
The gain of the EVM can easily be changed to support a particular application by simply changing the ratio of resistors R6 and R5 (channel 1) and R14 and R13 (channel 2) as described in the following equation:
Noninverting Gain
R + 1 ) R + 1 ) R6 R5
F G
and 1
) R14 R13
In addition, some applications, such as those for video, may require the use of 75- cable and 75- EVM input termination and output isolation resistors. Any of the resistors on the EVM board can be replaced with a resistor of a different value; however, care must be taken because the surface-mount solder pads on the board are somewhat fragile and will not survive many desoldering/soldering operations. External factors can significantly affect the effective gain of the EVM. For example, connecting test equipment with 50- input impedance to the EVM output will divide the output signal level by a factor of 2 (assuming the output isolation resistor on the EVM board remains 50 ). Similar effects can occur at the input, depending upon how the input signal sources are configured. The gain equations given above assume no signal loss in either the input or the output. Frequency compensation capacitors C3 and C6 may need to be installed to improve stability at lower gains. The appropriate value depends on the particular application. The EVM circuit board is an excellent example of proper board layout for high-speed amplifier designs and can be used as a guide for user application board layouts.
1.7.2
Differential Input, Inverting Operation
Configure the THS4062 EVM for differential inverting operation by removing two resistors and adding a resistor on the board: 1) Move resistor R3 to the R2 location on the board. 2) Move resistor R11 to the R10 location on the board. 3) Add 100- resistors to the R4 and R12 locations on the board. 4) Remove resistors R1 and R9. 5) Add a 200- resistor to the R8 location on the board. This configuration (inverting) is shown in Figure 1-5. For a inverting differential input, R8 should be 200 to match a 50- source impedance. Note that compensation capacitors C3 and C6 are not installed.
1-12
General
THS4062 EVM Differential Input
Figure 1-5. THS4062 EVM Schematic -- Differential Input (Inverting Operation)
J2 -VCC GND +VCC 1 2 3 C1 6.8 F C2 6.8 F +VCC R4 100 +VCC R6 301 C5 0.1 F -VCC C3 x F
J1 Vin1
2
- +
8
U1:A THS4062 1
R7 49.9
J3 Vout1
3 R2 0 R8 200
4
C4 0.1 F
-VCC
C6 x F
R14 301 R12 100
J4 Vin2
6
- +
U1:B THS4062 7
R15 49.9
J5 Vout2
5
R10 0
The gain of the EVM inputs can easily be changed to support a particular application by simply changing the ratio of resistors R6 and R4 (channel 1) and R14 and R12 (channel 2) as described in the following equation:
Inverting Gain
+ -R + -R6 R R4
F G
and -R14 R12
R4 and R12 form part of the input impedance and R8 should be adjusted in accordance with the following equation:
R8
R4 + 2 R4-R R
T
T
where RT is the termination resistance and R4 = R12. In addition, some applications, such as those for video, may require the use of 75- cable and 75- EVM input termination and output isolation resistors.
General
1-13
THS4062 EVM Differential Input
Any of the resistors on the EVM board can be replaced with a resistor of a different value; however, care must be taken because the surface-mount solder pads on the board are somewhat fragile and will not survive many desoldering/soldering operations. External factors can significantly affect the effective gain of the EVM. For example, connecting test equipment with 50- input impedance to the EVM output will divide the output signal level by a factor of 2 (assuming the output isolation resistor on the EVM board remains 50 ). Similar effects can occur at the input, depending upon how the input signal sources are configured. The gain equations given above assume no signal loss in either the input or the output. Frequency compensation capacitors C3 and C6 may need to be installed to improve stability at lower gains. The appropriate value depends on the particular application. The EVM circuit board is an excellent example of proper board layout for high-speed amplifier designs and can be used as a guide for user application board layouts.
1-14
General
Using the THS4062 EVM With Differential Inputs
1.8 Using the THS4062 EVM With Differential Inputs
The THS4062 EVM operates from power-supply voltages ranging from 5 V to 15 V. Move resistors on the board as detailed above for either noninverting or inverting operation to configure the EVM for differential input operation. Signal inputs on the module are terminated for 50- nominal source impedance. An oscilloscope is typically used to view and analyze the EVM output signal. 1) Ensure that all power supplies are set to OFF before making power supply connections to the THS4062 EVM. 2) Connect the power supply ground to the module terminal block (J2) location marked GND. 3) Select the operating voltage for the EVM and connect appropriate split power supplies to the module terminal block (J2) locations marked -VCC and +VCC. 4) Connect an oscilloscope across the module SMA output connectors (J3 and J5) through a 50- nominal impedance cable (an oscilloscope having a 50- input termination is preferred for examining very high frequency signals). 5) Set the power supply to ON. 6) Connect the differential signal input across the module SMA input connectors (J1 and J4) The differential EVM input is terminated with an equivalent 50- impedance for each input. With 50- source impedances, the voltage seen by the THS4062 amplifier IC on the module will be the source signal voltages applied to the EVM. This is due to the voltage division between the source impedances and the EVM equivalent input resistance.
1/2
7) Verify the differential output signal on the oscilloscope. The signal shown on an oscilloscope with a 50- input impedance will be the actual THS4062 amplifier IC output voltage. This is due to the voltage division between the output resistors (R7, R15) and the oscilloscope input impedance.
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1.9 THS4062 EVM Specifications
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 V to 15 V Supply current, ICC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15.6 mA Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC, max Output drive, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA, max For complete THS4062 amplifier IC specifications and parameter measurement information, and additional application information, see the THS4062 data sheet, TI Literature Number SLOS228.
General
1-15
THS4062 EVM Performance
1.10 THS4062 EVM Performance
Figure 1-6 shows the typical phase and frequency response of the THS4062 EVM with a 5-V power supply using the noninverting configuration (G = 2). Typical -0.1 dB bandwidth is 4.5 MHz and the -3 dB bandwidth is 45 MHz with a 100 phase margin.
Figure 1-6. THS4062 EVM Frequency Response at VCC = 5 V and Gain = 2
7 6 Output Amplitude -- dB 5 4 3 Gain 2 1 0 VCC = 5 V AV = 2 VO = 0.2 VRMS RL = 100 Both channels 1M 10M f - Frequency - Hz 100M Phase -120 -150 -180 -210 500M 30 0 -30 -60 -90 Output Phase -- Degrees
-1 100k
Figure 1-7 shows the typical phase and frequency response of the THS4062 EVM with a 15-V power supply using the noninverting configuration (G = 2). Typical -0.1 dB bandwidth is 5 MHz and the -3 dB bandwidth is 45 MHz with a 100 phase margin.
Figure 1-7. THS4062 EVM Phase vs. Frequency at VCC = 15 V and Gain = 2
7 6 Output Amplitude -- dB 5 4 3 Gain 2 1 0 VCC = 15 V AV = 2 VO = 0.2 VRMS RL = 100 Both channels 1M 10M f - Frequency - Hz 100M Phase -120 -150 -180 -210 500M 30 0 -30 -60 -90 Output Phase -- Degrees
-1 100k
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General
General High-Speed Amplifier Design Considerations
1.11 General High-Speed Amplifier Design Considerations
The THS4062 EVM layout has been designed and optimized for use with high-speed signals and can be used as an example when designing THS4062 applications. Careful attention has been given to component selection, grounding, power supply bypassing, and signal path layout. Disregard of these basic design considerations could result in less than optimum performance of the THS4062 high-speed, low-power operational amplifier. Surface-mount components were selected because of the extremely low lead inductance associated with this technology. Also, because surface-mount components are physically small, the layout can be very compact. This helps minimize both stray inductance and capacitance. Tantalum power supply bypass capacitors (C1 and C2) at the power input pads help supply currents for rapid, large signal changes at the amplifier output. The 0.1 F power supply bypass capacitors (C4 and C5) were placed as close as possible to the IC power input pins in order to keep the PCB trace inductance to a minimum. This improves high-frequency bypassing and reduces harmonic distortion. A proper ground plane on both sides of the PCB should always be used with high-speed circuit design. This provides low-inductive ground connections for return current paths. In the area of the amplifier IC input pins, however, the ground plane was removed to minimize stray capacitance and reduce ground plane noise coupling into these pins. This is especially important for the inverting pin while the amplifier is operating in the noninverting mode. Because the voltage at this pin swings directly with the noninverting input voltage, any stray capacitance would allow currents to flow into the ground plane, causing possible gain error and/or oscillation. Capacitance variations at the amplifier IC input pin of less than 1 pF can significantly affect the response of the amplifier. In general, it is always best to keep signal lines as short and as straight as possible. Round corners or a series of 45 bends should be used instead of sharp 90 corners. Stripline techniques should also be incorporated when signal lines are greater than 1 inch in length. These traces should be designed with a characteristic impedance of either 50 or 75 , as required by the application. Such signal lines should also be properly terminated with an appropriate resistor. Finally, proper termination of all inputs and outputs should be incorporated into the layout. Unterminated lines, such as coaxial cable, can appear to be a reactive load to the amplifier IC. By terminating a transmission line with its characteristic impedance, the amplifier's load then appears to be purely resistive and reflections are absorbed at each end of the line. Another advantage of using an output termination resistor is that capacitive loads are isolated from the amplifier output. This isolation helps minimize the reduction in amplifier phase-margin and improves the amplifier stability for improved performance such as reduced peaking and settling times.
General
1-17
General PowerPADTM Design Considerations
1.12 General PowerPADTM Design Considerations
The THS4062DGN IC is mounted in a special package incorporating a thermal pad that transfers heat from the IC die directly to the PCB. The PowerPAD package is constructed using a downset leadframe. The die is mounted on the leadframe but is electrically isolated from it. The bottom surface of the lead frame is exposed as a metal thermal pad on the underside of the package and makes physical contact with the PCB. Because this thermal pad is in direct physical contact with both the die and the PCB, excellent thermal performance can be achieved by providing a good thermal path away from the thermal pad mounting point on the PCB. Although there are many ways to properly heatsink this device, the following steps illustrate the recommended approach as used on the THS4062 EVM. 1) Prepare the PCB with a top side etch pattern as shown in Figure 1-8. There should be etch for the leads as well as etch for the thermal pad.
Figure 1-8. PowerPAD PCB Etch and Via Pattern
Thermal pad area (68 mils x 70 mils) with 5 vias (Via diameter = 13 mils)
2) Place five holes in the area of the thermal pad. These holes should be 13 mils in diameter. They are kept small so that solder wicking through the holes is not a problem during reflow. 3) Additional vias may be placed anywhere along the thermal plane outside of the thermal pad area. This helps dissipate the heat generated by the THS4062DGN IC. These additional vias may be larger than the 13-mil diameter vias directly under the thermal pad They can be larger because they are not in the thermal pad area to be soldered so that wicking is not a problem. 4) Connect all holes to the internal ground plane. 5) When connecting these holes to the ground plane, do not use the typical web or spoke via connection methodology. Web connections have a high thermal resistance connection that is useful for slowing the heat transfer during soldering operations. This makes the soldering of vias that have plane connections easier. In this application, however, low thermal resistance is desired for the most efficient heat transfer. Therefore, the holes under the THS4062DGN package should make their connection to the internal ground plane with a complete connection around the entire circumference of the plated-through hole. 6) The top-side solder mask should leave the terminals of the package and the thermal pad area with its five holes exposed. The bottom-side solder mask should cover the five holes of the thermal pad area. This prevents solder from being pulled away from the thermal pad area during the reflow process. 7) Apply solder paste to the exposed thermal pad area and all of the IC terminals.
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General
General PowerPADTM Design Considerations
8) With these preparatory steps in place, the THS4062DGN IC is simply placed in position and run through the solder reflow operation as any standard surface mount component. This results in a part that is properly installed. The actual thermal performance achieved with the THS4062DGN in its PowerPAD package depends on the application. In the example above, if the size of the internal ground plane is approximately 3 inches x 3 inches, then the expected thermal coefficient, JA, is about 58.4C/W. For comparison, the non-PowerPAD version of the THS4062 IC (D-package in SOIC) is shown. For a given JA, the maximum power dissipation is shown in Figure 1-9 and is calculated by the following formula: P Where: PD = Maximum power dissipation of THS4062 IC (watts) TMAX = Absolute maximum junction temperature (150C) TA = Free-ambient air temperature (C) JA = JC + CA JC = Thermal coefficient from junction to case (4.7C/W) for THS4062DGN (PowerPAD) = Thermal coefficient from junction to case (38.3C/W) JC for THS4062D (SOIC) CA = Thermal coefficient from case to ambient air (C/W)
D
+
T
-T MAX A
q JA
Figure 1-9. Maximum Power Dissipation vs. Free-Air Temperature
3.5 3 2.5 2 DGN Package JA = 58.4C/W 2 oz Trace and Copper Pad with Solder DGN Package JA = 158C/W 2 oz Trace and Copper Pad without Solder TJ = 150C No Air Flow
Maximum Power Dissipation - W
1.5 1 .5 0 -40
THS4062 SOIC - Package JA = 166.7C/W -20 0 20 40 60 80 100 TA - Free-Air Temperature - C
Even though the THS4062 EVM PCB is smaller than the one in the example above, the results should give an idea of how much power can be dissipated by the PowerPAD IC package. The THS4062 EVM is a good example of proper thermal management when using PowerPAD-mounted devices.
General
1-19
General PowerPADTM Design Considerations
Correct PCB layout and manufacturing techniques are critical for achieving adequate transfer of heat away from the PowerPAD IC package. More details on proper board layout can be found in the THS4062 LOW-NOISE DUAL DIFFERENTIAL RECEIVER data sheet (SLOS228). For more general information on the PowerPAD package and its thermal characteristics, see the Texas Instruments Technical Brief, PowerPAD Thermally Enhanced Package (SLMA002).
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General
Chapter 2
Reference
This chapter includes a complete schematic, parts list, and PCB layout illustrations for the THS4062 EVM.
Topic
2.1 2.1 2.2
Page
THS4062 EVM Complete Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 THS4062 Dual High-Speed Amplifier EVM Parts List . . . . . . . . . . . . . 2-3 THS4062 EVM Board Layouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
Reference
2-1
THS4062 EVM Complete Schematic
2.1 THS4062 EVM Complete Schematic
Figure 2-1 shows the complete THS4062 EVM schematic. The EVM is shipped preconfigured for dual-channel, single-ended inverting operation. Components showing a value of X are not supplied on the board, but can be installed by the user to reconfigure the EVM for noninverting and/or differential operation.
Figure 2-1. THS4062 EVM Schematic
J2 -VCC GND +VCC 1 2 3 C1 6.8 F C2 6.8 F +VCC R5 301 +VCC R4 x J1 VIN1 R1 49.9 R3 0 3 R2 x + 4 R6 301 C5 0.1 F -VCC C3 x F
2
-
8
U1:A THS4062 1 C4 0.1 F
R7 49.9
J3 VOUT1
-VCC R8 x C6 x F
R13 301 R12 x J4 VIN2 R9 49.9 R11 0 5 +
R14 301
6
-
U1:B THS4062 7
R15 49.9
J5 VOUT2
R10 x
2-2
Reference
THS4062 Dual High-Speed Amplifier EVM Parts List
2.2 THS4062 Dual High-Speed Amplifier EVM Parts List
Table 2-1. THS4062 EVM Parts List
Reference C1, C2 C4, C5 J2 J1, J3, J4, J5 R1, R7, R9, R15 R5, R6, R13, R14 R3, R11 U1 R2, R4, R10, R12 C3, C6 Description Capacitor, 6.8 F, 35 V, Tantalum, SM Capacitor, 0.1 F, Ceramic, 10%, SM 3-Pin Terminal Block (On Shore Tech.) Connector, SMA 50- vertical PC mount, through-hole Resistor, 49.9 , 1%, 1/8 W, SM Resistor, 301 , 1%, 1/8 W, SM Resistor, 0 , 1/8 W, SM IC, THS4062 amplifier Resistor, X , 1%, 1/8 W, SM Capacitor, X F, 10%, Ceramic, SM 4-40 Hex Standoffs, 0.625" length, 0.25" O.D. 4-40 Screws PCB1 PCB, THS4062 EVM SLOP235
These components are NOT supplied on the EVM and are to be determined and installed by the user to reconfigure the EVM in accordance with application requirements.
Size
Manufacturer/Supplier Part Number Sprague 293D685X9035D2T MuRata GRM42X7R104K50 Digi-Key ED1515-ND Amphenol ARF1205-ND
1206
1206 1206 1206 SOIC-8 TI THS4062DGN 1206
Reference
2-3
THS4062 EVM Board Layouts
2.3 THS4062 EVM Board Layouts
Board layout examples of the THS4062 EVM PCB are shown in the following illustrations. They are not to scale and appear here only as a reference.
Figure 2-2. THS4062 EVM Component Placement Silkscreen and Solder Pads
-VCC GND +VCC + C1 J2 + C2 J3 Vout1
J1 Vin1
R1 R8 C4
R2
R3
R4
R5
U1 C5
R6
C3
R7 TEXAS INSTRUMENTS J5 Vout2
J4 Vin2
R9
SLOP235 THS4062 EVM Board
R10
R11
R12
R13
R14
C6
R15
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Reference
THS4062 EVM Board Layouts
Figure 2-3. THS4062 EVM PC Board Layout - Component Side
Reference
2-5
THS4062 EVM Board Layouts
Figure 2-4. THS4062 EVM PC Board Layout - Back Side
2-6
Reference

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