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Precision Low Power Single-Supply JFET Amplifiers AD8625/AD8626/AD8627
FEATURES
SC70 package Very low IB: 1 pA max Single-supply operation: 5 V to 26 V Dual-supply operation: 2.5 V to 13 V Rail-to-rail output Low supply current: 630 A/amp typ Low offset voltage: 500 V max Unity gain stable No phase reversal
PIN CONFIGURATIONS
8-Lead SOIC (R-8 Suffix)
NC 1 -IN 2 8 NC 7 V+ OUT A V- +IN 1 2 3
5-Lead SC70 (KS Suffix)
5 V+
AD8627
4 -IN
+IN 3 V- 4
AD8627
6 OUT 5 NC
NC = NO CONNECT
8-Lead SOIC (R-8 Suffix)
8-Lead MSOP (RM-Suffix)
8 V+ 7 OUT B OUT A -IN A +IN A V- 1 8 V+ OUT B -IN B +IN B
APPLICATIONS
Photodiode amplifiers ATEs Line-powered/battery-powered instrumentation Industrial controls Automotive sensors Precision filters Audio
OUT A 1 -IN A 2
AD8626
4 5
+IN A 3 V- 4
AD8626
6 -IN B 5 +IN B
14-Lead SOIC (R-Suffix)
OUT A 1 -IN A 2 +IN A 3 V+ 4 +IN B 5 -IN B 6 OUT B 7 14 OUT D 13 -IN D OUT A -IN A +IN A V+ +IN B -IN B OUT B
14-Lead TSSOP (RU-Suffix)
1 14 OUT D -IN D +IN D V- +IN C -IN C OUT C
03023-001
GENERAL DESCRIPTION
The AD862x is a precision JFET input amplifier. It features true single-supply operation, low power consumption, and rail-to-rail output. The outputs remain stable with capacitive loads of over 500 pF; the supply current is less than 630 A/amp. Applications for the AD862x include photodiode transimpedance amplification, ATE reference level drivers, battery management, both line powered and portable instrumentation, and remote sensor signal conditioning, which includes automotive sensors. The AD862x's ability to swing nearly rail-to-rail at the input and rail-to-rail at the output enables it to be used to buffer CMOS DACs, ASICs, and other wide output swing devices in single-supply systems. The 5 MHz bandwidth and low offset are ideal for precision filters. The AD862x is fully specified over the industrial temperature range. (-40C to +85C). The AD8627 is available in both 5-lead SC70 and 8-lead SOIC surface-mount packages (SC70 packaged parts are available in tape and reel only). The AD8626 is available in MSOP and SOIC packages, while the AD8625 is available in TSSOP and SOIC packages.
AD8625
12 +IN D 11 V- 10 +IN C 9 -IN C 8 OUT C
AD8625
7 8
Figure 1.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 (c) 2004 Analog Devices, Inc. All rights reserved.
AD8625/AD8626/AD8627 TABLE OF CONTENTS
AD8625/AD8626/AD8627 Specifications..................................... 3 Electrical Characteristics............................................................. 3 Electrical Characteristics............................................................. 4 Absolute Maximum Ratings............................................................ 5 Typical Performance Characteristics ............................................. 6 Applications..................................................................................... 13 Minimizing Input Current ........................................................ 15 Photodiode Preamplifier Application...................................... 15 Output Amplifier for DACs ...................................................... 16 Eight-Pole Sallen Key Low-Pass Filter..................................... 17 Outline Dimensions ....................................................................... 18 Ordering Guide .......................................................................... 19
REVISION HISTORY
11/04--Data Sheet Changed from Rev. B to Rev. C Updated Figure Codes .......................................................Universal Changes to Figure 17 and 18 ........................................................... 8 Changes to Figure 33 and Figure 37............................................. 11 Changes to Figure 38...................................................................... 12 Changes to Figure 39 and Figure 40............................................. 13 Changes to Figure 41 to Figure 44................................................ 14 1/04--Data Sheet Changed from Rev. A to Rev. B Change to General Description ...................................................... 1 Change to Figure 10 ......................................................................... 7 Change to Figure13 .......................................................................... 7 Change to Figure 37 ....................................................................... 11 Changes to Figure 38...................................................................... 12 Change to Output Amplifier for DACs section.......................... 15 Updated Outline Dimensions ....................................................... 19 10/03--Data Sheet Changed from Rev. 0 to Rev. A Addition of two new parts.......................................Universal Change to General Description.............................................. 1 Changes to Pin Configurations.........................................................1 Change to Specifications table................................................3 Changes to Figure 31..................................................................... 10 Changes to Figure 32......................................................................11 Changes to Figure 38..................................................................... 12 Changes to Figure 46..................................................................... 16 Changes to Figure 47......................................................................16 Changes to Figure 49......................................................................17 Updated Outline Dimensions....................................................... 18 Changes to Ordering Guide............................................................. 19
Rev. C | Page 2 of 20
AD8625/AD8626/AD8627 AD8625/AD8626/AD8627 SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
@VS = 5 V, VCM = 1.5 V, TA = 25C, unless otherwise noted. Table 1.
Parameter INPUT CHARACTERISTICS Offset Voltage Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain Offset Voltage Drift OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Output Current POWER SUPPLY Power-Supply Rejection Ratio Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Phase Margin NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density Channel Separation Symbol VOS -40C < TA < +85C IB -40C < TA < +85C IOS -40C < TA < +85C CMRR AVO VOS/T VOH IL = 2 mA, -40C < TA < +85C VOL IL = 2 mA, -40C < TA < +85C IOUT PSRR ISY VS = 5 V to 26 V -40C < TA < +85C SR GBP OM en p-p en in Cs 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz f = 1 kHz 5 5 60 1.9 17.5 0.4 104 80 10 104 630 VCM = 0 V to 2.5 V RL = 10 k, VO = 0.5 V to 4.5 V -40C < TA < +85C 0 66 100 87 230 2.5 0.25 Conditions Min Typ 0.05 Max 0.5 1.2 1 60 0.5 25 3 Unit mV mV pA pA pA pA V dB V/mV V/C V V V V mA dB A A V/s MHz Degrees V p-p nV/Hz fA/Hz dB
4.92 4.90 0.075 0.08
785 800
Rev. C | Page 3 of 20
AD8625/AD8626/AD8627
ELECTRICAL CHARACTERISTICS
@VS = 13 V; VCM = 0 V; TA = 25C, unless otherwise noted. Table 2.
Parameter INPUT CHARACTERISTICS Offset Voltage Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain Offset Voltage Drift OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Output Current POWER SUPPLY Power-Supply Rejection Ratio Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Phase Margin NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density Channel Separation Symbol VOS -40C < TA < +85C IB -40C < TA < +85C IOS -40C < TA < +85C CMRR AVO VOS/T VOH VOH VOL VOL IOUT PSRR ISY VCM = -13 V to +10 V RL = 10 k, VO = -11 V to +11 V -40C < TA < +85C -13 76 150 105 310 2.5 0.25 Conditions Min Typ 0.35 Max 0.75 1.35 1 60 0.5 25 +11 Unit mV mV pA pA pA pA V dB V/mV V/C V V V V mA dB A A V/s MHz Degrees V p-p nV/Hz fA/Hz dB
IL = 2 mA, -40C < TA < +85C IL = 2 mA, -40C < TA < +85C
+12.92 +12.91 -12.92 -12.91 15
VS = 2.5 V to 13 V -40C < TA < +85C
80
104 710
850 900
SR GBP OM en p-p en in Cs 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz f = 1 kHz
5 5 60 2.5 16 0.5 105
Rev. C | Page 4 of 20
AD8625/AD8626/AD8627 ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings apply at 25C, unless otherwise noted. Table 3. Stress Ratings
Parameter Supply Voltage Input Voltage Differential Input Voltage Output Short-Circuit Duration Storage Temperature Range, R Package Operating Temperature Range Junction Temperature Range, R Package Lead Temperature Range (Soldering, 60 sec) Ratings 27 V VS- to VS+ Supply Voltage Indefinite -65C to +125C -40C to +85C -65C to +150C 300C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Table 4.
Package Type 5-Lead SC70 (KS) 8-Lead MSOP (RM) 8-Lead SOIC (R) 14-Lead SOIC (R) 14-Lead TSSOP (RU) JA 1 376 210 158 120 180 JC 126 45 43 36 35 Unit C/W C/W C/W C/W C/W
1
JA is specified for worst-case conditions when devices are soldered in circuit boards for surface-mount packages.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. C | Page 5 of 20
AD8625/AD8626/AD8627 TYPICAL PERFORMANCE CHARACTERISTICS
25 VSY = 12V TA = 25C
16 VSY = +3.5V/-1.5V 14
NUMBER OF AMPLIFIERS
03023-002
NUMBER OF AMPLIFIERS
20
12 10 8 6 4
03023-005
15
10
5
2 0
0
-600
-400
-200
0
200
400
600
0
1
2
3
4
5
6
7
8
9
10
VOLTAGE (V)
OFFSET VOLTAGE (V/C)
Figure 2. Input Offset Voltage
Figure 5. Offset Voltage Drift
12 VSY = 13V 10
50 40 30
VSY = 13V TA = 25C
NUMBER OF AMPLIFIERS
INPUT BIAS CURRENT (pA)
03023-003
8
20 10 0 -10 -20 -30 -40 -50 -15.0-12.5-10.0 -7.5 -5.0 -2.5 0 2.5 VCM (V) 5.0
03023-006
6
4
2
0
0
1
2
3
4
5
6
7
8
9
10
7.5 10.0 12.5 15.0
OFFSET VOLTAGE (V/C)
Figure 3. Offset Voltage Drift
Figure 6. Input Bias Current vs. VCM
18 VSY = +3.5V/-1.5V 16
NUMBER OF AMPLIFIERS
0 -0.1 -0.2
INPUT BIAS CURRENT (pA)
VSY = 13V TA = 25C
14 12 10 8 6 4 2 0
03023-004
-0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 -15.0-12.5-10.0 -7.5 -5.0 -2.5 0 2.5 VCM (V)
03023-007
-400
-300
-200
-100
0
100
200
300
5.0
7.5 10.0 12.5 15.0
VOLTAGE (V)
Figure 4. Input Offset Voltage
Figure 7. Input Bias Current vs. VCM
Rev. C | Page 6 of 20
AD8625/AD8626/AD8627
100 VSY = 13V VCM = 0V
INPUT OFFSET VOLTAGE (V)
500 VSY = 5V 400 300 200 100 0 -100 -200 -300 -400 -500 -1 0 1 VCM (V) 2 3 4
03023-011
INPUT BIAS CURRENT (pA)
10
1
0.1 -50
-25
0
25 50 75 TEMPERATURE (C)
100
125
150
Figure 8. Input Bias Current vs. Temperature
03023-008
Figure 11. Input Offset Voltage vs. VCM
2.0 VSY = +5V OR 5V 1.5
INPUT BIAS CURRENT (pA)
10M
OPEN-LOOP GAIN (V/V)
1.0 0.5 0 -0.5 -1.0
03023-009
1M
VSY = 13V VSY = +5V
100k
-2.0 -5
-4
-3
-2
-1
0
VCM (V)
1
2
3
4
5
10k 0.1
1 10 LOAD RESISTANCE (k)
100
Figure 9. Input Bias Current vs. VCM
Figure 12. Open-Loop Gain vs. Load Resistance
1000 900
INPUT OFFSET VOLTAGE (V)
VSY = 13V
1000 a d
OPEN-LOOP GAIN (V/mV)
800 700 600 500 400 300 200 100 0 -100 -15 -12 -9 -6 -3 0 VCM (V) 3 6 9 12
03023-010
b 100 c e
10 a. VSY = 13V, VO = 11V, RL = 10k b. VSY = 13V, VO = 11V, RL = 2k c. VSY = +5V, VO = +0.5V/+4.5V, RL = 2k d. VSY = +5V, VO = +0.5V/+4.5V, RL = 10k e. VSY = +5V, VO = +0.5V/+4.5V, RL = 600 1 -40 25 95 TEMPERATURE (C)
15
125
Figure 10. Input Offset Voltage vs. VCM
Figure 13. Open-Loop Gain vs. Temperature
Rev. C | Page 7 of 20
03023-013
03023-012
-1.5
AD8625/AD8626/AD8627
600 500 400
OFFSET VOLTAGE (V)
VSY = 13V
VSY - OUTPUT VOLTAGE (mV)
10k VSY = 13V
300 200 RL = 100k 100 0 -100 -200 RL = 600
RL = 10k
1k
100
VOL 10 VOH
03023-017
-300 -400 -15 -10 -5 0 5 OUTPUT VOLTAGE (V) 10
03023-014
15
1 0.001
0.01
0.1 1 LOAD CURRENT (mA)
10
100
Figure 14. Input Error Voltage vs. Output Voltage for Resistive Loads
Figure 17. Output Saturation Voltage vs. Load Current
250 200 POS RAIL 150
INPUT VOLTAGE (V)
RL = 1k
VSY = 5V
VSY - OUTPUT VOLTAGE (mV)
10k VSY = 5V
100 50 0 -50 -100 -150 -200 -250 0
RL = 10k
RL = 100k
1k
100
RL = 10k RL = 1k NEG RAIL
03023-015
VOL 10 VOH
03023-018
50 100 150 200 250 OUTPUT VOLTAGE FROM SUPPLY RAILS (mV)
300
1 0.001
0.01
0.1 1 LOAD CURRENT (mA)
10
100
Figure 15. Input Error Voltage vs. Output Voltage within 300 mV of Supply Rails
Figure 18. Output Saturation Voltage vs. Load Current
800 700 +125C
QUIESCENT CURRENT (A)
70 60 50 VSY = 13V RL = 2k CL = 40pF
315 270 225
600 500 400 300 200
-10
03023-016
+25C
GAIN (dB)
30 20
GAIN 135 90 PHASE 10 0 45 -0 -45 -90 100k 1M FREQUENCY (Hz) 10M -135 50M
-20 -30 10k
0 0 4 8 12 16 20 TOTAL SUPPLY VOLTAGE (V) 24
28
Figure 16. Quiescent Current vs. Supply Voltage at Different Temperatures
Figure 19. Open-Loop Gain and Phase Margin vs. Frequency
Rev. C | Page 8 of 20
03023-019
100
PHASE (Degrees)
-55C
40
180
AD8625/AD8626/AD8627
70 60 50 40 GAIN 315 VSY = 5V RL = 2k 270 CL = 40pF 225 140 120 100 VSY = 13V
PHASE (Degrees)
180 135 90 PHASE 45 -0 -45
80
CMRR (dB)
GAIN (dB)
30 20 10 0 -10 -20 -30 10k 100k 1M FREQUENCY (Hz) 10M
60 40 20 0 -20
03023-020
-90 -135 50M
-40 -60 1k 10k 100k FREQUENCY (Hz) 1M
10M
Figure 20. Open-Loop Gain and Phase Margin vs. Frequency
Figure 23. CMRR vs. Frequency
70
VSY = 13V 60 RL = 2k CL = 40pF 50 40 G = +100
140 120 100 80 VSY = 5V
20 G = +10 10 0 G = +1 -10
03023-021
CMRR (dB)
GAIN (dB)
30
60 40 20 0 -20 -40 -60 1k 10k 100k FREQUENCY (Hz) 1M
03023-024
-20 -30 1k 10k 100k 1M FREQUENCY (Hz) 10M
50M
10M
Figure 21. Closed-Loop Gain vs. Frequency
Figure 24. CMRR vs. Frequency
70 60 50 40 G = +100 VSY = 5V RL = 2k CL = 40pF
140 120 100 80
VSY = 13V
+PSRR
20 G = +10 10 0 G = +1 -10
03023-022
PSRR (dB)
GAIN (dB)
30
60 40 -PSRR 20 0 -20 -40 -60 1k 10k 100k FREQUENCY (Hz) 1M
03023-025
-20 -30 1k 10k 100k 1M FREQUENCY (Hz) 10M
50M
10M
Figure 22. Closed-Loop Gain vs. Frequency
Figure 25. PSRR vs. Frequency
Rev. C | Page 9 of 20
03023-023
AD8625/AD8626/AD8627
140 120 100 80 VOLTAGE (10V/DIV) VSY = 5V INPUT VSY = 13V
PSRR (dB)
60 40 +PSRR 20 -PSRR 0 -20 -40 -60 1k 10k 100k FREQUENCY (Hz) 1M
03023-026
OUTPUT
10M
TIME (400s/DIV)
Figure 26. PSRR vs. Frequency
Figure 29. No Phase Reversal
300 270 240
VSY = 13V
15
10 TS + (1%) OUTPUT SWING (V) 5 TS + (0.1%) 0 TS - (0.1%) -5 TS - (1%) -10
03023-027
210 ZOUT () 180 150 120 90 G = +10 60 G = +100 30 0 1k 10k 100k 1M FREQUENCY (Hz) 10M G = +1
03023-029
-15 0 0.5 1.0 1.5 SETTLING TIME (s) 2.0 2.5
100M
Figure 27. Output Impedance vs. Frequency
Figure 30. Output Swing and Error vs. Settling Time
300 VSY = 5V 270 240 OVERSHOOT (%) 210 ZOUT () 180 150 120 90 G = +10 60
03023-028
70
VS = 13V RL = 10k 60 VIN = 100mV p-p AV = +1 50
40
OS- OS+
30
20 G = +1
03023-031
G = +100 30 0 1k 10k 100k 1M FREQUENCY (Hz) 10M
10
100M
0 10
100 CAPACITANCE (pF)
1k
Figure 28. Output Impedance vs. Frequency
Figure 31. Small-Signal Overshoot vs. Load Capacitance
Rev. C | Page 10 of 20
03023-030
AD8625/AD8626/AD8627
70 VS = 2.5V RL = 10k 60 VIN = 100mV p-p AV = +1 50 OVERSHOOT (%)
VOLTAGE (nV)
56 49 42 35
VSY = 13V
40
19.7nV/ Hz 28 21 14
30 OS+ OS-
03023-032
20
0 10
0 0 1 2 3 4 5 6 FREQUENCY (kHz) 7 8 9 10
100 CAPACITANCE (pF)
1k
Figure 32. Small-Signal Overshoot vs. Load Capacitance
Figure 35. Voltage Noise Density
VSY = 13V AVO = 100,000V/V
56 VSY = 5V 49
VOLTAGE (50mV/DIV)
42
VOLTAGE (nV)
35 16.7nV/ Hz 28 21 14
0
03023-033
TIME (1s/DIV)
0 0 1 2 3 4 5 6 FREQUENCY (kHz) 7 8 9 10
Figure 33. 0.1 Hz to 10 Hz Noise
Figure 36. Voltage Noise Density
VSY = 2.5V AVO = 100,000V/V
-40 -50
VOLTAGE (50mV/DIV)
-60
THD + NOISE (dB)
-70 -80 -90
0
VSY = 5V, VIN = 9V p-p VSY = 13V, VIN = 18V p-p
03023-034
TIME (1s/DIV)
-110 10
100
1k FREQUENCY (Hz)
10k
100k
Figure 37. Total Harmonic Distortion + Noise vs. Frequency Figure 34. 0.1 Hz to 10 Hz Noise
Rev. C | Page 11 of 20
03023-037
-100
VSY = 2.5V, VIN = 4.5V p-p
03023-036
7
03023-035
10
7
AD8625/AD8626/AD8627
20k 2k
VIN -80 -90
CHANNEL SEPARATION (dB)
2k
2k
-100 -110 -120 -130 -140
03023-049
VIN = 9V p-p VIN = 4.5V p-p VIN = 18V p-p
-150 -160 10
100
1k 10k FREQUENCY (Hz)
100k
Figure 38. Channel Separation
Rev. C | Page 12 of 20
AD8625/AD8626/AD8627 APPLICATIONS
The AD862x is one of the smallest and most economical JFETs offered. It has true single-supply capability and has an input voltage range that extends below the negative rail, allowing the part to accommodate input signals below ground. The rail-to-rail output of the AD862x provides the maximum dynamic range in many applications. To provide a low offset, low noise, high impedance input stage, the AD862x uses n-channel JFETs. The input common-mode voltage extends from 0.2 V below -VS to 2 V below +VS. Driving the input of the amplifier, configured in the unity gain buffer, closer than 2 V to the positive rail causes an increase in common-mode voltage error, as illustrated in Figure 15, and a loss of amplifier bandwidth. This loss of bandwidth causes the rounding of the output waveforms shown in Figure 39 and Figure 40, which have inputs that are 1 V and 0 V from +VS, respectively. The AD862x does not experience phase reversal with input signals close to the positive rail, as shown in Figure 29. For input voltages greater than +VSY, a resistor in series with the AD862x's noninverting input prevents phase reversal at the expense of greater input voltage noise. This current-limiting resistor should also be used if there is a possibility of the input voltage exceeding the positive supply by more than 300 mV, or if an input voltage is applied to the AD862x when VSY = 0. Either of these conditions damages the amplifier if the condition exists for more than 10 seconds. A 100 k resistor allows the amplifier to withstand up to 10 V of continuous overvoltage, while increasing the input voltage noise by a negligible amount.
VSY = 5V INPUT 4V
VOLTAGE (2V/DIV)
0V 4V OUTPUT
TIME (2s/DIV)
Figure 39. Unity Gain Follower Response to 0 V to 4 V Step
VSY = 5V 5V INPUT
VOLTAGE (2V/DIV)
0V
4V OUTPUT
TIME (2s/DIV)
Figure 40. Unity Gain Follower Response to 0 V to 5 V Step
Rev. C | Page 13 of 20
03023-039
0V
03023-038
0V
AD8625/AD8626/AD8627
The AD862x can safely withstand input voltages 15 V below VSY if the total voltage between the positive supply and the input terminal is less than 26 V. Figure 41 through Figure 43 show the AD862x in different configurations accommodating signals close to the negative rail. The amplifier input stage typically maintains picoamp-level input currents across that input voltage range.
20k
VOLTAGE (10mV/DIV) 20k +5V 10k 0V -10mV -30mV VSY = 5V
+5V 10k 0V -2.5V VSY = 5V, 0V
5V
VOLTAGE (1V/DIV)
TIME (2s/DIV)
Figure 43. Gain-of-Two Inverter Response to 20 mV Step, Centered 20 mV below Ground
TIME (2s/DIV)
Figure 41. Gain-of-Two Inverter Response to 2.5 V Step, Centered 1.25 V below Ground
03023-040
0V
The AD862x is designed for 16 nV/Hz wideband input voltage noise and maintains low noise performance to low frequencies, as shown in Figure 35. This noise performance, along with the AD862x's low input current and current noise, means that the AD862x contributes negligible noise for applications with large source resistances. The AD862x has a unique bipolar rail-to-rail output stage that swings within 5 mV of the rail when up to 2 mA of current is drawn. At larger loads, the drop-out voltage increases, as shown in Figure 17 and Figure 18. The AD862x's wide bandwidth and fast slew rate allows it to be used with faster signals than older single-supply JFETs. Figure 44 shows the response of the AD862x, configured in unity gain, to a VIN of 20 V p-p at 50 kHz. The full-power bandwidth (FPBW) of the part is close to 100 kHz.
VSY = 13V RL = 600
60mV 20mV 0V 5V
600
VOLTAGE (10mV/DIV)
VOLTAGE (5V/DIV)
0V
03023-041
0V
VSY = 5V RL = 600
03023-043
TIME (2s/DIV) TIME (5s/DIV)
Figure 42. Unity Gain Follower Response to 40 mV Step, Centered 40 mV above Ground
Figure 44. Unity Gain Follower Response to 20 V, 50 kHz Input Signal
Rev. C | Page 14 of 20
03023-042
0V
AD8625/AD8626/AD8627
MINIMIZING INPUT CURRENT
The AD862x is guaranteed to 1 pA maximum input current with a 13 V supply voltage at room temperature. Careful attention to how the amplifier is used maintains or possibly betters this performance. The amplifier's operating temperature should be kept as low as possible. Like other JFET input amplifiers, the AD862x's input current doubles for every 10C rise in junction temperature, as illustrated in Figure 8. On-chip power dissipation raises the device operating temperature, causing an increase in input current. Reducing supply voltage to cut power dissipation reduces the AD862x's input current. Heavy output loads can also increase chip temperature; maintaining a minimum load resistance of 1 k is recommended. The AD862x is designed for mounting on PC boards. Maintaining picoampere resolution in those environments requires a lot of care. Both the board and the amplifier's package have finite resistance. Voltage differences between the input pins and other pins, as well as PC board metal traces may cause parasitic currents larger than the AD862x's input current, unless special precautions are taken. To ensure the best result, refer to the ADI website for proper board layout seminar materials. Two common methods of minimizing parasitic leakages that should be used are guarding of the input lines and maintaining adequate insulation resistance. Contaminants, such as solder flux on the board's surface and the amplifier's package, can greatly reduce the insulation resistance between the input pin and traces with supply or signal voltages. Both the package and the board must be kept clean and dry. The amplifier's input current, IB, contributes an output voltage error proportional to the value of the feedback resistor. The offset voltage error, VOS, causes a small current error due to the photodiode's finite shunt resistance, RD. The resulting output voltage error, VE, is equal to
Rf VOS + R f (I B ) V E = 1 + RD
A shunt resistance on the order of 100 M is typical for a small photodiode. Resistance RD is a junction resistance that typically drops by a factor of two for every 10C rise in temperature. In the AD862x, both the offset voltage and drift are low, which helps minimize these errors. With IB values of 1 pA and VOS of 50 mV, VE for Figure 45 is very negligible. Also, the circuit in Figure 45 results in an SNR value of 95 dB for a signal bandwidth of 30 kHz.
CF 5pF
PHOTODIODE
VOS C4 I 15pF B
RF 1.5M OUTPUT
Figure 45. A Photodiode Model Showing DC Error
PHOTODIODE PREAMPLIFIER APPLICATION
The low input current and offset voltage levels of the AD862x, together with its low voltage noise, make this amplifier an excellent choice for preamplifiers used in sensitive photodiode applications. In a typical photovoltaic preamp circuit, shown in Figure 45, the output of the amplifier is equal to
VOUT = - ID(R f ) = - R p(P)R f
where: ID = photodiode signal current (A). Rp = photodiode sensitivity (A/W). Rf = value of the feedback resistor, in . P = light power incident to photodiode surface, in W.
Rev. C | Page 15 of 20
03023-044
RD 100M
IB
AD8627
AD8625/AD8626/AD8627
OUTPUT AMPLIFIER FOR DACs
Many system designers use amplifiers as buffers on the output of amplifiers to increase the DAC's output driving capability. The high resolution current output DACs need high precision amplifiers on their output as current-to-voltage converters (I/V). Additionally, many DACs operate with a single supply of 5 V. In a single-supply application, selection of a suitable op amp may be more difficult because the output swing of the amplifier does not usually include the negative rail, in this case AGND. This can result in some degradation of the DAC's specified performance, unless the application does not use codes near zero. The selected op amp needs to have very low offset voltage--for a 14-bit DAC, the DAC LSB is 300 V with a 5 V reference--to eliminate the need for output offset trims. Input bias current should also be very low because the bias current multiplied by the DAC output impedance (about 10 k in some cases) adds to the zero-code error. Rail-to-rail input and output performance is desired. For fast settling, the slew rate of the op amp should not impede the settling time of the DAC. Output impedance of the DAC is constant and code independent, but in order to minimize gain errors, the input impedance of the output amplifier should be as high as possible. The AD862x, with a very high input impedance, IB of 1 pA, and a fast slew rate, is an ideal amplifier for these types of applications. A typical configuration with a popular DAC is shown in Figure 46. In these situations, the amplifier adds another time constant to the system, increasing the settling time of the output. The AD862x, with 5 MHz of BW, helps in achieving a faster effective settling time of the combined DAC and amplifier. In applications with full 4-quadrant multiplying capability or a bipolar output swing, the circuit in Figure 47 can be used. In this circuit, the first and second amplifiers provide a total gain of 2, which increases the output voltage span to 20 V. Biasing the external amplifier with a 10 V offset from the reference voltage results in a full 4-quadrant multiplying circuit.
5V 2.5V 10F 0.1F 0.1F 5V SERIAL INTERFACE VDD CS DIN SCLK LDAC* DGND *AD5552 ONLY AGND
03023-045
VREFF*
VREFS *
AD8627
AD5551/AD5552
OUT UNIPOLAR OUTPUT
Figure 46. Unipolar Output
10k
10k 10V VREF 5k
+13V
1/2 AD8626
VOUT
ADR01
-10V < VOUT < +10V -13V
VDD
VREFX
RFBX
ONE CHANNEL AD5544
VSS AGNDF AGNDX
1/2 AD8626
03023-046
DIGITAL INTERFACE CONNECTIONS OMITTED FOR CLARITY
Figure 47. 4-Quadrant Multiplying Application Circuit
Rev. C | Page 16 of 20
AD8625/AD8626/AD8627
EIGHT-POLE SALLEN KEY LOW-PASS FILTER
The AD862x's high input impedance and dc precision make it a great selection for active filters. Due to the very low bias current of the AD862x, high value resistors can be used to construct low frequency filters. The AD862x's picoamp-level input currents contribute minimal dc errors. Figure 49 shows an example of a 10 Hz, 8-pole Sallen Key filter constructed using the AD862x. Different numbers of the AD862x can be used depending on the desired response, which is shown in Figure 48. The high value used for R1 minimizes interaction with signal source resistance. Pole placement in this version of the filter minimizes the Q associated with the lower pole section of the filter. This eliminates any peaking of the noise contribution of resistors in the preceding sections, minimizing the inherent output voltage noise of the filter.
1.2 V4 V2 0.8
V3
VOLTAGE (V)
V1
0.4
0 0.1
1
10 FREQUENCY (Hz)
100
1k
Figure 48. Frequency Response Output at Different Stages of the Low-Pass Filter
R1 162.3k V3 VIN D C2 96.19F D R2 162.3k
C1 100F
VDD 3 2 4 U1 1 R10 V1 191.4k R5 191.4k C3 100F R11 286.5k V2 C4 69.14F D R4 25k 1/4 AD8625 R7 286.5k U3 V3 C6 30.86F D R6 25k C8 3.805F D R8 25k
03023-048
1/4 11 AD8625 VEE R3 25k
U2
C5 100F
R12 815.8k R9 815.8k
C7 100F
1/4 AD8625
U4 V4 1/4 AD8625
Figure 49. 10 Hz, 8-Pole Sallen Key Low-Pass Filter
Rev. C | Page 17 of 20
03023-047
AD8625/AD8626/AD8627 OUTLINE DIMENSIONS
2.00 BSC
8.75 (0.3445) 8.55 (0.3366)
4 5
1.25 BSC
1 2 3
2.10 BSC
4.00 (0.1575) 3.80 (0.1496)
14 1
8 7
6.20 (0.2441) 5.80 (0.2283)
PIN 1 1.00 0.90 0.70
0.65 BSC
1.10 MAX 0.22 0.08 0.30 0.15 0.10 COPLANARITY COMPLIANT TO JEDEC STANDARDS MO-203AA SEATING PLANE 8 4 0
0.25 (0.0098) 0.10 (0.0039)
1.27 (0.0500) BSC
1.75 (0.0689) 1.35 (0.0531)
0.50 (0.0197) x 45 0.25 (0.0098)
0.10 MAX
0.46 0.36 0.26
COPLANARITY 0.10
0.51 (0.0201) 0.31 (0.0122)
SEATING PLANE
8 0.25 (0.0098) 0 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 50. 5-Lead Plastic Surface-Mount Package [SC70] (KS-5) Dimensions shown in millimeters
5.00 (0.1968) 4.80 (0.1890)
8 5 4
Figure 53. 14-Lead Standard Small Outline Package [SOIC] (R-14) Dimensions shown in millimeters and (inches)
5.10 5.00 4.90
4.00 (0.1574) 3.80 (0.1497) 1
6.20 (0.2440) 5.80 (0.2284)
4.50 4.40 4.30
14
8
1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040)
1.75 (0.0688) 1.35 (0.0532)
0.50 (0.0196) x 45 0.25 (0.0099)
6.40 BSC
1 7
0.51 (0.0201) COPLANARITY SEATING 0.31 (0.0122) 0.10 PLANE
8 0.25 (0.0098) 0 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067)
PIN 1 1.05 1.00 0.80 0.65 BSC 1.20 MAX 0.15 0.05 0.30 0.19 0.20 0.09 8 0 0.75 0.60 0.45
COMPLIANT TO JEDEC STANDARDS MS-012AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
SEATING COPLANARITY PLANE 0.10
COMPLIANT TO JEDEC STANDARDS MO-153AB-1
Figure 51. 8-Lead Standard Small Outline Package [SOIC] Narrow Body (R-8) Dimensions shown in millimeters and (inches)
3.00 BSC
Figure 54. 14-Lead Thin Shrink Small Outline Package [TSSOP] (RU-14) Dimensions shown in millimeters
8
5
3.00 BSC
4
4.90 BSC
PIN 1 0.65 BSC 1.10 MAX 8 0 0.80 0.60 0.40
0.15 0.00 0.38 0.22 COPLANARITY 0.10
0.23 0.08 SEATING PLANE
COMPLIANT TO JEDEC STANDARDS MO-187AA
Figure 52. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters
Rev. C | Page 18 of 20
AD8625/AD8626/AD8627
ORDERING GUIDE
Model AD8627AKS-REEL AD8627AKS-REEL7 AD8627AKS-R2 AD8627AKSZ-REEL1 AD8627AKSZ-REEL71 AD8627AKSZ-R21 AD8627AR AD8627AR-REEL AD8627AR-REEL7 AD8627ARZ1 AD8627ARZ-REEL1 AD8627ARZ-REEL71 AD8626ARM-REEL AD8626ARM-R2 AD8626ARMZ-REEL1 AD8626ARMZ-R21 AD8626AR AD8626AR-REEL AD8626AR-REEL7 AD8626ARZ1 AD8626ARZ-REEL1 AD8626ARZ-REEL71 AD8625ARU AD8625ARU-REEL AD8625ARUZ1 AD8625ARUZ-REEL1 AD8625AR AD8625AR-REEL AD8625AR-REEL7 AD8625ARZ1 AD8625ARZ-REEL1 AD8625ARZ-REEL71 Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C Package Description 5-Lead SC70 5-Lead SC70 5-Lead SC70 5-Lead SC70 5-Lead SC70 5-Lead SC70 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 14-Lead TSSOP 14-Lead TSSOP 14-Lead TSSOP 14-Lead TSSOP 14-Lead SOIC 14-Lead SOIC 14-Lead SOIC 14-Lead SOIC 14-Lead SOIC 14-Lead SOIC Package Option KS-5 KS-5 KS-5 KS-5 KS-5 KS-5 R-8 R-8 R-8 R-8 R-8 R-8 RM-8 RM-8 RM-8 RM-8 R-8 R-8 R-8 R-8 R-8 R-8 RU-14 RU-14 RU-14 RU-14 R-14 R-14 R-14 R-14 R-14 R-14 Branding B9A B9A B9A B9A B9A B9A
BJA BJA BJA BJA
1
Z = Pb-free part.
Rev. C | Page 19 of 20
AD8625/AD8626/AD8627 NOTES
(c) 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C03023-0-11/04(C)
Rev. C | Page 20 of 20
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