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MITSUBISHI PM100CBS060 PM100CBS060 FLAT-BASE TYPE FLAT-BASE TYPE INSULATED PACKAGE INSULATED PACKAGE PM100CBS060 FEATURE a) Adopting 4th generation IGBT chip, which performance is improved by 1m fine rule process. For example, typical Vce(sat)=1.7V b) Using new Diode which is designed to get soft reverse recovery characteristics. c) Over-temperature protection by detecting Tj of the IGBT chips * 3 100A, 600V Current-sense IGBT type inverter * Monolithic gate drive & protection logic * Detection, protection & status indication circuits for overcurrent, short-circuit, over-temperature & under-voltage * Acoustic noise-less 11kW class inverter application APPLICATION Servo drives and other motor controls PACKAGE OUTLINES Dimensions in mm 7 2.54 23.79 1 120 1060.3 2.54 2.54 2.54 2.54 10.16 10.16 10.16 2.54 2.54 2.54 2.54 2.54 2.54 4 7 10 15 11 6.5 8.5 5.5 MOUNTING HOLES 50 39 R7 25 2.5 7 15 W 19 V 19 U 19 N 19 P 10 9 3 5 1 0.64 Terminal code 1. 2. 3. 4. 5. 6. 7. 8. VWPC WP VWP1 VVPC VP VVP1 VUPC UP 9. 10. 11. 12. 13. 14. 15. VUP1 VNC VN1 WN VN UN Fo 2 LABEL 30 28 6 10 Sep. 2001 MITSUBISHI PM100CBS060 FLAT-BASE TYPE INSULATED PACKAGE INTERNAL FUNCTIONS BLOCK DIAGRAM Rfo=1.5k WP Fo VNC WN VN1 VN UN VWPC VWP1 VVPC VP VVP1 VUPC UP VUP1 Rfo Gnd In Fo Vcc Gnd In Fo Vcc Gnd In Fo Vcc Gnd In Vcc Gnd In Vcc Gnd In Vcc Gnd Si Out OT Gnd Si Out OT Gnd Si Out OT Gnd Si Out OT Gnd Si Out OT Gnd Si Out OT N W V U P MAXIMUM RATINGS (Tj = 25C, unless otherwise noted) INVERTER PART Symbol VCES IC ICP PC Tj Parameter Collector-Emitter Voltage Collector Current Collector Current (Peak) Collector Dissipation Junction Temperature Conditions VD = 15V, VCIN = 15V TC = 25C TC = 25C TC = 25C Ratings 600 100 200 568 -20 ~ +150 Unit V A A W C CONTROL PART Symbol VD VCIN VFO IFO Parameter Supply Voltage Input Voltage Fault Output Supply Voltage Fault Output Current Conditions Applied between : VUP1-VUPC VVP1-VVPC, VWP1-VWPC, VN1-VNC Applied between : UP-VUPC, VP-VVPC WP-VWPC, UN * VN * WN-VNC Applied between : FO-VNC Sink current at FO terminal Ratings 20 20 VD+0.5 20 Unit V V V mA Sep. 2001 MITSUBISHI PM100CBS060 FLAT-BASE TYPE INSULATED PACKAGE TOTAL SYSTEM Parameter Supply Voltage Protected by VCC(PROT) OC & SC VCC(surge) Supply Voltage (Surge) Module Case Operating TC Temperature Storage Temperature Tstg Viso Isolation Voltage Symbol Conditions VD = 13.5 ~ 16.5V, Inverter Part, Tj = 125C Start Applied between : P-N, Surge value (Note-1) Ratings 400 500 -20 ~ +110 -40 ~ +125 60Hz, Sinusoidal Charged part to Base, AC 1 min. 2500 Unit V V C C Vrms (Note-1) Tc(under the chip) measurement point is below. (Unit : mm) Arm Axis X Y IGBT 83.3 4.9 UP FWDi 83.3 -4.8 IGBT 41.8 4.9 VP FWDi 41.8 -4.8 IGBT 16.8 4.9 WP FWDi 16.8 -4.8 IGBT 70.8 -1.2 UN FWDi 70.8 -10.8 IGBT 54.3 -1.2 VN FWDi 54.3 -10.8 IGBT 29.3 -1.2 WN FWDi 29.3 -10.8 Y Bottom view X -Y P N U V W THERMAL RESISTANCES Symbol Rth(j-c')Q Rth(j-c')F Rth(c-f) Parameter Junction to case Thermal Resistances Test Conditions Tc measured point is just under the chips Inverter IGBT part (per 1/6 module) Tc measured point is just under the chips Inverter FWDi part (per 1/6 module) Case to fin, (per 1 module) Thermal grease applied Min. -- -- -- Limits Typ. -- -- -- Max. 0.22* 0.36* 0.046 Unit C/W C/W C/W Contact Thermal Resistance *: If you use this value, Rth(f-a) should be measured just under the chips. ELECTRICAL CHARACTERISTICS (Tj = 25C, unless otherwise noted) INVERTER PART Symbol VCE(sat) VEC ton trr tc(on) toff tc(off) ICES Parameter Collector-Emitter Saturation Voltage FWDi Forward Voltage Test Conditions VD = 15V, IC = 100A Tj = 25C (Fig. 1) Tj = 125C VCIN = 0V, Pulsed -IC = 100A, VD = 15V, VCIN = 15V VD = 15V, VCIN = 15V0V VCC = 300V, IC = 100A Tj = 125C Inductive Load VCE = VCES, VD = 15V (Fig. 4) Tj = 25C Tj = 125C Min. -- -- -- 0.8 -- -- -- -- -- -- Limits Typ. 1.7 1.7 2.2 1.2 0.15 0.4 2.4 0.5 -- -- Max. 2.3 2.3 3.3 2.4 0.3 1.0 3.3 1.0 1 10 Unit V V s s s s s mA (Fig. 2) Switching Time (Fig. 3) Collector-Emitter Cutoff Current Sep. 2001 MITSUBISHI PM100CBS060 FLAT-BASE TYPE INSULATED PACKAGE CONTROL PART Symbol ID Vth(ON) Vth(OFF) OC Parameter Circuit Current Input ON Threshold Voltage Input OFF Threshold Voltage Over Current Trip Level Short Circuit Trip Level Over Current Delay Time Over Temperature protection Supply Circuit Under-Voltage Protection Fault Output Current Minimum Fault Output Pulse Width output output output output Test Conditions VD = 15V, VCIN = 15V VN1-VNC VXP1-VXPC Min. -- -- 1.2 1.7 -- 220 158 -- (Fig. 5,6) Trip level Reset level Trip level Reset level (Note-2) (Note-2) -- 135 -- 11.5 -- -- -- 1.0 Limits Typ. 40 13 1.5 2.0 -- 290 -- 360 10 145 125 12.0 12.5 -- 10 1.8 Max. 60 18 1.8 2.3 470 390 -- -- -- 155 -- 12.5 -- 0.01 15 -- Unit mA V V A Applied between : UP-VUPC, VP-VVPC, WP-VWPC UN * VN * WN-VNC Tj = -20C VD = 15V (Fig. 5,6) Tj = 25C Tj = 125C -20 Tj 125C, VD = 15V (Fig. 5,6) VD = 15V Detect Tj of IGBT chip -20 Tj 125C VD = 15V, VFO = 15V VD = 15V SC toff(OC) OT OTr UV UVr IFO(H) IFO(L) tFO A s C C V V mA mA ms (Note-2) Fault Fault Fault Fault is given only when the internal OC, SC, OT & UV protection. of OC, SC, OT & UV protection operate by lower arm. of OC, SC protection given pulse. of OT, UV protection given pulse while over trip level. MECHANICAL RATINGS AND CHARACTERISTICS Symbol -- -- -- Parameter Mounting torque Mounting torque Weight Main terminal Mounting part -- Test Conditions screw : M5 screw : M5 Min. 2.5 2.5 -- Limits Typ. 3.0 3.0 400 Max. 3.5 3.5 -- Unit N*m N*m g RECOMMENDED CONDITIONS FOR USE Symbol VCC VD VCIN(ON) VCIN(OFF) fPWM tdead Parameter Supply Voltage Control Supply Voltage Input ON Voltage Input OFF Voltage PWM Input Frequency Arm Shoot-through Blocking Time Test Conditions Applied across P-N terminals Applied between : VUP1-VUPC, VVP1-VVPC VWP1-VWPC, VN1-VNC (Note-3) Applied between : UP-VUPC, VP-VVPC, WP-VWPC UN * VN * WN-VNC Using Application Circuit of Fig.8 For IPM's each input signals (Fig. 7) Recommended value 400 15.0 1.5 0.8 4.0 20 2.5 Unit V V V V kHz s (Note-3) With ripple satisfying the following conditions dv/dt swing 5V/s, Variation 2V peak to peak Sep. 2001 MITSUBISHI PM100CBS060 FLAT-BASE TYPE INSULATED PACKAGE PRECAUTIONS FOR TESTING 1. Before appling any control supply voltage (VD), the input terminals should be pulled up by resistores, etc. to their corresponding supply voltage and each input signal should be kept off state. After this, the specified ON and OFF level setting for each input signal should be done. 2. When performing "OC" and "SC" tests, the turn-off surge voltage spike at the corresponding protection operation should not be allowed to rise above VCES rating of the device. (These test should not be done by using a curve tracer or its equivalent.) P, (U,V,W) IN (Fo) IN (Fo) P, (U,V,W) VCIN (0V) V Ic VCIN (15V) V -Ic VD (all) U,V,W, (N) VD (all) U,V,W, (N) Fig. 1 VCE(sat) Test a) Lower Arm Switching VCIN (15V) VCIN Signal input (Upper Arm) Signal input (Lower Arm) Fo Fig. 2 VEC Test P trr U,V,W Irr CS VCE Ic 90% Vcc 90% N VD (all) b) Upper Arm Switching VCIN Signal input (Upper Arm) Signal input (Lower Arm) Fo Ic P 10% 10% tc (on) 10% tc (off) 10% U,V,W VCIN CS Vcc td (on) tr td (off) tf VCIN (15V) (ton= td (on) + tr) N (toff= td (off) + tf) VD (all) Ic Fig. 3 Switching time Test circuit and waveform P, (U,V,W) A IN (Fo) VCIN Pulse VCE VCIN (15V) Over Current VD (all) U,V,W, (N) IC toff (OC) Constant Current OC Fig. 4 ICES Test P, (U,V,W) IN (Fo) Short Circuit Current VCC IC Constant Current SC VCIN VD (all) U,V,W, (N) IC Fig. 5 OC and SC Test Fig. 6 OC and SC Test waveform VCINP 0V VCINN 0V t t tdead tdead tdead Fig. 7 Dead time measurement point example Sep. 2001 MITSUBISHI PM100CBS060 FLAT-BASE TYPE INSULATED PACKAGE P 20k 10 VUP1 Vcc VD IF UP VUPC 0.1 OT OUT Si U In GND GND Vcc OT OUT Si + - VVP1 VD VP VVPC VWP1 In GND GND Vcc OT OUT Si V M VD 20k WP VWPC In GND GND Vcc Fo OT OUT Si W IF 10 UN 0.1 In GND GND N OT 20k IF 10 Vcc VN Fo In OUT Si 0.1 20k GND GND VN1 10 Vcc Fo In OT OUT Si VD IF WN 0.1 VNC GND GND 5V 1k Fo Rfo : Interface which is the same as the U-phase Fig. 8 Application Example Circuit NOTES FOR STABLE AND SAFE OPERATION ; Design the PCB pattern to minimize wiring length between opto-coupler and IPM's input terminal, and also to minimize the stray capacity between the input and output wirings of opto-coupler. Connect low impedance capacitor between the Vcc and GND terminal of each fast switching opto-coupler. Fast switching opto-couplers : tPLH, tPHL 0.8s, Use High CMR type. Slow switching opto-coupler : CTR > 100% Use 4 isolated control power supplies (VD). Also, care should be taken to minimize the instantaneous voltage charge of the power supply. Make inductance of DC bus line as small as possible, and minimize surge voltage using snubber capacitor between P and N terminal. Use line noise filter capacitor (ex. 4.7nF) between each input AC line and ground to reject common-mode noise from AC line and improve noise immunity of the system. * * * * * * * Sep. 2001 |
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