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DATA SHEET
SAA8112HL Digital camera signal processor and microcontroller
Product specification Supersedes data of 1999 Oct 28 File under Integrated Circuits, IC22 2000 Jan 18
Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
CONTENTS 1 2 3 4 5 6 7 8 8.1 8.2 8.3 8.4 8.4.1 8.5 8.5.1 8.5.2 8.6 8.7 8.8 8.9 8.10 8.11 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 15.5 16 17 18 FEATURES APPLICATIONS GENERAL DESCRIPTION QUICK REFERENCE DATA ORDERING INFORMATION BLOCK DIAGRAM PINNING FUNCTIONAL DESCRIPTION Synchronization and video windows Optical black processing Colour extractor Colour matrix RGB processing YUV processing Y processing UV processing Output formatter Measurement Engine Display features Microcontroller Mode control SNERT (UART) interface - DSP registers LIMITING VALUES THERMAL CHARACTERISTICS OPERATING CHARACTERISTICS ELECTRICAL CHARACTERISTICS APPLICATION INFORMATION PACKAGE OUTLINE SOLDERING Introduction to soldering surface mount packages Reflow soldering Wave soldering Manual soldering Suitability of surface mount IC packages for wave and reflow soldering methods DEFINITIONS LIFE SUPPORT APPLICATIONS PURCHASE OF PHILIPS I2C COMPONENTS
SAA8112HL
2000 Jan 18
2
Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
1 FEATURES
SAA8112HL
* High precision digital processing with 8- to 10-bit input * Embedded microcontroller (80C51 core based) for control loops Auto Optical Black (AOB), Auto White Balance (AWB) and Auto Exposure (AE) * Supports a large number of sensors * RGB Bayer or mosaic (yellow, magenta, green and cyan) colour processing * Black and white processing without loss of resolution * Compatible with interlaced or progressive modes * Processes up to 800 active pixels per line * Optical black processing * Programmable colour matrix * Programmable R, G and B offsets * Programmable Knee and Gamma correction * Programmable edge enhancement * False colour detection and correction * Y and UV adjustable coring filters * Flexible Measurement Engine (ME) with up to 16 measurements per frame in 16 programmable windows * Programmable measurement conditions on Y, U and V * 8-bit YUV output with selectable formats: - YUV 4 : 2 : 2 CCIR656 with signal embedded synchronization codes (SAV/EAV) - Selectable YUV output format 4 : 0 : 0, 4 : 1 : 1, 4 : 2 : 2 and 4 : 4 : 4 (according to IEEE-1394 based digital camera specification) - Basic output window cutter and scaler. * Programmable output clock for switched mode power supply * 3-wire/13-bit interface for control of the TDA878X family (CDS + AGS + 10-bit ADC). 2 APPLICATIONS 3 GENERAL DESCRIPTION
The SAA8112HL is a powerful and versatile 10-bit digital processor for video cameras. It processes the digitized sensor data and converts it to a high quality, multi-format and YUV digital signal. In addition, the SAA8112HL performs programmable statistical measurements on the video stream allowing, for instance, a precise measurement of the exposure or the white balance levels. An 80C51 microcontroller derivative with five I/O ports, I2C-bus, 512 bytes of RAM and 32 kbytes of program memory is also embedded in the SAA8112HL. The microcontroller is used in combination with the Digital Signal Processing (DSP) measurement capabilities to provide advanced AE, AWB and AOB. The microcontroller may also be used to control other devices in the camera, for example a USB or a 1394 interface. In the following description of the SAA8112HL, four main functional blocks are given (see Fig.1): * The DSP block * The DSP ME block * The microcontroller block * The timing, interface and miscellaneous functions block.
* PC camera * Videophone * Security camera * Camcorder.
2000 Jan 18
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Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
SAA8112HL
4 QUICK REFERENCE DATA Measured over full voltage and temperature range: VDDD = 3.3 V 10%; Tamb = 0 to 70 C; unless otherwise stated. SYMBOL VDDD IDDD(tot) VI VO fclk(px) fclk(c) Ptot Tstg Tamb Tj 5 PARAMETER digital supply voltage total supply current input voltage output voltage pixel frequency microcontroller clock frequency total power dissipation storage temperature ambient temperature junction temperature ORDERING INFORMATION TYPE NUMBER SAA8112HL PACKAGE NAME LQFP100 DESCRIPTION plastic low profile quad flat package; 100 leads; body 14 x 14 x 1.4 mm VERSION SOT407-1 Tamb = 70 C VDDD = 3.6 V Tamb = 70 C VDDD = 3.6 V Tamb = 70 C 3.0 V < VDDD < 3.6 V 3.0 V < VDDD < 3.6 V 0 0 - -55 0 - CONDITIONS MIN. 3.0 - TYP. 3.3 - MAX. 3.6 80 UNIT V mA V V MHz MHz mW C C C
low voltage TTL compatible low voltage TTL compatible 14.18 12 - - 25 - 25 - 288 +150 70 125
2000 Jan 18
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andbook, full pagewidth
2000 Jan 18
CCD9 to CCD0 5 to 14 SDATA SCLK STROBE SMP 17 to 19, 2
6
Philips Semiconductors
Digital camera signal processor and microcontroller
BLOCK DIAGRAM
VDDD1 to VDDD4 1, 3, 16, 68 4
VDD1 to VDD5 78, 87, 94, 37, 47
DGND1 to DGND4
GND1 to GND5 80, 86, 92, 38, 48 79, 77 to 75 4 DISPLAY UV-PROCESSING DIGOUT 81 to 84 88 to 91 8 LLC, HREF, VS, PXQ YUV7 to YUV0
100, 4, 15, 67 4 5
5
10
Y-PROCESSING OFFSET PREPROCESSING RGB SEPARATION (incl. LMs) RGB PROCESSING RGB to YUV
MEASUREMENT ENGINE MISCELLANEOUS FUNCTIONS INTERNAL WINDOW TIMING AND CONTROL
SAA8112HL
39 to 46 8 50 P0.7 to P0.0 ALE
4
5
HD VD FI 95 to 97 3 SNERT INTERFACE CLK1 CLK2 M DSPRST 99, 93 2 85, 98 2 73 SNDA 2 SNCL, SNRES
P0 VH REFERENCE TIMING P3 5 3
49 29 to 33 P2
PSEN P2.7 to P2.3 P2.2 to P2.0 P1.7/SDA P1.6/SCL P1.5 to P1.0
MICROCONTROLLER 80C51 P1 P4
34 to 36 20 21 22 to 27
6 3 28 EA 69 to 71
FCE338
2 57, 58
4 53 to 56
2 51, 52
8 59 to 66 P4.7 to P4.0
72, 74
SAA8112HL
Product specification
P3.1/ TXD P3.5/ T1 P3.7/RD P3.0/ RXD P3.4/ T0 P3.6/WR P3.3/INT1 P3.2/INT0
UCCLK UCM UCRST
Fig.1 Block diagram.
Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
7 PINNING SYMBOL VDDD1 SMP VDDD2 DGND2 CCD9 CCD8 CCD7 CCD6 CCD5 CCD4 CCD3 CCD2 CCD1 CCD0 DGND3 VDDD3 SCLK SDATA STROBE P1.7/SDA P1.6/SCL P1.5 P1.4 P1.3 P1.2 P1.1 P1.0 EA P2.7 P2.6 P2.5 P2.4 P2.3 P2.2 P2.1 P2.0 VDD4 GND4 P0.7 P0.6 2000 Jan 18 PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 I/O P O P P I I I I I I I I I I P P O O O I/O I/O I/O I/O I/O I/O I/O I/O I O O O O O I/O I/O I/O P P I/O I/O DESCRIPTION
SAA8112HL
digital supply voltage 1 for the DSP core (switchable supply domain) switched mode pulse for DC-to-DC power supply digital supply voltage 2 for input buffers and predrivers digital ground 2 for input buffers and predrivers and for the digital core (preprocessed) AD-converted CCD; bit 9 (preprocessed) AD-converted CCD; bit 8 (preprocessed) AD-converted CCD; bit 7 (preprocessed) AD-converted CCD; bit 6 (preprocessed) AD-converted CCD; bit 5 (preprocessed) AD-converted CCD; bit 4 (preprocessed) AD-converted CCD; bit 3 (preprocessed) AD-converted CCD; bit 2 (preprocessed) AD-converted CCD; bit 1 (preprocessed) AD-converted CCD; bit 0 digital ground 3 for input buffers and predrivers and for the digital core digital supply voltage 3 for input buffers and predrivers and for the 80C51 core serial clock output to preprocessor serial data output to preprocessor strobe signal to preprocessor Port 1 bidirectional; bit 7/slave I2C-bus data I/O Port 1 bidirectional; bit 6/slave I2C-bus clock input Port 1 bidirectional; bit 5 Port 1 bidirectional; bit 4 Port 1 bidirectional; bit 3 Port 1 bidirectional; bit 2 Port 1 bidirectional; bit 1 Port 1 bidirectional; bit 0 external access select - internal or external program memory (active LOW) Port 2 output; bit 7 Port 2 output; bit 6 Port 2 output; bit 5 Port 2 output; bit 4 Port 2 output; bit 3 Port 2 bidirectional; bit 2 Port 2 bidirectional; bit 1 Port 2 bidirectional; bit 0 supply voltage 4 for output buffers ground 4 for output buffers Port 0 bidirectional; bit 7 Port 0 bidirectional; bit 6 6
Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
SYMBOL P0.5 P0.4 P0.3 P0.2 P0.1 P0.0 VDD5 GND5 PSEN ALE P3.7/RD P3.6/WR P3.5/T1 P3.4/T0 P3.3/INT1 P3.2/INT0 P3.1/TXD P3.0/RXD P4.7 P4.6 P4.5 P4.4 P4.3 P4.2 P4.1 P4.0 DGND4 VDDD4 UCCLK UCM UCRST SNCL SNDA SNRES PXQ VS HREF VDD1 LLC GND1 YUV7 2000 Jan 18 PIN 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 I/O I/O I/O I/O I/O I/O I/O P P O O O O I I I I I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O P P I I I I I/O I O O O P O P O Port 0 bidirectional; bit 5 Port 0 bidirectional; bit 4 Port 0 bidirectional; bit 3 Port 0 bidirectional; bit 2 Port 0 bidirectional; bit 1 Port 0 bidirectional; bit 0 supply voltage 5 for output buffers ground 5 for output buffers program store enable output for external memory (active LOW) address latch enable output for external latch DESCRIPTION
SAA8112HL
Port 3 output; bit 7/external data memory read output (active LOW) Port 3 output; bit 6/external data memory write output (active LOW) Port 3 input; bit 5/Timer 1 external input Port 3 input; bit 4/Timer 0 external input Port 3 input; bit 3/external interrupt 1 Port 3 input; bit 2/external interrupt 0 Port 3 input; bit 1/serial output port (UART) Port 3 input; bit 0/serial input port (UART) Port 4 bidirectional; bit 7 Port 4 bidirectional; bit 6 Port 4 bidirectional; bit 5 Port 4 bidirectional; bit 4 Port 4 bidirectional; bit 3 Port 4 bidirectional; bit 2 Port 4 bidirectional; bit 1 Port 4 bidirectional; bit 0 digital ground 4 for input buffers and predrivers and to the digital core digital voltage 4 for input buffers and predrivers and to the digital core clock for internal 80C51 (test) mode control signal for internal 80C51 Power-on reset for internal 80C51 clock for DSP-SNERT interface (UART mode 0) data I/O for DSP-SNERT interface (UART mode 0) reset for DSP-SNERT interface (UART mode 0) pixel qualifier output for YUV-port vertical synchronization output for YUV-port horizontal reference output for YUV-port supply voltage 1 for output buffers line-locked clock (delayed CLK2) for YUV-port ground 1 for output buffers multiplexed YUV; bit 7 7
Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
SYMBOL YUV6 YUV5 YUV4 M GND2 VDD2 YUV3 YUV2 YUV1 YUV0 GND3 CLK2 VDD3 HD VD FI DSPRST CLK1 DGND1 PIN 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 I/O O O O I P P O O O O P I P I I I I I P multiplexed YUV; bit 6 multiplexed YUV; bit 5 multiplexed YUV; bit 4 (test) mode control signal for DSP core ground 2 for output buffers supply voltage 2 for output buffers multiplexed YUV; bit 3 multiplexed YUV; bit 2 multiplexed YUV; bit 1 multiplexed YUV; bit 0 ground 3 for output buffers double pixel clock input supply voltage 3 for output buffers horizontal definition input vertical definition input field identification input Power-on reset for DSP pixel clock input DESCRIPTION
SAA8112HL
digital ground 1 for input buffers and predrivers and for the digital core
2000 Jan 18
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Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
SAA8112HL
100 DGND1
handbook, full pagewidth
98 DSPRST
92 GND3
86 GND2
80 GND1
77 HREF
94 VDD3
87 VDD2
78 VDD1
91 YUV0
90 YUV1
89 YUV2
88 YUV3
84 YUV4
83 YUV5
82 YUV6
81 YUV7
99 CLK1
93 CLK2
79 LLC
95 HD
96 VD
VDDD1 SMP VDDD2 DGND2 CCD9 CCD8 CCD7 CCD6 CCD5
76 VS
97 FI
85 M
1 2 3 4 5 6 7 8 9
75 PXQ 74 SNRES 73 SNDA 72 SNCL 71 UCRST 70 UCM 69 UCCLK 68 VDDD4 67 DGND4 66 P4.0 65 P4.1 64 P4.2
CCD4 10 CCD3 11 CCD2 12 CCD1 13 CCD0 14 DGND3 15 VDDD3 16 SCLK 17 SDATA 18 STROBE 19 P1.7/SDA 20 P1.6/SCL 21 P1.5 22 P1.4 23 P1.3 24 P1.2 25
P1.1 26 P1.0 27 EA 28 P2.7 29 P2.6 30 P2.5 31 P2.4 32 P2.3 33 P2.2 34 P2.1 35 P2.0 36 VDD4 37 GND4 38 P0.7 39 P0.6 40 P0.5 41 P0.4 42 P0.3 43 P0.2 44 P0.1 45 P0.0 46 VDD5 47 GND5 48 49 ALE 50
SAA8112HL
63 P4.3 62 P4.4 61 P4.5 60 P4.6 59 P4.7 58 P3.0/RXD 57 P3.1/TXD 56 P3.2/INT0 55 P3.3/INT1 54 P3.4/T0 53 P3.5/T1 52 P3.6/WR 51 P3.7/RD
FCE339
Fig.2 Pin configuration.
2000 Jan 18
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PSEN
Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
8 FUNCTIONAL DESCRIPTION
SAA8112HL
Several registers allow the definition of the optical black window, the active video input window, the active video output window and the measurement windows. With interlaced applications, the windows are defined separately for the odd and the even fields. The number of active pixels per line is limited to 800, although the total number of pixels can be higher. There is no size limitation in the vertical direction. 8.2 Optical black processing
The SAA8112HL DSP block has a very high level of programmability. The DSP alone uses 95 (8-bit) registers (more registers are used for the ME). The SAA8112HL can accept 8- to 10-bit digital data from various sensors: CCD or CMOS, progressive or interlaced, with or without colour filters (see Table 1). With B and W sensors, the full resolution is preserved. The DSP registers are accessed through a serial interface (UART). 8.1 Synchronization and video windows
To work properly, the SAA8112HL needs four or five input synchronization signals: * CLK1 (pixel clock) * CLK2 (2 times the pixel clock) * HD (horizontal reference) * VD (vertical reference) * FI (Field ID, useless for progressive scanning). The incoming CCD data is sampled on the rising edge of CLK1. The phase difference between CLK1 and CLK2 must be fixed. The DSP working areas can be programmed and defined with reference to the rising edges of HD and VD.
The first processing block of the SAA8112HL is a digital clamp (denoted as OFFSET PRE_PROCESSING in Fig.1). It is used to align the optical black level to zero or to any arbitrary value. When the digital clamp is set active, the average value of the black is measured in the programmable optical black window and then subtracted from the input signal. A separate measurement is done for odd and even pixels and for odd and even frames. When the digital clamp is set inactive, it is possible to subtract a fixed value from the incoming data stream. A different value can be programmed for odd/even pixels, odd/even fields and odd/even lines. The optical black window has a fixed size of 16 pixels (horizontally) by 128 (vertically), although the position of this window is fully programmable.
Table 1
Typical SAA8112HL compatible sensors BRAND SONY PANASONIC SHARP ICX084 and ICX098 MN3777 LZ24BP ICX058, ICX059, ICX068, ICX069, ICX208 and ICX209 LZ2453 and LZ2463 ICX054, ICX086 and ICX206 LZ2413 and LZ2423 TCM5391AP MN37210FP LZ244D and LZ2547 PART NUMBER
SENSOR TYPE VGA
HR MR
SONY SHARP SONY SHARP TOSHIBA PANASONIC
CIF Other sensors
SHARP
All sensors that fulfil the following criteria: * B and W; complementary mosaic or RGB Bayer colour filter * 8-, 9- or 10-bit input * Up to 800 active pixels per line * CMOS or CCD sensors * Interlaced; progressive and non-interlaced sensors.
2000 Jan 18
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Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
8.3 Colour extractor
SAA8112HL
With RGB Bayer sensors, an RGB triplet is interpolated for every pixel on a 3 x 3 neighbourhood matrix. With B and W sensors, the colour extractor can be disabled, thus maintaining the full sensor resolution. Edges and video level information (white clip) are extracted at this stage (see Fig.3).
The SAA8112HL colour extractor (denoted as RGB SEPARATION in Fig.1) can be programmed to work with both mosaic (yellow, magenta, green and cyan) and RGB Bayer colour sensors. With mosaic sensors, a combination (either sum or subtraction) of consecutive pixels is used to extract a Y, (2R-G) and (2B-G) triplet for all pixels.
handbook, full pagewidth
LINE MEMORY RGB COLOUR SEPARATION
R G B
LINE MEMORY CCD inputs
White clip 10
FCE340
Edges
Fig.3 RGB separation diagram.
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Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
8.4 Colour matrix
SAA8112HL
* A black offset (positive or negative) correction can be applied independently on each of the R, G and B signals * A Knee function with adjustable gain and threshold can be applied to the signal to compress the highlights * Finally, a Gamma function is applied; the Gamma curve is adjustable. The same Knee and Gamma functions are applied on the three R, G and B signals.
A programmable 3 x 3 colour matrix (see Fig.4) is used to convert the extracted colour information, either Y, (2R-G), (2B-G) or R, G and B from the sensor colour space into a standard RGB colour space. With B and W sensors, a unity matrix is used. 8.4.1 RGB PROCESSING
At the colour matrix output, the video signal is in RGB format. The following processing is applied on the RGB signals in this order: * The gain of the red and blue streams can be changed to control the white balance
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Rgain R or (2R-G)
x
COLOUR MATRIX Bgain
Rblack
+ + +
R KNEE GAMMA G
Gblack G or Y
B or (2B-G)
x
Bblack B
FCE341
Fig.4 RGB processing diagram.
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Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
8.5 YUV processing
SAA8112HL
The edge enhancement feature is very flexible. First, it is possible to adjust the bandwidth and the level of the edge detection. Secondly, the amount of edge enhancement can be independently adjusted for the horizontal or vertical edge or for the high or low frequency edges. The edge detection is also used for the false colour correction. The noise reduction on the luminance signal is done by a coring filter. The amount of coring is adjustable.
Following the RGB processing, the R, G and B signals are converted to YUV 4 : 2 : 2 by a fixed matrix (see Fig.5). Then, the luminance and chrominance signals are processed separately. 8.5.1 Y PROCESSING
The luminance processing consists of edge enhancement and noise reduction (see Fig.5).
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R CONVERSION MATRIX
Y
G
B
DOWNSAMPLING AND MUX
FCE342
UV
Fig.5 RGB to YUV conversion.
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Edges
EDGE PROCESSING AND FALSE COLOUR DETECTION Ygain
false colour
Y
+
NOISE REDUCTION
x
Y
FCE343
Fig.6 Y processing.
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Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
8.5.2 UV PROCESSING
SAA8112HL
The YUV processing block is terminated by three separate gain controls on the Y, U and V signals. These gains can be used to fine tune the Y, U and V colour balance and also to adjust the luminance and saturation without impacting the AE and AWB control loops.
The chrominance processing consists of noise reduction and colour error correction (see Fig.7). Symmetrical processing is done on the two chrominance signals. The noise reduction is done by an adjustable coring filter. The edge detection and the luminance level are used to reduce the colour errors caused by high exposure or sharp colour transitions. It is possible to adjust the number of pixels on which the correction is applied. With the sharp colour transition, the colour signal is filtered. With over exposure, the colour signal is cancelled.
handbook, full pagewidth
UV
NOISE REDUCTION
FALSE COLOUR CORRECTION
UV GAIN CONTROL
FCE344
UV
Fig.7 UV processing.
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Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
8.6 Output formatter
SAA8112HL
The SAA8112HL output formatter also features an IEEE1394 mode, which helps to support applications defined around the "1394-based Digital Camera Specification" of the IEEE1394 trade association. In this case, the HREF, VS and PXQ signals are designed to help to packetize the video according to the following mode of the "1394-based Digital Camera Specification": * Format_0 (VGA), mode_0: 160 x 120 YUV(4 : 4 : 4); 24 bits/pixel * Format_0 (VGA), mode_1: 320 x 240 YUV(4 : 2 : 2); 16 bits/pixel * Format_0 (VGA), mode_2: 640 x 480 YUV(4 : 1 : 1); 12 bits/pixel * Format_0 (VGA), mode_3: 640 x 480 YUV(4 : 2 : 2); 16 bits/pixel * Format_0 (VGA), mode_5: 640 x 480 Y (B and W); 8 bits/pixel. For mode_0 and mode_2, the YUV 4 : 2 : 2 output is filtered to obtain 4 : 1 : 1 or 4 : 4 : 4. With the IEEE1394 mode, the definition of the output synchronization pulses is changed as described below: * HREF goes high during the first valid byte of a packet; it is low elsewhere * VS can be programmed in length and position; this pulse can be used to set the SY field of the 1394 header to 1 for the first isochronous packet of a frame * PXQ goes high during the valid Y, U or V data * LLC remains the output clock and is synchronized with the data output.
The last processing block of the SAA8112HL (denoted as DIGOUT in Fig.1) is a flexible output formatter, which performs two main tasks (see Table 2): * Scaling * Synchronization generation. A scaler can be used to divide the horizontal or vertical resolution by two or four (high quality FIR filters are used to avoid artifacts). Also, a CIF (352 x 288) cut can be made from a VGA sensor. If not used, the scaler can be bypassed. The output format is usually YUV 4 : 2 : 2. The YUV samples are multiplexed on a single 8-bit output port. The output data is in synchronization with the output clock (LLC). The output data rate is twice the pixel frequency. Synchronization codes SAV and EAV are inserted before and after the active line, as described in CCIR/ITU656. In addition, three other synchronization signals are available: * HREF: Horizontal reference. This pulse usually goes high with the first active data and goes low after the last active data. HREF does not usually include the SAV and EAV codes. To accommodate various sensor sizes, the start and stop positions of HREF are programmable. * VS: vertical synchronization. * PXQ: pixel qualifier; this pulse goes high with every valid pixel, including the SAV/EAV codes. It goes low when there are invalid pixels in a line, for example, when the scaler is used. Table 2 Typical cutter and scaler modes OUTPUT FORMAT SIF 320 x 240 QSIF 160 x 120 High Resolution CIF 352 x 288 QCIF 176 x 144
SENSOR TYPE VGA
CUTTER/SCALER MODES scaled half horizontally and vertically scaled quarter horizontally and vertically scaled half horizontally and vertically cut scaled quarter horizontally and vertically cut cut then scaled half horizontally and vertically
CIF Note
QCIF 176 x 144
scaled half horizontally and vertically
1. With the HR sensor, the active area before scaling is 704 x 576 (PAL) or 704 x 486 (NTSC). Therefore, the formats generated by the scaler are: CIF 352 x 288 (PAL), 325 x 243 (NTSC) and QCIF 176 x 144 (PAL and NTSC).
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Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
8.7 Measurement Engine
SAA8112HL
A memory area of the SAA8112HL, called RAM workspace, is used to handle the ME operations. In addition to the ME, a highlight counter is available, which counts the number of pixels above a programmable threshold. The highlight counter is usually used for exposure control. 8.8 Display features
The ME extracts statistical information from the video stream. These measurements are used to automatically control the white balance and the exposure. They can also be used for other purposes, such as colour detection. The measurements are performed on pre-formatted Y, U and V streams (see Fig.5). It is possible to measure the accumulated value of the Y, U or V samples in any of 16 programmable windows. It is also possible to measure the accumulated value of the Y signal below a threshold or the number of Y samples above a threshold. Moreover, it is possible to only accumulate U and V values for which programmable conditions on Y, U and V are fulfilled. The ME does up to 16 statistic measurements per frame (8 per field). Each measurement can be done on any of the pre-formatted signals and on any of the programmable windows.
The SAA8112HL also offers the possibility of visualizing selected zones of interests or selected pixels. The visualization is done either by contrast reduction for the selected pixels or by constant level insertion.
handbook, full pagewidth
CCD9 to CCD0
SAA8112HL PROCESSING YAWB UAWB VAWB YAE
YUV output
MEASUREMENT ENGINE
ACCUMULATOR A
ACCUMULATOR B
RAM WORKSPACE
SNERT INTERFACE
FCE345
Microcontroller (80C51)
Fig.8 Measurement Engine.
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Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
8.9 Microcontroller * 32 kbyte internal ROM * 512 byte RAM
SAA8112HL
The microcontroller includes the following features:
The embedded microcontroller is basically a 80C654 core (80C51 family) with five ports. Its functionality is standard, except that the ports are dedicated inputs, outputs or I/O ports (see Chapter 7). Ports P0 and P2 are available for connection to an emulator or to an external program PROM. The microcontroller can control the AE and the AWB loops and can download the settings for the DSP registers from an optional EEPROM at power-up or reset, for instance. Table 3 SFR NAME B ACC SIDAT SISTA PSW P4 IP P3 IE P2 SBUF SCON P1 TH1 TH0 TL1 TL0 TMOD TCON PCON DPH DPLl SP P0 80C51 Special Function Registers DESCRIPTION B register accumulator serial interface data serial interface status program status word Port 4 interrupt priority Port 3 interrupt enable Port 2 serial data buffer serial controller Port 1 timer high 1 timer high 0 timer low 1 timer low 0 timer mode timer control power control data pointer high data pointer low stack pointer Port 0 SFR ADD F0H E0H DBH DAH D9H D8H D0H C0H B8H B0H A8H A0H 99H 98H 90H 8DH 8CH 8BH 8AH 89H 88H 87H 83H 82H 81H 80H DATA BIT 7 B7 ACC7 SA6 SD7 ST7 CR2 CY P4.7 - RD EA AD15 - SM0 SDA - - - - GATE TF1 - - - SP7 AD7
* Hardware I2C-bus interface: P1.7 and P1.6 * Hardware UART interface: P3.0 and P3.1 * Power-down mode * Two timers * P4 is an open-drain port * P0, P1, P2 and P3 are pull-up ports.
DATA BIT 6 B6 ACC6 SA5 SD6 ST6 ENS1 AC P4.6 IP6 WR IE6 AD14 - SM1 SCL - - - - C/T TR1 - - - SP6 AD6
DATA BIT 5 B5 ACC5 SA4 SD5 ST5 STA F0 P4.5 IP5 T1 IE5 AD13 - SM2 P1.5 - - - - M1 TF0 - - - SP5 AD5
DATA BIT 4 B4 ACC4 SA3 SD4 ST4 STO RS1 P4.4 IP4 T0 IE4 AD12 - REN P1.4 - - - - M0 TR0 - - - SP4 AD4
DATA BIT 3 B3 ACC3 SA2 SD3 ST3 SI RS0 P4.3 PT1 INT1 ET1 AD11 - TB8 P1.3 - - - - GATE IE1 - - - SP3 AD3
DATA BIT 2 B2 ACC2 SA1 SD2 0 AA OV P4.2 PX1 INT0 EX1 AD10 - RB8 P1.2 - - - - C/T IT1 - - - SP2 AD2
DATA BIT 1 B1 ACC1 SA0 SD1 0 CR1 - P4.1 PT0 TXD ET0 AD9 - T1 P1.1 - - - - M1 IE0 PD - - SP1 AD1
DATA BIT 0 B0 ACC0 GC SD0 0 CR0 P P4.0 PX0 RXD EX0 AD8 - R1 P1.0 - - - - M0 IT0 IDL - - SP0 AD0
SIADR serial interface address
SICON serial interface control
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Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
8.10 Mode control 8.11
SAA8112HL
SNERT (UART) interface - DSP registers
Two pins are dedicated to control the operational modes of the SAA8112HL: pin M for the DSP and pin UCM for the microcontroller (see Table 4). They are independent of each other. Table 4 M 0 1 0 0 Table 5 ADDR 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 Mode control UCM 0 0 0 1 DSP test mode microcontroller application mode microcontroller test mode MODE DSP application mode
The DSP registers can be accessed via a SNERT interface. This SNERT interface is equivalent to the UART mode 0 interface of the 80C51 microcontroller. The DSP register list is shown in Table 5.
Register list NAME CONTROL0 CONTROL1 CONTROL2 RESERVED1 OB_STARTL_F0 OB_STARTL_F1 RESERVED2 OB_STARTP OB_PE_F0 OB_PO_F0 OB_PE_F1 OB_PO_F1 OB_OFFSET_LE OB_OFFSET_LO PRE_MAT_K1 PRE_MAT_K2 PRE_MAT_K3 PRE_MAT_K4 WHITE_CLIP_THR COL_MAT_P11 COL_MAT_P12 COL_MAT_P13 COL_MAT_P21 COL_MAT_P22 COL_MAT_P23 COL_MAT_P31 COL_MAT_P32 FUNCTION see Table 6 for explanation see Table 7 for explanation see Table 8 for explanation - first line in optical black window in field 0 first line in optical black window in field 1 - first pixel in optical black window fixed optical black level for even pixel in field 0 fixed optical black level for odd pixel in field 0 fixed optical black level for even pixels in field 1 fixed optical black level for odd pixels in field 1 optical black offset for even lines optical black offset for odd lines factors for CCD (even pixels and lines; odd fields) factors for CCD (even lines and fields; odd pixels) factors for CCD (even pixels; odd lines and fields) factors for CCD (odd pixels and lines; even fields) threshold for white clip detector colour matrix coefficient P11 colour matrix coefficient P12 colour matrix coefficient P13 colour matrix coefficient P21 colour matrix coefficient P22 colour matrix coefficient P23 colour matrix coefficient P31 colour matrix coefficient P32 FORMAT byte byte byte - byte byte - byte byte byte byte byte byte byte byte byte byte byte byte byte byte byte byte byte byte byte byte n.a. n.a. n.a. - [0 to 255] 256 + [0 to 255] - 4 x [0 to 255] [0 to 127] [0 to 127] [0 to 127] [0 to 127] [0 to 255] [0 to 255] [0 to 255]/256 [0 to 255]/256 [0 to 255]/256 [0 to 255]/256 768 to 1023 [-128 to +127]/16 [-128 to +127]/16 [-128 to +127]/16 [-128 to +127]/16 [-128 to +127]/16 [-128 to +127]/16 [-128 to +127]/16 [-128 to +127]/16 RANGE
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Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
ADDR 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 NAME COL_MAT_P33 COL_MAT_RGAIN COL_MAT_BGAIN PRE_MAT_K5 PRE_MAT_K6 PRE_MAT_K7 PRE_MAT_K8 BLACK_LEVEL_R BLACK_LEVEL_G BLACK_LEVEL_B RGB_KNEE_OFFSET GAMMA_DITH GAMMA_BALANCE NPIX_LSB NPIX_MSB FPIX_ACT LPIX_ACT_LSB FLINE_ACT_F0 LLINE_ACT_F0_LSB FLINE_ACT_F1_LSB LLINE_ACT_F1_LSB ACT_LINES_MSB CTR_UPD_LINE VC_CNTRL CLDLEV HCLGAIN HCHGAIN CNCLEV CONGAIN FCDLEV YNCLEV YGAIN GNONUNILEV UVNCLEV UGAIN VGAIN CONTROLX CIF_HFIL_CNTRL HREFSTRT HREFSTPLSB HREFSTPMSB FUNCTION colour matrix coefficient P33 red gain for white balance correction blue gain for white balance correction factors for CCD (odd pixels and fields; even lines) factors for CCD (even pixels and fields; odd lines) factors for CCD (odd pixels, lines and fields) factors for CCD (even pixels, lines and fields) fixed black offset in red channel fixed black offset in green channel fixed black offset in blue channel offset of the Knee compression control of gamma dithering (MSB) control of gamma level (LSB) total number of pixels on a line most significant bits of total number of pixels/line address of the first active pixel on a line address of the last active pixel on a line address of the first active line in field 0 address of the last active line in field 0 address of the first active line in field 1 address of the last active line in field 1 MSBs of active line numbers (see Table 9) number of line for DB update of control registers vertical contour control (see Table 10) contour level dependency level horizontal contour BPF low gain horizontal contour BPF high gain total contour noise coring level total contour gain false colour detection level luminance noise coring level luminance gain green non-uniformity level chrominance noise coring level U gain V gain green non-uniformity control (see Table 11) CIF horizontal filter control (see Table 12) HREF signal start position HREF signal stop position (LSB) HREF signal stop position (MSB) (see Table 13) 19 FORMAT byte byte byte byte byte byte byte byte byte byte byte 2 bits 6 bits byte 2 bits byte byte byte byte byte byte byte byte bit byte nibble nibble 6 bits byte byte byte byte byte byte byte byte bit bit byte byte bit
SAA8112HL
RANGE [-128 to +127]/16 [0 to 255]/128 [0 to 255]/64 [0 to 255]/256 [0 to 255]/256 [0 to 255]/256 [0 to 255]/256 [-128 to +127] [-128 to +127] [-128 to +127] [0 to 255] [0 to 3] [0 to 63]/64 [0 to 255] [0 to 3] [0 to 255] [0 to 255] [0 to 255] [0 to 1023] [0 to 1023] [0 to 1023] n.a. [0 to 255] n.a. [0 to 255] [0 to 15]/16 [0 to 15]/16 [0 to 63] [0 to 63]/16 [0 to 255] [0 to 127]/4 [0 to 255]/128 [0 to 255] [0 to 255]/4 [0 to 255]/128 [0 to 255]/128 n.a. n.a. [0 to 255]/256 [0 to 255] n.a.
2000 Jan 18
Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
ADDR 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 126 127 A B C D E F HIGHLIGHTTHR ME_RESSCALE MWHVGRID DISPCNTRL YDISPLEV DMWSEL VF_TGGLE CIFHWIN OUTF_AVSC SY_GEN DOP_CNTRL0 DOP_CNTRL1 CIF_HPSTRTL CIF_VLSTRTL PRE_SI_LSB PRE_SI_MSB SMP_CNTRL CIFVWIN DIG_SETUP RESERVED3 RESERVED4 RESERVED5 PRE_PROC_DEL RAMWRPTR RAMWRDATA NAME AWB_A (ME) AWB_B (ME) AWB_C (ME) AWB_D (ME) AWB_E (ME) AWB_F (ME) highlight threshold (ME) ME result of scaler (see Table 14) vertical (4 MSBs) and horizontal (4 LSBs) window ME size overlay control overlay control overlay control VF and FI toggle position CIF horizontal input window control output format selection register and AVSYNC (HREF) period selection (see Table 15) SY pulse generation control (see Table 16) digital output processing control (see Table 17) digital output processing control (see Table 18) address (LSB) of first pixel in CIF cutting window address (LSB) of first line in CIF cutting window control data for analog preprocessing control data and address for analog preprocessing (see Table 19) switched mode power supply control CIF vertical input window control set-up level in digital output - - - control compensation delay w.r.t. preprocessing RAM write pointer to internal workspace RAM write data to internal workspace FUNCTION FORMAT byte byte byte byte 6 bits 6 bits byte 4 bits byte bit byte bit byte byte bit bit bit bit byte byte byte bit byte byte byte - - - 4 bits byte byte
SAA8112HL
RANGE [-128 to +127]/128 [-128 to +127]/128 [-128 to +127]/128 [-128 to +127]/128 [0 to 63] [0 to 63] [0 to 255] n.a. [0 to 15] n.a. [0 to 255] n.a. [0 to 255] + 256 4 x [0 to 255] n.a. n.a. n.a. n.a. [0 to 255] [0 to 255] [0 to 255] n.a. [0 to 255] 4 x [0 to 255] [0 to 255] - - - [0 to 15] [0 to 223] [0 to 255]
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Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
Table 6 Register CONTROL0 (address: 0x00H) BIT 7 6 5 4 3 2 1 0 1 0 1 0 1 0 1 0 1 1 1 0 0 Register CONTROL0 (address: 0x01H) BIT 7 6 5 4 3 2 1 0 1 1 0 0 1 0 1 0 0 0 compression factor for RGB knee:
1 3 1 1 2 8 4 8
SAA8112HL
PARAMETER DESCRIPTION auto optical black control: on off type of sensor: RGB Bayer CCD (VGA) complementary mosaic CCD (PAL/NTSC) type of colour filter (if SENS_VGA = 0): filter type B filter type A colour separator (if SENS_VGA = 1): on off (raw data mode) synchronizes the colour separator on pixel level synchronizes the colour separator on line level synchronizes the colour separator on field level PIX_PHASE LINE_PHASE FIELD_PHASE Reserved RGC MOSAIC_FIL_TYPE SENS_VGA NAME AUTO_OPT_BLACK
Table 7
PARAMETER DESCRIPTION NAME Reserved RGB_KNEE_K
selection of filter characteristics of UV downsample filters: 1 0 1 0 0 0 for medium resolution sensors for high resolution sensors video mode selection: PAL NTSC
MED_RES
PAL_NTSC
Reserved
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Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
Table 8 Register CONTROL2 (address: 0x02H) X = don't care. BIT 7 6 5 4 3 2 1 1 0 1 0 0 1 0 0 X 1 0 X 1 0 0 white clip mapping on UV grid [11111] spreading filter, kills 5 UV samples [01110] spreading filter, kills 3 UV samples [00100] spreading filter, kills only current UV sample switch control for false colour concealment signal [11111] spreading filter, conceals 5 UV samples [01110] spreading filter, conceals 3 UV samples [00100] spreading filter, conceals only current UV sample Register ACT_LINES_MSB (address: 0x2FH) BIT 7 6 5 4 3 2 1 1 1 1 1 1 1 1 0 1 PARAMETER DESCRIPTION bit 8 of LPIX_ACT_LSB (0x2AH) bit 9 of LPIX_ACT_LSB (0x2AH) bit 8 of LLINE_ACT_F0_LSB (0x2CH) bit 9 of LLINE_ACT_F0_LSB (0x2CH) bit 8 of FLINE_ACT_F1_LSB (0x2DH) bit 9 of FLINE_ACT_F1_LSB (0x2DH) bit 8 of LLINE_ACT_F1_LSB (0x2EH) bit 9 of LLINE_ACT_F1_LSB (0x2EH) 0 1 PARAMETER DESCRIPTION false colour low pass filter (on = high) non-interlaced mode selection
SAA8112HL
NAME FCC_FILTER NI Reserved WH_CL_MAP
FC_MAP
Table 9
Table 10 Register VC_CNTRL (address: 0x31H) X = don't care. BIT 7 6 X 1 0 5 X 4 X 3 X 2 X 1 X 0 X PARAMETER DESCRIPTION vertical contour gain (range 0 to 15) vertical contour filter coefficient (range 0 to 7) horizontal VC filter on off NAME VCGAIN KCOMB n.a.
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Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
Table 11 Register CONTROLX (address: 0x3DH) BIT 7 6 5 4 3 2 1 0 vertical contour filter gain 1 0 0 0 0 0 0 0 0 normal double reserved PARAMETER DESCRIPTION
SAA8112HL
Table 12 Register CIF_HFIL_CNTRL (address: 0x3EH) X = don't care. BIT 7 6 5 4 3 2 1 1 0 0 1 0 0 0 0 0 0 X 1 0 0 X 1 0 quarter bandwidth half bandwidth bypass, full bandwidth chrominance horizontal filter control quarter bandwidth half bandwidth bypass, full bandwidth reserved PARAMETER DESCRIPTION luminance CIF horizontal filter control
Table 13 Register HREFSTPMSB (address: 0x41H) BIT 7 6 5 4 3 2 1 1 0 0 0 0 0 0 0 1 PARAMETER DESCRIPTION bit 8 of HREFSTPLSB (0x40H) bit 9 of HREFSTPLSB (0x40H) reserved
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Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
Table 14 Register MECNTRL (address: 0x4BH) X = don't care. BIT 7 6 5 4 3 2 1 1 1 0 0 0 0 1 0 0 0 0 0 1 1 0 0 1 1 0 0 0 ME result of scaler selection X 1 0 1 0 1 0 reserved divide by 32 divide by 16 divide by 8 divide by 4 divide by 2 pass through ME synchronization in field mode in frame mode reserved PARAMETER DESCRIPTION
SAA8112HL
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Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
Table 15 Register OUTF_AVSC (address: 0x50H) X = don't care. BIT 7 6 5 4 3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 0 X 1 1 0 0 X 1 0 1 0 X 2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 PARAMETER DESCRIPTION
SAA8112HL
AVSYNC (HREF) period (in CLK1 cycles during active video) 2560 CLK1 cycles when AVVALID (PXQ) is high 1920 CLK1 cycles 1280 CLK1 cycles 960 CLK1 cycles 640 CLK1 cycles 480 CLK1 cycles 320 CLK1 cycles 240 CLK1 cycles 160 CLK1 cycles 120 CLK1 cycles 80 CLK1 cycles 60 CLK1 cycles 40 CLK1 cycles 30 CLK1 cycles 20 CLK1 cycles 15 CLK1 cycles output format select code IEEE-1394 4 : 4 : 4 mode (IEEE-1384 camera mode_0) IEEE-1394 4 : 2 : 2 mode (IEEE-1384 camera mode_1 and mode_3) IEEE-1394 4 : 1 : 1 mode (IEEE-1384 camera mode_2) IEEE-1394 4 : 0 : 0 (B and W) mode (IEEE-1384 camera mode_5) standard 4 : 2 : 2 mode MSB of SY (VS) duration
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Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
Table 16 Register SY_GEN (address: 0x51H) X = don't care. BIT 7 6 5 4 3 2 1 1 1 1 0 0 0 0 1 0 X X X X 1 1 1 0 0 1 1 0 0 0 SY (VS) vertical offset 1 0 1 0 1 0 1 0 +4 lines +3 lines +2 lines +1 line 0 line -1 line -2 lines -3 lines SY polarity negative positive PARAMETER DESCRIPTION
SAA8112HL
SY pulse duration code (4 LSBs) (range [0 to 32] x CLK2)
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Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
Table 17 Register DOP_CNTRL0 (address: 0x52H) X = don't care. BIT 7 6 5 4 3 2 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 0 X 1 0 downsampling off downsample by 2 downsample by 4 vertical scaling processing control bits upsample by 2 downsampling off downsample by 2 downsample by 4 temporal scaling processing control bits downsample by 8 downsample by 4 downsample by 2 downsampling off scaling processing enable on off (bypass) CIF format CIF QCIF PARAMETER DESCRIPTION horizontal scaling processing control bits
SAA8112HL
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Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
Table 18 Register DOP_CNTRL1 (address: 0x53H) BIT 7 6 5 4 3 2 1 1 1 1 1 0 1 0 1 0 1 0 0 1 PARAMETER DESCRIPTION bit 8 of CIF_VLSTRTL (0x55H) bit 9 of CIF_VLSTRTL (0x55H) bit 8 of CIF_HPSTRTL (0x54H) bit 9 of CIF_HPSTRTL (0x54H) use PXQ output use CREF output sensor type CIF sensor non-CIF sensor digital output format D1 B and W for IEEE-1394 CLK1/CLK2 interface reset reset free running, normal operation
SAA8112HL
Table 19 Register PRE_SI_MSB (address: 0x57H) BIT 7 6 5 4 3 2 1 1 1 1 1 0 0 0 0 1 control data bits D8 control data bits D9 control address bits A0 control address bits A1 control address bits A2 reserved PARAMETER DESCRIPTION
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Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
9 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VDDD VDGND VI VO Tstg Tamb Tj Notes 1. Stress beyond these levels may cause permanent damage to the device. 2. Only pin `16' is connected to the microcontroller core. 10 THERMAL CHARACTERISTICS SYMBOL Rth(j-a) PARAMETER thermal resistance from junction to ambient CONDITIONS in free air PARAMETER digital supply voltage digital ground voltage input signal voltage output signal voltage storage temperature ambient temperature junction temperature CONDITIONS notes 1 and 2 note 1 note 1 note 1 note 1 note 1 note 1 MIN. -0.5 -0.5 -0.5 -0.5 -55 0 -40
SAA8112HL
MAX. +4.0 +4.0 V V
UNIT
VDDD + 0.5 V VDDD + 0.5 V +150 70 +125 C C C
VALUE 53
UNIT K/W
11 OPERATING CHARACTERISTICS VDDD = 3.3 V 10%; Tamb = 0 to 70 C; unless otherwise stated. SYMBOL General supply VDDD DGND IDDD(tot) digital power supply voltage digital ground digital power supply current (total) VDDD = 3.6 V Tamb = 70 C 3.0 0 - 3.3 0 - 3.6 0 80 V V mA PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Data and control inputs (CCD9 to CCD0, HD, VD, FI, CLK1, CLK2, M, DSPRST, EA, UCCLK, UCM and UCRST) VIL VIH LOW-level input voltage HIGH-level input voltage - 2 - - - - 0.8 - V V
I2C-bus, UART (SCLK, SDATA, STROBE, SNCL, SNDA and SNRES) VIL VIH LOW-level input voltage HIGH-level input voltage 0.3 x VDDD V - V 0.7 x VDDD -
Data and control outputs (SMP, P2.7 to P2.0, PSEN, ALE, P0.7 to P0.0, YUV7 to YUV0, PXQ, VS, HREF and LLC) VOL VOH LOW-level output voltage HIGH-level output voltage 0 - 0.1 x VDDD V VDDD V 0.9 x VDDD -
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Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
12 ELECTRICAL CHARACTERISTICS Table 20 Data input/output timing VDDD = 3.3 V 10%; Tamb = 0 to 70 C. SYMBOL PARAMETER MIN. - - 13.5 TYP.
SAA8112HL
MAX. - - 16
UNIT
Data inputs related to CLK1 (CCD9 to CCD0, HD, VD and FI) tsu(i)(D) th(i)(D) td(o)(D) td(o)(D) data input set-up time data input hold time 2 1.5 - - ns ns
Data outputs related to CLK2 (YUV7 to YUV0, HREF) data output delay time ns
Data outputs related to CLK2 (VS and PXQ) data output delay time 7.5 10 ns
handbook, full pagewidth
CLOCK
50%
t su(i)(D)
t h(i)(D)
Data input
50%
50%
t d(o)(D) Data output
FCE346
Fig.9 Data input/output timing diagrams.
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handbook, full pagewidth
DATA7 to DATA0
PSEN ALE AD10 to AD8 AD15 to AD11
SDAE SCLE
2000 Jan 18
PROM SMP M RESET
13 APPLICATION INFORMATION
Philips Semiconductors
Digital camera signal processor and microcontroller
SCL SDA YUV7 to YUV0 HREF VS LLC PXQ HD VD FI CLK1 CLK2 SNRES SNCL SNDA
31
SENSOR
TDA878x
CCD9 to CCD0 SDATA SCLK STROBE
SAA8112HL
SAA8117HL
USB Add-on
V-DRIVER
FCE347
SUSREADYNOT UCINT UCCLK UCPOR EA UCM
EEPROM
SAA8112HL
Product specification
Fig.10 USB application.
Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
SAA8112HL
handbook, full pagewidth
PROM
DATA7 to DATA0
PSEN ALE AD10 to AD8 AD15 to AD11
SMP M RESET
YUV7 to YUV0 HREF VS LLC PXQ
SCALER
SENSOR
TDA878x
CCD9 to CCD0 SDATA SCLK STROBE
SAA8112HL
HD VD FI CLK1 CLK2 SNRES
V-DRIVER SNCL SNDA UCINT UCCLK UCPOR EA UCM
PULSE PATTERN GENERATOR (PPG)
SDAE SCLE
FCE348
EEPROM
Fig.11 Digital module application (VGA PAL/NTSC/CIF PPG).
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Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
14 PACKAGE OUTLINE LQFP100: plastic low profile quad flat package; 100 leads; body 14 x 14 x 1.4 mm
SAA8112HL
SOT407-1
c
y X 75 76 51 50 ZE A
e E HE wM bp L pin 1 index 100 1 ZD bp D HD wM B vM B 25 vM A 26 detail X Lp A A2 (A 3)
A1
e
0
5 scale
10 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.6 A1 0.20 0.05 A2 1.5 1.3 A3 0.25 bp 0.28 0.16 c 0.18 0.12 D (1) 14.1 13.9 E (1) 14.1 13.9 e 0.5 HD HE L 1.0 Lp 0.75 0.45 v 0.2 w 0.12 y 0.1 Z D (1) Z E (1) 1.15 0.85 1.15 0.85 7 0o
o
16.25 16.25 15.75 15.75
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT407-1 REFERENCES IEC JEDEC MS-026 EIAJ EUROPEAN PROJECTION
ISSUE DATE 97-08-04 99-12-27
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Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
15 SOLDERING 15.1 Introduction to soldering surface mount packages
SAA8112HL
If wave soldering is used the following conditions must be observed for optimal results: * Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 15.4 Manual soldering
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. 15.2 Reflow soldering
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 230 C. 15.3 Wave soldering
Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed.
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
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Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
15.5 Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE WAVE BGA, SQFP PLCC(3), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes not suitable suitable(2) recommended(3)(4) recommended(5) suitable not not suitable suitable suitable suitable suitable HLQFP, HSQFP, HSOP, HTSSOP, SMS not
SAA8112HL
REFLOW(1)
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
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Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
16 DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
SAA8112HL
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. 17 LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 18 PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
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Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
NOTES
SAA8112HL
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Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
NOTES
SAA8112HL
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Philips Semiconductors
Product specification
Digital camera signal processor and microcontroller
NOTES
SAA8112HL
2000 Jan 18
39
Philips Semiconductors - a worldwide company
Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 68 9211, Fax. +359 2 68 9102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381, Fax. +1 800 943 0087 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V, Tel. +45 33 29 3333, Fax. +45 33 29 3905 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615 800, Fax. +358 9 6158 0920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, Tel. +33 1 4099 6161, Fax. +33 1 4099 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 2353 60, Fax. +49 40 2353 6300 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: PT Philips Development Corporation, Semiconductors Division, Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI), Tel. +39 039 203 6838, Fax +39 039 203 6800 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW, Tel. +48 22 5710 000, Fax. +48 22 5710 001 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 58088 Newville 2114, Tel. +27 11 471 5401, Fax. +27 11 471 5398 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SAO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye, ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381, Fax. +1 800 943 0087 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 62 5344, Fax.+381 11 63 5777
For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1999
Internet: http://www.semiconductors.philips.com
SCA 68
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
545006/02/pp40
Date of release: 2000
Jan 18
Document order number:
9397 750 06688

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