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UCC5631A
Multimode SCSI 9 Line Terminator
FEATURES
* Auto Selection Single Ended (SE) or Low Voltage Differential (LVD) Termination * Meets SCSI-1, SCSI-2, SCSI-3, SPI, Ultra (Fast-20), Ultra2 (SPI-2 LVD) and Ultra3 Standards * 2.7V to 5.25V Operation * Differential Failsafe Bias * Thermal packaging for low junction temperature and better MTBF * Master/Slave Input * Supports Active Negation * 3pF Channel Capacitance * Reversed Disconnect Polarity
DESCRIPTION
The UCC5631A Multimode SCSI Terminator provides a smooth transition into the next generation of the SCSI Parallel Interface (SPI-2). It automatically senses the bus, via DIFFB, and switches the termination to either single ended (SE) or low voltage differential (LVD) SCSI, dependent on which type of devices are connected to the bus. The UCC5631A can not be used on a HVD, EIA485, differential SCSI bus. If the UCC5631A detects a HVD SCSI device, it switches to a high impedance state. The Multimode terminator contains all functions required to terminate and auto detect and switch modes for SPI-2 bus architectures. Single Ended and Differential impedances and currents are trimmed for maximum effectiveness. Fail Safe biasing is provided to insure signal integrity. Device/Bus type detection circuitry is integrated into the terminator to provide automatic switching of termination between single ended and LVD SCSI and a high impedance for HVD SCSI. The multimode function provides all the performance analog functions necessary to implement SPI-2 termination in a single monolithic device. The UCC5631A is offered in a 36 pin SSOP package, as well as a 48 pin LQFP package for a temperature range of 0C to 70C.
BLOCK DIAGRAM
HIPD 35
LVD 34
SE 33 (NOISE LOAD) HIPD REF 1.3V LVD 1.3V 20 DIFSENS
2.15V DIFFB 21 0.6V MSTR/SLV 19
SE 110
-15mA ISOURCE -5mA 50A ISINK 200A
SE REF 2.7V
SOURCE/SINK REGULATOR 124 56mV -+ 56mV +- MODE ALL SWITCHES UP DOWN OPEN OPEN 124 56mV -+ 56mV +- 52.5 31 L9+ 52.5 32 L9- 110 SE GND SWITCH 52.5 4 L1+ 52.5 5 L1-
LVD REF 1.25V
10A
SE LVD HIPD ENABLE SWITCHES
DISCNCT 17
DISCNCT
TRMPWR
36
SE GND SWITCH
18 GND
8
9
10
26
27
28
1 REG
PATENTED CIRCUIT DESIGN
HS/GND
Note: Indicated pinout is for 36 pin SSOP package.
UDG-99165
SLUS443 - OCTOBER 1999
UCC5631A
ABSOLUTE MAXIMUM RATINGS
TRMPWR Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V Signal Line Voltage . . . . . . . . . . . . . . . . . . . . . 0V to TRMPWR Package Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . 2W Storage Temperature . . . . . . . . . . . . . . . . . . . -65C to +150C Junction Temperature . . . . . . . . . . . . . . . . . . . -55C to +150C Lead Temperature (Soldering, 10sec.) . . . . . . . . . . . . . +300C
CONNECTION DIAGRAM
QSOP-36 (Top View) MWP Package
REG N/C 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 TRMPWR HIPD LVD SE L9- L9+ L8- L8+ HS/GND HS/GND HS/GND L7- L7+ L6- L6+ DIFF B DIFSENS MSTR/SLV
All voltages are with respect to pin 18. Currents are positive into, negative out of the specified terminal. Consult Packaging Section of the Databook for thermal limitations and considerations of packages.
N/C L1+ L1- L2+
RECOMMENDED OPERATING CONDITIONS
TRMPWR Voltage . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.25V
L2- HS/GND HS/GND HS/GND
LQFP-48 (Top View) FQP Package
HS/GND HS/GND L5+ L5- DISCNCT GND HS/GND L4- L4+ L3- L3+ NC
L3+ L3- L4+ L4- L5+
48 47 MSTR/SLV DIFSENS DIFFB N/C HS/GND HS/GND HS/GND HS/GND L6+ L6- L7+ L7- 1 2 3 4 5 6 7 8 9 10 11 12 13 14
46
45
44 43
42
41
40 39
38
37 36 35 34 33 32 31 30 29 28 27 26 25
L2- L2+ L1- L1+ HS/GND HS/GND HS/GND HS/GND NC NC REG NC
L5- DISCNCT GND
15
16
17
18
19
20
21
22
23
24 NC TERMPWR HIPD LVD SE HS/GND
L8+ L8- L9+ L9- HS/GND HS/GND
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UCC5631A
ELECTRICAL CHARACTERISTICS Unless otherwise stated, these specifications apply for TA = TJ = 0C to 70C,
TRMPWR = 2.7V to 5.25V. PARAMETER TRMPWR Supply Current Section TRMPWR Supply Current LVD Mode (No Load) SE Mode (No Load) Disabled Regulator Section REG Output Voltage (LVD Mode) REG Output Voltage (SE Mode) REG Short-Circuit Source Current (LVD and SE Modes) REG Short-Circuit Sink Current (LVD and SE Modes) DIFSENS Output Section Output Voltage Short-Circuit Source Current Short-Circuit Sink Current Differential Impedance Common Mode Impedance Differential Bias Voltage Common Mode Bias Voltage Output Capacitance Impedance Termination Current Output Capacitance Single Ended GND Switch Impedance Output Leakage Output Capacitance DISCNCT and DIFFB Input Section DISCNCT Threshold DISCNCT Input Current DIFFB Single Ended to LVD Threshold DIFFB LVD to HIPD Threshold DIFFB Input Current 0V VDIFFB 2.75V VDISCNCT = 0V 0.8 -30 0.5 1.9 -1 -10 2.0 -3 0.7 2.4 1 V A V V A Single ended measurement to ground. (Note 4) L+ and L- shorted together. Single ended measurement to ground. (Note 4) (Note 5) Signal Level 0.2V Signal Level 0.5V Single ended measurement to ground. (Note 4) I= 10mA 20 102.3 -25.4 -22.4 110 L+ and L- shorted together. (Note 3) -5mA IDIFSENS 50A VDIFSENS = 0V VDIFSENS = 2.75V 1.2 -15 50 100 110 100 1.15 1.25 1.3 -8 80 105 140 1.4 -5 200 110 165 125 1.35 3 117.7 -21 -18 3 60 400 3 nA pF mA mA pF mV V pF V mA A 0.5V VCM 2.0V (Note1) 0V VL- 4.2V (Note2) VREG= 0V VREG= 3.0V 1.15 2.5 -800 100 1.25 2.7 -420 180 1.35 3.0 -225 800 V V mA mA 13 1.6 250 20 10 400 mA mA A TEST CONDITIONS MIN TYP MAX UNITS
Differential Termination Section (Applies to each line pair, 1-9, in LVD mode)
Single Ended Termination Section (Applies to each line pair, 1-9, in SE mode)
Disconnected Termination Section (Applies to each line pair, 1-9, in DISCNCT or HIPD mode)
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UCC5631A
ELECTRICAL CHARACTERISTICS Unless otherwise stated, these specifications apply for TA = TJ = 0C to 70C,
TRMPWR = 2.7V to 5.25V. PARAMETER Master/Slave (MSTR/SLV) Input Section MSTR/SLV Threshold VTRMPWR = 2.7V VTRMPWR = 3.3V VTRMPWR = 5.25V MSTR/SLV Input Current Status Bits (SE, LVD, HIPD) Output Section ISOURCE ISINK VLOAD = 2.4V VLOAD = 0.5V VLOAD = 0.4V 3 2 -8.7 6 5 -4 mA mA mA 0.8 1 1.5 -1 1.9 2.4 3.7 1 V V V A TEST CONDITIONS MIN TYP MAX UNITS
Note 1: VCM is applied to all L+ and L- lines simultaneously. Note 2: VL- is applied to all L- lines simultaneously. ; - I ( at V = 0 . 5V ) CM Note 4: Guaranteed by design. Not 100% tested in production. I ( at V
CM
Note 3: Z CM =
(2 . 0V - 0. 5V )
= 2V )
Note 5: Z =
V L( X ) - 0 . 2V ; where I L( X )
VL(X)= Output voltage for each terminator minus output pin (L1- through L9-) with each pin unloaded. IL(X )= Output current for each terminator minus output pin (L1- through L9-) with the minus output pin forced to 0.2V.
PIN DESCRIPTIONS
DIFFB: Input pin for the comparators that select SE, LVD, or HIPD modes of operation. This pin should be decoupled with a 0.1 F capacitor to ground and then coupled to the DIFSENS pin through a 20k resistor. DIFSENS: Connects to the Diff Sense line of the SCSI bus. The bus mode is controlled by the voltage level on this pin. DISCNCT: Input pin used to shut down the terminator if the terminator is not connected at the end of the bus. Connect this pin to ground to disable the terminator or open pin to activate the terminator. HIPD: TTL compatible status bit. This output pin is high when a high voltage differential device is detected on the bus. HS/GND: Heat sink ground pins. These should be connected to large area PC board traces to increase the power dissipation capability. GND: Power Supply return. 4 L1- thru L9-: Termination lines. These are the active lines in SE mode and are the negative lines for LVD mode. In HIPD mode, these lines are high impedance. L1+ thru L9+: Termination lines. These lines switch to ground in SE mode and are the positive lines for LVD mode. In HIPD mode, these lines are high impedance. MSTR/SLV: If the terminator is enabled, this input pin enables / disables the DIFSENS driver, when connected to TRMPWR or ground respectively. When the terminator is disabled, the DIFSENS driver is off, independent of this input. LVD: TTL compatible status bit. This output pin is high when the SCSI bus is in LVD mode. REG: Regulator output bypass pin. This pin must be connected to a 4.7 F capacitor to ground. SE: TTL compatible status bit. This output pin is high when the SCSI bus is in SE mode. TRMPWR: 2.7V to 5.25V power input pin.
UCC5631A
APPLICATION INFORMATION
TERMPWR
36 TERMPWR CONTROL LINES 19 MSTR/SLV 17 DISCNCT REG 1 DIFSENS 20 DIFFB 21 20k 0.1F . 20k
TERMPWR 36 CONTROL LINES MSTR/SLV 19 20 DIFSENS DIFF B 21 DISCNCT 17 REG 1
TERMPWR
4.7F .
0.1F .
4.7F
36 TERMPWR DATA LINES (9) 19 MSTR/SLV 4.7F . 17 DISCNCT REG 1 DIFF B 21 DIFFB 21
TERMPWR 36 DATA LINES (9) MSTR/SLV 19 DISCNCT 17 REG 1 4.7F .
4.7F .
4.7F
36 TERMPWR DATA LINES (9) 19 MSTR/SLV 17 DISCNCT REG 1 DIFFB 21 DIFFB 21
TERMPWR 36 DATA LINES (9) MSTR/SLV 19 DISCNCT 17 REG 1
4.7F .
4.7F
UDG-99166
Figure 2. Application diagram.
All SCSI buses require a termination network at each end to function properly. Specific termination requirements differ, depending on which types of SCSI devices are present on the bus. The UCC5631A is used in multi-mode active termination applications, where single ended (SE) and low voltage differential (LVD) devices might coexist. The UCC5631A has both SE and LVD termination networks integrated into a single monolithic component. The correct termination network is automatically determined by the SCSI bus "DIFSENS" signal.
The SCSI bus DIFSENS signal line is used to identify which types of SCSI devices are present on the bus. On power-up, the UCC5631A DIFSENS drivers will try to deliver 1.3V to the DIFSENS line. If only LVD devices are present, the DIFSENS line will be successfully driven to 1.3V and the terminators will configure for LVD operation. If any single ended devices are present, they will present a short to ground on the DIFSENS line, signaling the UCC5631A(s) to configure into the SE mode, accommodating the SE devices. Or, if any high voltage differential (HVD) devices are present, the DIFSENS line is pulled high and the terminator will enter a high impedance state, effectively disconnecting from the bus.
5
UCC5631A
APPLICATION INFORMATION (cont.)
The DIFSENS line is monitored by each terminator through a 50Hz noise filter at the DIFFB input pin. A set of comparators detect and select the appropriate termination for the bus as follows. If the DIFSENS signal is below 0.5V, the termination network is SE. Between 0.7V and 1.9V, the termination network switches to LVD, and above 2.4V is HVD, causing the terminators to disconnect from the bus. The thresholds accommodate differences in ground potential that can occur with long lines. Three UCC5631A multi-mode parts are required at each end of the bus to terminate 27 (18 data, plus 9 control) lines. Each part includes a DIFSENS driver, but only one is necessary to drive the line. A MSTR/SLV input pin is provided to disable the other two. The "master" part must have its' MSTR/SLV pin connected to TRMPWR and the two "slave" parts must have the MSTR/SLV inputs grounded. Only the "master" is connected directly to the SCSI bus DIFSENS line. The DIFFB inputs on all three parts are connected together, allowing them to share the same 50Hz noise filter. This multi-mode terminator operates in full specification down to 2.7V TRMPWR voltage. This accommodates 3.3V systems, with allowance for the 3.3V supply tolerance (+/- 10%), a unidirectional fusing device and cable drop. In 3.3V TRMPWR systems, the UCC3912 is recommended in place of the fuse and diode. The UCC3912's lower voltage drop allows additional margin over the fuse and diode, for the far end terminator. Layout is critical for Ultra2 and Ultra3 systems. The SPI-2 standard for capacitance loading is 10pF maximum from each positive and negative signal line to ground, and a maximum of 5pF between the positive and negative signal lines of each pair is allowed. These maximum capacitances apply to differential bus termination circuitry that is not part of a SCSI device, (e.g. a cable terminator). If the termination circuitry is included as part of a SCSI device, (e.g., a host adaptor, disk or tape drive), then the corresponding requirements are 30pF maximum from each positive and negative signal line to ground and 15pF maximum between the positive and negative signal lines of each pair. The SPI-2 standard for capacitance balance of each pair and balance between pairs is more stringent. The standard is 0.75pF maximum difference from the positive and negative signal lines of each pair to ground. An additional requirement is a maximum difference of 2pF when comparing pair to pair. These requirements apply to differential bus termination circuitry that is not part of a SCSI device. If the termination circuitry is included as part of a device, then the corresponding balance requirements are 2.25pF maximum difference within a pair, and 3pF from pair to pair. Feed-throughs, through-hole connections, and etch lengths need to be carefully balanced. Standard multi-layer power and ground plane spacing add about 1pF to each plane. Each feed-through will add about 2.5pF to 3.5pF. Enlarging the clearance holes on both power and ground planes will reduce the capacitance. Similarly, opening up the power and ground planes under the connector will reduce the capacitance for through-hole connector applications. Capacitance will also be affected by components, in close proximity, above and below the circuit board. Unitrode multi-mode terminators are designed with very tight balance, typically 0.1pF between pins in a pair and 0.3pF between pairs. At each L+ pin, a ground driver drives the pin to ground, while in single ended mode. The ground driver is specially designed to not effect the capacitive balance of the bus when the device is in LVD or disconnect mode. Multi-layer boards need to adhere to the 120 impedance standard, including the connectors and feedthroughs. This is normally done on the outer layers with 4 mil etch and 4 mil spacing between runs within a pair, and a minimum of 8 mil spacing to the adjacent pairs to reduce crosstalk. Microstrip technology is normally too low of impedance and should not be used. It is designed for 50 rather than 120 differential systems. Careful consideration must be given to the issue of heat management. A multi-mode terminator, operating in SE mode, will dissipate as much as 130mW of instantaneous power per active line with TRMPWR = 5.25V. The UCC5631A is offered in a 36 pin SSOP and a 48 lead LFQP. Both packages include heat sink ground pins. These heat sink/ground pins are directly connected to the die mount paddle under the die and conduct heat from the die to reduce the junction temperature. All of the HS/GND pins need to be connected to etch area or a feed-through per pin connecting to the ground plane layer on a multi-layer board.
UNITRODE CORPORATION 7 CONTINENTAL BLVD. * MERRIMACK, NH 03054 TEL. (603) 424-2410 * FAX (603) 424-3460
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