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SN74AVC20T245 20 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS
SCES518 - DECEMBER 2003
D Control Inputs VIH/VIL Levels are D D D D D
Referenced to VCCA Voltage VCC Isolation Feature - If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State Overvoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data Communications Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.4-V to 3.6-V Power-Supply Range Ioff Supports Partial-Power-Down Mode Operation I/Os Are 4.6-V Tolerant
DGG OR DGV PACKAGE (TOP VIEW)
description/ordering information
This 20-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A-port is designed to track VCCA. VCCA accepts any supply voltage from 1.4 V to 3.6 V. The B-port is designed to track VCCB. VCCB accepts any supply voltage from 1.4 V to 3.6 V. This allows universal low-voltage bidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes. The SN74AVC20T245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are effectively isolated.
17 18 19 20 21 22 23 24 25 26 27 28
40 39 38 37 36 35 34 33 32 31 30 29
The SN74AVC20T245 is designed so that the control (1DIR, 2DIR, 1OE, and 2OE) inputs are supplied by VCCA. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The VCC isolation feature ensures that if either VCC input is at GND, both ports are in the high-impedance state. ORDERING INFORMATION
TA PACKAGE TSSOP - DGG -40 C 85C -40C to 85 C TVSOP - DGV Tape and reel Tape and reel ORDERABLE PART NUMBER SN74AVC20T245DGGR SN74AVC20T245DGVR TOP-SIDE MARKING TBD TBD
VFBGA - GQL Tape and reel SN74AVC20T245GQLR TBD Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.
Copyright 2003, Texas Instruments Incorporated
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1
PRODUCT PREVIEW
1DIR 1B1 1B2 GND 1B3 1B4 VCCB 1B5 1B6 1B7 GND 1B8 1B9 1B10 2B1 2B2 2B3 GND 2B4 2B5 2B6 VCCB 2B7 2B8 GND 2B9 2B10 2DIR
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
1OE 1A1 1A2 GND 1A3 1A4 VCCA 1A5 1A6 1A7 GND 1A8 1A9 1A10 2A1 2A2 2A3 GND 2A4 2A5 2A6 VCCA 2A7 2A8 GND 2A9 2A10 2OE
SCES518 - DECEMBER 2003
SN74AVC20T245 20 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS
description/ordering information (continued)
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
GQL PACKAGE (TOP VIEW) 1 A B C D E F G H 2 3 4 5 6
terminal assignments
1 A B C D E F G H J K 1B1 1B3 1B5 1B7 1B9 2B1 2B3 2B5 2B7 2B9 2 1B2 1B4 1B6 1B8 1B10 2B2 2B4 2B6 2B8 2B10 GND VCCB GND 2DIR GND VCCA GND 2OE 3 1DIR GND VCCB GND 4 1OE GND VCCA GND 5 1A2 1A4 1A6 1A8 1A10 2A2 2A4 2A6 2A8 2A10 6 1A1 1A3 1A5 1A7 1A9 2A1 2A3 2A5 2A7 2A9
PRODUCT PREVIEW
J K
FUNCTION TABLE (each 10-bit section) INPUTS OE L L H DIR L H X OPERATION B data to A bus A data to B bus Isolation
logic diagram (positive logic)
1DIR 1 2DIR 56 28
1OE
29
2OE
1A1
55
2A1
42
2
1B1
15
2B1
To Nine Other Channels Pin numbers shown are for the DGG and DGV packages.
To Nine Other Channels
2
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SN74AVC20T245 20 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS
SCES518 - DECEMBER 2003
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCCA and VCCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 4.6 V Input voltage range, VI (see Note 1): I/O ports (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 4.6 V I/O ports (B port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 4.6 V Control inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 4.6 V Voltage range applied to any output in the high-impedance or power-off state, VO (see Note 1): A port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 4.6 V B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 4.6 V Voltage range applied to any output in the high or low state, VO (see Notes 1 and 2): A port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to VCCA + 0.5 V B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to VCCB + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Continuous current through each VCCA, VCCB, and GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA Package thermal impedance, JA (see Note 3): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64C/W DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48C/W GQL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. 2. The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current rating is observed. 3. The package thermal impedance is calculated in accordance with JESD 51-7.
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PRODUCT PREVIEW
SCES518 - DECEMBER 2003
SN74AVC20T245 20 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS
recommended operating conditions (see Notes 4 through 6)
VCCI VCCA VCCB VIH Supply voltage Supply voltage 1.4 V to 1.95 V High-level input voltage Data inputs 1.95 V to 2.7 V 2.7 V to 3.6 V 1.4 V to 1.95 V VIL Low-level input voltage Data inputs 1.95 V to 2.7 V 2.7 V to 3.6 V 1.4 V to 1.95 V VIH High-level input voltage DIR and OE (Referenced to VCCA) 1.95 V to 2.7 V 2.7 V to 3.6 V 1.4 V to 1.95 V VIL Low-level input voltage DIR and OE (Referenced to VCCA) Active state VO VI Output voltage Input voltage 1.4 V to 1.6 V 1.65 V to 1.95 V IOH High-level output current 2.3 V to 2.7 V 3 V to 3.6 V 1.4 V to 1.6 V 1.65 V to 1.95 V IOL Low-level output current 2.3 V to 2.7 V 3 V to 3.6 V t/v Input transition rise or fall rate 3-state 1.95 V to 2.7 V 2.7 V to 3.6 V 0 0 0 VCCA x 0.65 1.6 2 VCCA x 0.35 0.7 0.8 VCCO 3.6 3.6 -6 -8 -9 -12 6 8 9 12 5 ns/V mA mA V V VCCO MIN 1.4 1.4 VCCI x 0.65 1.6 2 VCCI x 0.35 0.7 0.8 MAX 3.6 3.6 UNIT V V
V
V
V
V
PRODUCT PREVIEW
TA Operating free-air temperature -40 85 C NOTES: 4. VCCI is the VCC associated with the data input port. 5. VCCO is the VCC associated with the output port. 6. All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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SN74AVC20T245 20 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS
SCES518 - DECEMBER 2003
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Notes 7 and 8)
PARAMETER TEST CONDITIONS IOH = -100 A IOH = -6 mA VOH IOH = -8 mA IOH = -9 mA IOH = -12 mA IOL = 100 A VOL IOL = 6 mA IOL = 8 mA IOL = 9 mA IOL = 12 mA II Ioff Control inputs A port B port A or B ports IOZ B port A port VO = VCCO or GND, VI = VCCI or GND VI or VO= 0 to 3.6 V OE = VIH OE = don't care VI = VCCA or GND VI = VIH VI = VIH VI = VIH VI = VIH VI = VIH VI = VIL VI = VIL VI = VIL VI = VIL VI = VIL VCCA 1.4 V to 3.6 V 1.4 V 1.65 V 2.3 V 3V 1.4 V to 3.6 V 1.4 V 1.65 V 2.3 V 3V 1.4 V to 3.6 V 0V 0 to 3.6 V 3.6 V 0V 3.6 V 1.6 V 1.95 V 2.7 V ICCA VI = VCCI or GND, IO = 0 0V 3.6 V 3.6 V 1.6 V 1.95 V 2.7 V ICCB VI = VCCI or GND, IO = 0 0V 3.6 V 3.6 V ICCA + ICCB (see Table 1) Ci Cio Control inputs A or B ports VI = VCCI or GND, VI = 3.3 V or GND VO = 3.3 V or GND IO = 0 1.4 V to 3.6 V 3.3 V 3.3 V VCCB 1.4 V to 3.6 V 1.4 V 1.65 V 2.3 V 3V 1.4 V to 3.6 V 1.4 V 1.65 V 2.3 V 3V 3.6 V 0 to 3.6 V 0V 3.6 V 3.6 V 0V 1.6 V 1.95 V 2.7 V 3.6 V 0V 3.6 V 1.6 V 1.95 V 2.7 V 3.6 V 0V 3.6 V 1.4 V to 3.6 V 3.3 V 3.3 V 2.5 2.5 2.5 MIN TYP MAX UNIT VCCO-0.2 TBD 1.2 1.75 2.3 0.2 0.35 0.45 0.55 0.7 2.5 10 10 5 5 5 8 9 13 -1 12 20 8 9 13 12 -1 20 TBD A pF pF A A A A A A A A V V
All typical values are at TA = 25C. For I/O ports, the parameter IOZ includes the input leakage current. NOTES: 7. VCCO is the VCC associated with the output port. 8. VCCI is the VCC associated with the input port.
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PRODUCT PREVIEW
SCES518 - DECEMBER 2003
SN74AVC20T245 20 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS
switching characteristics over recommended operating free-air temperature range, VCCA = 1.5 V 0.1 V (see Figure 1)
PARAMETER tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ FROM (INPUT) TO (OUTPUT) VCCB = 1.5 V 0.1 V MIN MAX VCCB = 1.8 V 0.15 V MIN MAX VCCB = 2.5 V 0.2 V MIN MAX VCCB = 3.3 V 0.3 V MIN MAX ns ns ns ns ns ns UNIT
A B OE OE OE OE
B A A B A B
PRODUCT PREVIEW
switching characteristics over recommended operating free-air temperature range, VCCA = 1.8 V 0.15 V (see Figure 1)
PARAMETER tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ FROM (INPUT) TO (OUTPUT) VCCB = 1.5 V 0.1 V MIN MAX VCCB = 1.8 V 0.15 V MIN MAX VCCB = 2.5 V 0.2 V MIN MAX VCCB = 3.3 V 0.3 V MIN MAX ns ns ns ns ns ns UNIT
A B OE OE OE OE
B A A B A B
6
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SN74AVC20T245 20 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS
SCES518 - DECEMBER 2003
switching characteristics over recommended operating free-air temperature range, VCCA = 2.5 V 0.2 V (see Figure 1)
PARAMETER tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ FROM (INPUT) TO (OUTPUT) VCCB = 1.5 V 0.1 V MIN MAX VCCB = 1.8 V 0.15 V MIN MAX VCCB = 2.5 V 0.2 V MIN MAX VCCB = 3.3 V 0.3 V MIN MAX ns ns ns ns ns ns UNIT
A B OE OE OE OE
B A A B A B
switching characteristics over recommended operating free-air temperature range, VCCA = 3.3 V 0.3 V (see Figure 1)
PARAMETER tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ FROM (INPUT) TO (OUTPUT) VCCB = 1.5 V 0.1 V MIN MAX VCCB = 1.8 V 0.15 V MIN MAX VCCB = 2.5 V 0.2 V MIN MAX VCCB = 3.3 V 0.3 V MIN MAX ns ns ns ns ns ns UNIT
A B OE OE OE OE
B A A B A B
operating characteristics, VCCA and VCCB = 3.3 V, TA = 25C
PARAMETER Power dissipation capacitance per transceiver, A port input, B port output CpdA Power dissipation capacitance per transceiver, B port input, A port output Power dissipation capacitance per transceiver, A port input, B port output CpdB Power dissipation capacitance per transceiver, B port input, A port output Outputs enabled Outputs disabled Outputs enabled Outputs disabled Outputs enabled Outputs disabled Outputs enabled Outputs disabled CL = 0, f = 10 MHz pF CL = 0, f = 10 MHz pF TEST CONDITIONS TYP UNIT
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PRODUCT PREVIEW
SCES518 - DECEMBER 2003
SN74AVC20T245 20 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS
typical total static power consumption (ICCA and ICCB)
VCCB 1.5 V 1.8 V 2.5 V 3.3 V VCCA 1.5 V TBD TBD TBD TBD 1.8 V TBD TBD TBD TBD 2.5 V TBD TBD TBD TBD 3.3 V TBD TBD TBD TBD nA UNIT
TABLE 1
PRODUCT PREVIEW
8
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SN74AVC20T245 20 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS
SCES518 - DECEMBER 2003
TYPICAL CHARACTERISTICS
TYPICAL PROPAGATION DELAY vs LOAD CAPACITANCE, TA = 25C,VCCA = 1.5 V 0.1 V
4 3.75 3.5 3.25 3 T PLH - ns 2.75 2.5 2.25 2 1.75 1.5 5 10 15 CL - pF 20 25 30 T PHL - ns 4 3.75 3.5 3.25 3 2.75 2.5 2.25 2 1.75 1.5 5 10 15 CL - pF 20 25 30
TYPICAL PROPAGATION DELAY vs LOAD CAPACITANCE, TA = 25C,VCCA = 1.8 V 0.15 V
4 3.75 3.5 3.25 3 T PLH - ns 2.75 2.5 2.25 2 1.75 1.5 5 10 15 CL - pF 20 25 30 T PHL - ns 4 3.75 3.5 3.25 3 2.75 2.5 2.25 2 1.75 1.5 5 10 15 CL - pF 20 25 30
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PRODUCT PREVIEW
SCES518 - DECEMBER 2003
SN74AVC20T245 20 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS
TYPICAL PROPAGATION DELAY vs LOAD CAPACITANCE, TA = 25C,VCCA = 2.5 V 0.2 V
4 3.75 3.5 3.25 3 T PLH - ns 2.75 2.5 2.25 2 1.75 T PHL - ns 5 10 15 CL - pF 20 25 30 4 3.75 3.5 3.25 3 2.75 2.5 2.25 2 1.75 1.5 5 10 15 CL - pF 20 25 30
PRODUCT PREVIEW
1.5
TYPICAL PROPAGATION DELAY vs LOAD CAPACITANCE, TA = 25C,VCCA = 3.3 V 0.3 V
4 3.75 3.5 3.25 3 T PLH - ns 2.75 2.5 2.25 2 1.75 1.5 5 10 15 CL - pF 20 25 30 T PHL - ns 4 3.75 3.5 3.25 3 2.75 2.5 2.25 2 1.75 1.5 5 10 15 CL - pF 20 25 30
10
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SN74AVC20T245 20 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS
SCES518 - DECEMBER 2003
PARAMETER MEASUREMENT INFORMATION
2 x VCCO From Output Under Test CL (see Note A) RL RL S1 Open GND TEST tpd tPLZ/tPZL tPHZ/tPZH S1 Open 2 x VCCO GND
LOAD CIRCUIT
tw VCCI Input VCCI/2 VCCI/2 0V VOLTAGE WAVEFORMS PULSE DURATION
VCCO 1.5 V 0.1 V 1.8 V 0.15 V 2.5 V 0.2 V 3.3 V 0.3 V
CL 15 pF 15 pF 15 pF 15 pF
RL 2 k 2 k 2 k 2 k
VTP 0.1 V 0.15 V 0.15 V 0.3 V Output Control (low-level enabling)
VCCA VCCA/2 VCCA/2 0V tPZL tPLZ VCCO VCCO/2 tPZH VOL + VTP tPHZ VOH - VTP VOH 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES VOL
VCCI Input VCCI/2 VCCI/2 0V tPLH tPHL VOH VCCO/2 VOL
Output Waveform 1 S1 at 2 x VCCO (see Note B) Output Waveform 2 S1 at GND (see Note B)
Output
VCCO/2 VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES
VCCO/2
NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRRv10 MHz, ZO = 50 , dv/dt 1 V/ns, dv/dt 1 V/ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. VCCI is the VCC associated with the input port. I. VCCO is the VCC associated with the output port.
Figure 1. Load Circuit and Voltage Waveforms
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PRODUCT PREVIEW
MECHANICAL DATA
MPDS006C - FEBRUARY 1996 - REVISED AUGUST 2000
DGV (R-PDSO-G**)
24 PINS SHOWN 0,23 0,13 13
PLASTIC SMALL-OUTLINE
0,40 24
0,07 M
0,16 NOM 4,50 4,30 6,60 6,20
Gage Plane
0,25 0- 8 1 A 12 0,75 0,50
Seating Plane 1,20 MAX 0,15 0,05 0,08
PINS ** DIM A MAX A MIN
14 3,70 3,50
16 3,70 3,50
20 5,10 4,90
24 5,10 4,90
38 7,90 7,70
48 9,80 9,60
56 11,40 11,20
4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. Falls within JEDEC: 24/48 Pins - MO-153 14/16/20/56 Pins - MO-194
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MECHANICAL DATA
MTSS003D - JANUARY 1995 - REVISED JANUARY 1998
DGG (R-PDSO-G**)
48 PINS SHOWN
PLASTIC SMALL-OUTLINE PACKAGE
0,50 48
0,27 0,17 25
0,08 M
6,20 6,00
8,30 7,90
0,15 NOM
Gage Plane 0,25 0- 8 A 0,75 0,50
1
24
Seating Plane 1,20 MAX 0,15 0,05 0,10
PINS ** DIM A MAX
48
56
64
12,60
14,10
17,10
A MIN
12,40
13,90
16,90 4040078 / F 12/97
NOTES: A. B. C. D.
All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold protrusion not to exceed 0,15. Falls within JEDEC MO-153
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