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SN74AVC8T245 8 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS SCES517 - DECEMBER 2003 D Control Inputs VIH/VIL Levels Are D D Referenced to VCCA Voltage VCC Isolation Feature - If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State Ioff Supports Partial-Power-Down Mode Operation DGV OR PW PACKAGE (TOP VIEW) D Fully Configurable Dual-Rail Design Allows D Each Port to Operate Over the Full 1.4-V to 3.6-V Power-Supply Range I/Os Are 4.6-V Tolerant RGY PACKAGE (TOP VIEW) VCCA 9 10 11 12 16 15 14 13 7 8 9 10 11 12 13 17 B5 16 B6 15 B7 14 B8 NC - No internal connection description/ordering information This 8-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A-port is designed to track VCCA. VCCA accepts any supply voltage from 1.4 V to 3.6 V. The B-port is designed to track VCCB. VCCB accepts any supply voltage from 1.4 V to 3.6 V. This allows universal low-voltage bidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes. The SN74AVC8T245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are effectively isolated. ORDERING INFORMATION TA PACKAGE QFN - RGY -40C to 85C TSSOP - PW Tape and reel Tube Tape and reel ORDERABLE PART NUMBER SN74AVC8T245RGYR SN74AVC8T245PW SN74AVC8T245PWR TBD TOP-SIDE MARKING TBD TVSOP - DGV Tape and reel SN74AVC8T245DGVR TBD Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. Copyright 2003, Texas Instruments Incorporated POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 PRODUCT PREVIEW VCCA DIR A1 A2 A3 A4 A5 A6 A7 A8 GND GND 1 2 3 4 5 6 7 8 24 23 22 21 20 19 18 17 VCCB VCCB OE B1 B2 B3 B4 B5 B6 B7 B8 GND 1 24 23 VCCB 22 OE 21 B1 20 B2 19 B3 18 B4 DIR A1 A2 A3 A4 A5 A6 A7 A8 GND 2 3 4 5 6 GND GND VCCB SCES517 - DECEMBER 2003 SN74AVC8T245 8 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS description/ordering information (continued) The SN74AVC8T245 is designed so that the control pins (DIR and OE) are supplied by VCCA. The SN74AVC8T245 solution is compatible with a single-supply system and can be replaced later with a '245 function with minimal PCB redesign. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The VCC isolation feature ensures that if either VCC input is at GND, both ports are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. FUNCTION TABLE (each 8-bit section) INPUTS OE L DIR L H X OPERATION B data to A bus A data to B bus Isolation PRODUCT PREVIEW L H logic diagram (positive logic) 2 DIR 22 OE 3 A1 21 B1 To Seven Other Channels 2 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SN74AVC8T245 8 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS SCES517 - DECEMBER 2003 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, VCCA and VCCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 4.6 V Input voltage range, VI (see Note 1): I/O ports (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 4.6 V I/O ports (B port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 4.6 V Control inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 4.6 V Voltage range applied to any output in the high-impedance or power-off state, VO (see Note 1): A port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 4.6 V B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 4.6 V Voltage range applied to any output in the high or low state, VO (see Notes 1 and 2): A port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to VCCA + 0.5 V B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to VCCB + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Continuous current through VCCA, VCCB, or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA Package thermal impedance, JA (see Note 3): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88C/W RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TBDC/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. 2. The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current rating is observed. 3. The package thermal impedance is calculated in accordance with JESD 51-7. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 PRODUCT PREVIEW SCES517 - DECEMBER 2003 SN74AVC8T245 8 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS recommended operating conditions (see Notes 4 through 6) VCCI VCCA VCCB VIH Supply voltage Supply voltage 1.4 V to 1.95 V High-level input voltage Data inputs 1.95 V to 2.7 V 2.7 V to 3.6 V 1.4 V to 1.95 V VIL Low-level input voltage Data inputs 1.95 V to 2.7 V 2.7 V to 3.6 V 1.4 V to 1.95 V VIH High-level input voltage DIR and OE (Referenced to VCCA) 1.95 V to 2.7 V 2.7 V to 3.6 V 1.4 V to 1.95 V VIL Low-level input voltage DIR and OE (Referenced to VCCA) Active state VO VI Output voltage Input voltage 1.4 V to 1.6 V 1.65 V to 1.95 V IOH High-level output current 2.3 V to 2.7 V 3 V to 3.6 V 1.4 V to 1.6 V 1.65 V to 1.95 V IOL Low-level output current 2.3 V to 2.7 V 3 V to 3.6 V t/v Input transition rise or fall rate 3-state 1.95 V to 2.7 V 2.7 V to 3.6 V 0 0 0 VCCA x 0.65 1.6 2 VCCA x 0.35 0.7 0.8 VCCO 3.6 3.6 -6 -8 -9 -12 6 8 9 12 5 ns/V mA mA V V VCCO MIN 1.4 1.4 VCCI x 0.65 1.6 2 VCCI x 0.35 0.7 0.8 MAX 3.6 3.6 UNIT V V V V V V PRODUCT PREVIEW TA Operating free-air temperature -40 85 C NOTES: 4. VCCI is the VCC associated with the data input port. 5. VCCO is the VCC associated with the output port. 6. All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 4 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SN74AVC8T245 8 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS SCES517 - DECEMBER 2003 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Notes 7 and 8) PARAMETER TEST CONDITIONS IOH = -100 A IOH = -6 mA VOH IOH = -8 mA IOH = -9 mA IOH = -12 mA IOL = 100 A VOL IOL = 6 mA IOL = 8 mA IOL = 9 mA IOL = 12 mA II Ioff Control inputs A port B port A or B ports IOZ B port A port VO = VCCO or GND, VI = VCCI or GND VI or VO= 0 to 3.6 V OE = VIH OE = don't care VI = VCCA or GND VI = VIH VI = VIH VI = VIH VI = VIH VI = VIH VI = VIL VI = VIL VI = VIL VI = VIL VI = VIL VCCA 1.4 V to 3.6 V 1.4 V 1.65 V 2.3 V 3V 1.4 V to 3.6 V 1.4 V 1.65 V 2.3 V 3V 1.4 V to 3.6 V 0V 0 to 3.6 V 3.6 V 0V 3.6 V 1.6 V 1.95 V 2.7 V ICCA VI = VCCI or GND, IO = 0 0V 3.6 V 3.6 V 1.6 V 1.95 V 2.7 V ICCB VI = VCCI or GND, IO = 0 0V 3.6 V 3.6 V ICCA + ICCB (see Table 1) Ci Cio Control inputs A or B ports VI = VCCI or GND, VI = 3.3 V or GND VO = 3.3 V or GND IO = 0 1.4 V to 3.6 V 3.3 V 3.3 V VCCB 1.4 V to 3.6 V 1.4 V 1.65 V 2.3 V 3V 1.4 V to 3.6 V 1.4 V 1.65 V 2.3 V 3V 3.6 V 0 to 3.6 V 0V 3.6 V 3.6 V 0V 1.6 V 1.95 V 2.7 V 3.6 V 0V 3.6 V 1.6 V 1.95 V 2.7 V 3.6 V 0V 3.6 V 1.4 V to 3.6 V 3.3 V 3.3 V 2.5 2.5 2.5 MIN TYP MAX UNIT VCCO-0.2 TBD 1.2 1.75 2.3 0.2 0.35 0.45 0.55 0.7 2.5 5 5 5 5 5 3 4 5 -1 4 8 3 4 5 4 -1 8 TBD A pF pF A A A A A A A A V V All typical values are at TA = 25C. For I/O ports, the parameter IOZ includes the input leakage current. NOTES: 7. VCCO is the VCC associated with the output port. 8. VCCI is the VCC associated with the input port. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 5 PRODUCT PREVIEW SCES517 - DECEMBER 2003 SN74AVC8T245 8 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS switching characteristics over recommended operating free-air temperature range, VCCA = 1.5 V 0.1 V (see Figure 1) PARAMETER tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ FROM (INPUT) TO (OUTPUT) VCCB = 1.5 V 0.1 V MIN MAX VCCB = 1.8 V 0.15 V MIN MAX VCCB = 2.5 V 0.2 V MIN MAX VCCB = 3.3 V 0.3 V MIN MAX ns ns ns ns ns ns UNIT A B OE OE OE OE B A A B A B PRODUCT PREVIEW switching characteristics over recommended operating free-air temperature range, VCCA = 1.8 V 0.15 V (see Figure 1) PARAMETER tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ FROM (INPUT) TO (OUTPUT) VCCB = 1.5 V 0.1 V MIN MAX VCCB = 1.8 V 0.15 V MIN MAX VCCB = 2.5 V 0.2 V MIN MAX VCCB = 3.3 V 0.3 V MIN MAX ns ns ns ns ns ns UNIT A B OE OE OE OE B A A B A B 6 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SN74AVC8T245 8 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS SCES517 - DECEMBER 2003 switching characteristics over recommended operating free-air temperature range, VCCA = 2.5 V 0.2 V (see Figure 1) PARAMETER tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ FROM (INPUT) TO (OUTPUT) VCCB = 1.5 V 0.1 V MIN MAX VCCB = 1.8 V 0.15 V MIN MAX VCCB = 2.5 V 0.2 V MIN MAX VCCB = 3.3 V 0.3 V MIN MAX ns ns ns ns ns ns UNIT A B OE OE OE OE B A A B A B switching characteristics over recommended operating free-air temperature range, VCCA = 3.3 V 0.3 V (see Figure 1) PARAMETER tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ FROM (INPUT) TO (OUTPUT) VCCB = 1.5 V 0.1 V MIN MAX VCCB = 1.8 V 0.15 V MIN MAX VCCB = 2.5 V 0.2 V MIN MAX VCCB = 3.3 V 0.3 V MIN MAX ns ns ns ns ns ns UNIT A B OE OE OE OE B A A B A B operating characteristics, VCCA and VCCB = 3.3 V, TA = 25C PARAMETER Power dissipation capacitance per transceiver, A port input, B port output CpdA Power dissipation capacitance per transceiver, B port input, A port output Power dissipation capacitance per transceiver, A port input, B port output CpdB Power dissipation capacitance per transceiver, B port input, A port output Outputs enabled Outputs disabled Outputs enabled Outputs disabled Outputs enabled Outputs disabled Outputs enabled Outputs disabled CL = 0, f = 10 MHz pF CL = 0, f = 10 MHz pF TEST CONDITIONS TYP UNIT POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 7 PRODUCT PREVIEW SCES517 - DECEMBER 2003 SN74AVC8T245 8 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS typical total static power consumption (ICCA and ICCB) VCCB 1.5 V 1.8 V 2.5 V 3.3 V VCCA 1.5 V TBD TBD TBD TBD 1.8 V TBD TBD TBD TBD 2.5 V TBD TBD TBD TBD 3.3 V TBD TBD TBD TBD nA UNIT TABLE 1 PRODUCT PREVIEW 8 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SN74AVC8T245 8 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS SCES517 - DECEMBER 2003 TYPICAL CHARACTERISTICS TYPICAL PROPAGATION DELAY vs LOAD CAPACITANCE, TA = 25C,VCCA = 1.5 V 0.1 V 4 3.75 3.5 3.25 3 T PLH - ns 2.75 2.5 2.25 2 1.75 1.5 5 10 15 CL - pF 20 25 30 T PHL - ns 4 3.75 3.5 3.25 3 2.75 2.5 2.25 2 1.75 1.5 5 10 15 CL - pF 20 25 30 TYPICAL PROPAGATION DELAY vs LOAD CAPACITANCE, TA = 25C,VCCA = 1.8 V 0.15 V 4 3.75 3.5 3.25 3 T PLH - ns 2.75 2.5 2.25 2 1.75 1.5 5 10 15 CL - pF 20 25 30 T PHL - ns 4 3.75 3.5 3.25 3 2.75 2.5 2.25 2 1.75 1.5 5 10 15 CL - pF 20 25 30 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 9 PRODUCT PREVIEW SCES517 - DECEMBER 2003 SN74AVC8T245 8 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS TYPICAL PROPAGATION DELAY vs LOAD CAPACITANCE, TA = 25C,VCCA = 2.5 V 0.2 V 4 3.75 3.5 3.25 3 T PLH - ns 2.75 2.5 2.25 2 1.75 T PHL - ns 5 10 15 CL - pF 20 25 30 4 3.75 3.5 3.25 3 2.75 2.5 2.25 2 1.75 1.5 5 10 15 CL - pF 20 25 30 PRODUCT PREVIEW 1.5 TYPICAL PROPAGATION DELAY vs LOAD CAPACITANCE, TA = 25C,VCCA = 3.3 V 0.3 V 4 3.75 3.5 3.25 3 T PLH - ns 2.75 2.5 2.25 2 1.75 1.5 5 10 15 CL - pF 20 25 30 T PHL - ns 4 3.75 3.5 3.25 3 2.75 2.5 2.25 2 1.75 1.5 5 10 15 CL - pF 20 25 30 10 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SN74AVC8T245 8 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS SCES517 - DECEMBER 2003 PARAMETER MEASUREMENT INFORMATION 2 x VCCO From Output Under Test CL (see Note A) RL RL S1 Open GND TEST tpd tPLZ/tPZL tPHZ/tPZH S1 Open 2 x VCCO GND LOAD CIRCUIT tw VCCI Input VCCI/2 VCCI/2 0V VOLTAGE WAVEFORMS PULSE DURATION VCCO 1.5 V 0.1 V 1.8 V 0.15 V 2.5 V 0.2 V 3.3 V 0.3 V CL 15 pF 15 pF 15 pF 15 pF RL 2 k 2 k 2 k 2 k VTP 0.1 V 0.15 V 0.15 V 0.3 V Output Control (low-level enabling) VCCA VCCA/2 VCCA/2 0V tPZL tPLZ VCCO VCCO/2 tPZH VOL + VTP tPHZ VOH - VTP VOH 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES VOL VCCI Input VCCI/2 VCCI/2 0V tPLH tPHL VOH VCCO/2 VOL Output Waveform 1 S1 at 2 x VCCO (see Note B) Output Waveform 2 S1 at GND (see Note B) Output VCCO/2 VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VCCO/2 NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRRv10 MHz, ZO = 50 , dv/dt 1 V/ns, dv/dt 1 V/ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. VCCI is the VCC associated with the input port. I. VCCO is the VCC associated with the output port. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 11 PRODUCT PREVIEW MECHANICAL DATA MPDS006C - FEBRUARY 1996 - REVISED AUGUST 2000 DGV (R-PDSO-G**) 24 PINS SHOWN 0,23 0,13 13 PLASTIC SMALL-OUTLINE 0,40 24 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0- 8 1 A 12 0,75 0,50 Seating Plane 1,20 MAX 0,15 0,05 0,08 PINS ** DIM A MAX A MIN 14 3,70 3,50 16 3,70 3,50 20 5,10 4,90 24 5,10 4,90 38 7,90 7,70 48 9,80 9,60 56 11,40 11,20 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. Falls within JEDEC: 24/48 Pins - MO-153 14/16/20/56 Pins - MO-194 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 MECHANICAL DATA MTSS001C - JANUARY 1995 - REVISED FEBRUARY 1999 PW (R-PDSO-G**) 14 PINS SHOWN PLASTIC SMALL-OUTLINE PACKAGE 0,65 14 8 0,30 0,19 0,10 M 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 A 7 0- 8 0,75 0,50 Seating Plane 1,20 MAX 0,15 0,05 0,10 PINS ** DIM A MAX 8 14 16 20 24 28 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-153 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. 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