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 Differential Two-Wire Hall Effect Sensor IC
TLE 4942 TLE 4942 C
Features
* * * * * * * * * * * * * Two-wire PWM current interface Detection of rotation direction Airgap diagnosis Assembly position diagnosis Dynamic self-calibration principle Single chip solution No external components needed High sensitivity South and north pole pre-induction possible High resistance to Piezo effects Large operating air-gaps Wide operating temperature range TLE 4942 C: 1.8nF overmolded capacitor P-SSO-2-1
Type TLE 4942 TLE 4942 C
Marking 4200E4 42C0E4
Ordering Code Q62705-K428 Q 62705-K437
Package P-SSO-2-1 P-SSO-2-2
TLE 4942, TLE 4942 C
The Hall Effect sensor IC TLE 4942 is designed to provide information about rotational speed, direction of rotation, assembly position and limit airgap to modern vehicle dynamics control systems and ABS. The output has been designed as a two wire current interface based on a Pulse Width Modulation principle. The sensor operates without external components and combines a fast power-up time with a low cut-off frequency. Excellent accuracy and sensitivity is specified for harsh automotive requirements as a wide temperature range, high ESD robustness and high EMC resilience. State-of-the-art BiCMOS technology is used for monolithic integration of the active sensor areas and the signal conditioning. The TLE 4942 C is additionally provided with an overmolded 1.8nF capacitor for improved EMI performance.
TLE 4942 - TLE 4942C Data Sheet
2
April 2001
TLE 4942, TLE 4942 C
Functional Description The differential Hall Effect IC detects the motion of ferromagnetic or permanent magnet structures by measuring the differential flux density of the magnetic field. To detect the motion of ferromagnetic objects the magnetic field must be provided by a backbiasing permanent magnet. Either the South or North pole of the magnet can be attached to the rear, unmarked side of the IC package. Magnetic offsets of up to 20mT and mechanical offsets are cancelled out through a self-calibration algorithm. Only a few transitions are necessary for the self-calibration procedure. After the initial self-calibration sequence switching occurs when the input signal crosses the arithmetic mean of its max. and min. values (e.g. zero-crossing for sinusoidal signals). The ON and OFF state of the IC are indicated by High and Low current consumption. Each zero crossing of the magnetic input signal triggers an output pulse.
Magnetic signal
Pulse length
Output Signal I
Figure 3
Differential Magnetic Flux Density B
Zero-crossing principle and corresponding output pulses
Range for EL pulse: B EL Range for warning pulse: B Warning BLimit (max .airgap exceeded) t
Figure 4
Definition of differential magnetic flux density ranges
3 April 2001
TLE 4942 - TLE 4942C Data Sheet
TLE 4942, TLE 4942 C
Pin Configuration (view on branded side of component)
2.67
S 0015 S 0015 4942 4200E
Date Code Marking
1.44 2.5
Center of sensitive area 0.15
VCC GND VCC GND
Figure 1
"Vcc" power supply regulator
main comp oscillator hall probes:
(syst clock)
"signal"
right
-
offset DAC
PGA
speed ADC digital
gain range
circuit
center
"x" left "x"= (left + right)/2 - center
direction ADC
Figure 2
Block diagram
TLE 4942 - TLE 4942C Data Sheet
4
April 2001
TLE 4942, TLE 4942 C
In addition to the speed signal, the following information is provided by varying the length of the output pulses in Figure 3 (PWM modulation): Airgap Warning range = Warning Warning information is issued in the output pulse length when the magnetic field is below a critical value. (E. g. the airgap between the Hall Effect IC and the target wheel exceeds a critical value). The device works with reduced functionality. Assembly position range = EL EL information is issued in the output pulse length when the magnetic field is below a predefined value (the airgap between the Hall Effect IC and the target wheel e xceeds a predefined value). The device works with full functionality. Direction of rotation right = DR-R DR-R information is issued in the output pulse length when the target wheel in front of the Hall Effect IC moves from the pin GND to the pin V CC. Direction of rotation left = DR-L DR-L information is issued in the output pulse length when the target wheel in front of the Hall Effect IC moves from the pin V CC to the pin GND.
DR-L
S 0015 4942
DR-R
Figure 5
Definition of rotation direction
TLE 4942 - TLE 4942C Data Sheet
5
April 2001
TLE 4942, TLE 4942 C
Circuit Description The circuit is supplied internally by a voltage regulator. An on-chip oscillator serves as a clock generator for the DSP and the output encoder.
Speed signal circuitry: TLE 4942 speed signal path comprises of a pair of Hall Effect probes, separated from each other by 2.5mm, a differential amplifier including noise limiting low-pass filter, and a comparator triggering a switched current output stage. An offset cancellation feedback loop is provided through a signal-tracking A/D converter, a digital signal processor (DSP), and an offset cancellation D/A converter. During the power-up phase (uncalibrated mode) the output is disabled. The differential input signal is digitized in the speed A/D converter and fed into the DSP part of the circuit. The minimum and maximum values of the input signal are extracted and their corresponding arithmetic mean value is calculated. The offset of this mean value is determined and fed into the offset cancellation DAC. After successful correction of the offset, the output switching is enabled. In running mode (calibrated mode) the offset correction algorithm of the DSP is switched into a low-jitter mode, thereby avoiding oscillation of the offset DAC LSB. Switching occurs at zero-crossover. It is only affected by the small residual offset of the comparator and by the propagation delay time of the signal path, which is mainly determined by the noise limiting filter. Signals which are below a predefined threshold BLimit are not detected. This prevents unwanted switching. The comparator also detects whether the signal amplitude exceeds BWarning or B EL. This information is fed into the DSP and the output encoder. The pulse length of the High output current is generated according to the rotational speed, the direction of rotation and the magnetic field strength.
Direction signal circuitry: The differential signal between a third Hall probe and the mean of the differential Hall probe pair is obtained from the direction input amplifier. This signal is digitized by the direction ADC and fed into the DSP circuitry. There, the phase of the signal referring to the speed signal is analyzed and the direction information is forwarded to the output encoder.
TLE 4942 - TLE 4942C Data Sheet
6
April 2001
TLE 4942, TLE 4942 C
Absolute Maximum Ratings Tj = -40 to 150C, 4.5V Vcc 16.5V Parameter Supply voltage Supply voltage Supply voltage Supply voltage Supply voltage Supply voltage Reverse polarity current Junction temperature Junction temperature Junction temperature Junction temperature Active lifetime Storage Temperature Thermal Resistance P-SSO-2-1 ESD Symbol Vcc Vcc Vcc Vcc Vcc Vcc Irev Tj Tj Tj Tj tB,active Ts RthJA UESD 10000 -40 Limit values Min Max -0.3 16.5 20 22 24 27 200 150 160 170 190 150 190 2 Unit Remarks Tj < 80C Tj = 170C Tj = 150C t = 10 * 5 min t = 10 * 5 min, R M=75 t = 400 ms, RM=75 External current limitation required, t < 4h 5000 h, Vcc < 16.5V 2500 h, Vcc < 16.5V 500 h, Vcc < 16.5V 4 h, Vcc < 16.5V
V V V V V mA C C C C h C K/W kV
1)
According to standard EIA/JESD22-A114-B HBM 2) R=1500 , C=100pF
1) can be improved significantly by further processing like overmolding 2) covers MIL STD 883D
Note: Stresses in excess of those listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
TLE 4942 - TLE 4942C Data Sheet
7
April 2001
TLE 4942, TLE 4942 C
Operating Range Parameter Supply voltage Supply voltage ripple Junction temperature Junction temperature Pre-induction Pre-induction offset between outer probes Pre-induction offset between mean of outer probes and center probe Differential Induction Symbol VCC VAC Tj Tj B0 Bstat., l/r Bstat., m/o Limit values Min Max 4.5 20 6 -40 150 170 +500 +20 +20 Unit V Vpp C C mT mT mT Remarks
VCC=13V 0 < f < 50kHz VCC 16.5V, increased jitter permissible
-500 -20 -20
B
-120
+120
mT
Note: Within the operating range the functions given in the circuit description are fulfilled.
TLE 4942 - TLE 4942C Data Sheet
8
April 2001
TLE 4942, TLE 4942 C
AC/DC Characteristics All values specified at constant amplitude and offset of input signal Parameter Supply current Supply current Supply current ratio Output rise/fall slew rate TLE 4942 Output rise/fall slew rate TLE 4942 C Current ripple dIX/dV CC Limit threshold Airgap warning threshold Limit - Airgap warning threshold ratio Assembly position threshold Symbol ILow IHigh IHigh/ILow tr, tf Limit values Min Typ Max 5.9 7 8.4 11.8 14 16.8 1.9 12 26 7.5 24 Unit mA mA mA/s RM 150 RM 750 See Figure 6. RM = 75 T < 125C T < 170C See Figure 6. A/V mT mT Remarks
tr, tf
8 8
22 26 90 1.5 2.6 2.7 9.6
mA/s
IX BLimit BWarning BWarning / BLimit BEL
0.35 0.9 1.3 5.2
0.8 1.4 1.75 7.2
mT
at room temp
TLE 4942 - TLE 4942C Data Sheet
9
April 2001
TLE 4942, TLE 4942 C
Initial calibration delay time Magnetic edges required for initial calibration1) Number of emitted pulses with invalid supplementary information 2) Frequency Frequency changes Duty cycle
t d,input nstart
300 6*
s magn. edges magn. edges
Additional to nstart
nDR-Start
3*
f df/dt duty
1 40 50
2500 100 60
Hz Hz/ms %
3)
Jitter, Tj < 150C Tj < 170C Jitter, Tj < 150C Tj < 170C Jitter at board net ripple
* See Appendix B
1)
SJit-close
2 3
% % % % %
SJit-far
4 6
SJit-AC
2
Measured @B = 2mT sine wave Def. Figure 7 1 s value VCC = 12 V ?B 2mT 1 s value VCC = 12 V (2mT ) B > BLimit VCC=13V6Vpp 0 < f < 50kHz B = 15 mT
The sensor requires up to nstart magnetic switching edges for valid speed information after power-up or after a stand still condition. During that phase the output is disabled.
2)
The first 3 pulses containing direction information can have the wrong rotation information. (The first pulse after starting with the speed signal can have any length < tStop. At BLimit output pulses might have any length < tStop).
3)
During fast offset alterations, due to the calibration algorithm, exceeding the specified duty cycle is permitted for short time periods.
TLE 4942 - TLE 4942C Data Sheet
10
April 2001
TLE 4942, TLE 4942 C
I tr IHigh
90% 50% 10%
tf
ILow
t1
t
Figure 6
Definition of rise and fall time
Timing Characteristics Parameter Pre-low length Length of Warning pulse Length of DR-L pulse Length of DR-R pulse Length of DR-L & EL pulse Length of DR-R & EL pulse Output of EL pulse, maximum frequency Length of stand still pulse Stand still period 1)
1)
Symbol tpre-low tWarning tDR-L tDR-R tDR-L&EL tDR-R&EL f EL, max tstop Tstop
Limit values Min Typ Max 38 45 52 38 45 52 76 90 104 153 180 207 306 360 414 616 720 117 1.232 590 1.44 737 1.656 848 828
Unit s s s s s s Hz ms ms
Remarks
Def. Fig.9 Def. Fig. 9
If no magnetic switching edge is detected for a period longer than Tstop, the stand still pulse is issued.
TLE 4942 - TLE 4942C Data Sheet
11
April 2001
TLE 4942, TLE 4942 C
I IHigh
Xn Xn+1 Xn+2
ILow
t1 T
duty = t1 / T * 100%
t
Figure 7
Definition of duty cycle
PWM Current Interface Between each magnetic transition and the rising edge of the corresponding output pulse the output current is Low for tpre-low in order to allow reliable internal conveyance. Following the signal pulse (current is High ) is output. If the magnetic differential field exceeds BEL , the output pulse lengths are 90s or 180s respectively, depending on the direction of rotation. When the magnitude of the magnetic differential field is below B EL, the output pulse lengths are 360s and 720s respectively, depending on left or right rotation. Due to decreasing cycle times at higher frequencies, these longer pulses are only output up to frequencies of approximately 117Hz. For higher frequencies and differential magnetic fields below B EL, the output pulse lengths are 90s or 180s respectively. If the magnitude of the magnetic differential field is below BWarning, the output pulse length is 45s. The warning output is dominant, this means that close to the limit airgap the direction and the assembly position information are disabled. For magnitudes of the magnetic differential field below BLimit, signal is lost. In case no magnetic differential signal is detected for a time longer than the stand still period Tstop, the stop pulse is output. Typically with the first output stop pulse, the circuitry reverts to the uncalibrated mode.
TLE 4942 - TLE 4942C Data Sheet
12
April 2001
TLE 4942, TLE 4942 C
Internal sensor speed signal
Transferred signal : LR
tpre-low = 45s
Xn
Xn+1
Xn+2
tLR = 45s. Transferred signal : DR-L
tDR-L = 2 tLR Transferred signal: DR-R
tDR- R = 4 tLR Transferred signal: DR-L & EL
Transferred signal: DR-R & EL
tDR-L&AP = 8 tLR
Xn
Xn+1
tDR-R&AP = 16 tLR
Xn+2
Figure 8
Definition of PWM current interface
Internal sensor speed signal
Transferred signal: Stand still
tstop = 32 tLR
Tstop
Figure 9
Definition of stand still output pulse
TLE 4942 - TLE 4942C Data Sheet
13
April 2001
TLE 4942, TLE 4942 C
Duty cycle at fast changing frequencies If the duty cycle deviates from 50%, it is possible that the present pulse length is output entirely once and cut once, within the same period, see Figure 10.
Internal sensor speed signal at increasing speed
Transferred signal
Pulse lengths are shorter than half speed period
Pulse lengths are longer than half speed period
Figure 10
Deviation of duty cycle at fast changing frequencies
VCC Line VCC C= 1.8 nF GND
EMC Protection
Signal RM Sensor Mainframe
Figure 11
Application Circuit
Electro Magnetic Compatibility t.b.d.
TLE 4942 - TLE 4942C Data Sheet
14
April 2001
TLE 4942, TLE 4942 C
Package Outlines P-SSO-2-1 (Plastic Single Small Outline Package)
TLE 4942 - TLE 4942C Data Sheet
15
April 2001
TLE 4942, TLE 4942 C
P-SSO-2-2 (Plastic Single Small Outline Package)
TLE 4942 - TLE 4942C Data Sheet
16
April 2001


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