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RF3165 0 RoHS Compliant & Pb-Free Product Typical Applications * 3V W-CDMA Band 3, 4, and 9 Handsets * Multi-Mode W-CDMA 3G Handsets * Spread-Spectrum Systems 3V 1750MHZ W-CDMA LINEAR POWER AMPLIFIER MODULE Product Description The RF3165 is a high-power, high-efficiency linear amplifier module specifically designed for 3V handheld systems. The device is manufactured on an advanced third generation GaAs HBT process, and was designed for use as the final RF amplifier in 3V W-CDMA handheld digital cellular equipment, spread-spectrum systems, and other applications in the 1710MHz to 1785MHz band (Band 3). The RF3165 has a digital control line for low power applications to lower quiescent current. The RF3165 is assembled in at 16-pin, 3mmx3mm, QFN package. 3.00 Pin 1 ID A 1.45 Pin 1 ID 3.00 1.45 0.28 TYP 0.18 0.05 0.15 C 2 PLCS B 0.15 C 2 PLCS 0.40 TYP 0.20 0.10 M C A B 0.50 TYP Dimensions in mm. Shaded areas represent pin 1. 0.203 REF 0.08 C 0.08 C 0.925 0.775 0.102 REF C Optimum Technology Matching(R) Applied Si BJT Si Bi-CMOS InGaP/HBT VCCBIAS Package Style: QFN, 16-Pin, 3x3 GaAs HBT SiGe HBT GaN HEMT GaAs MESFET Si CMOS SiGe Bi-CMOS Features * Input/Output Internally Matched@50 * 28dBm Linear Output Power VCC1/IM NC IM * 42% Peak Linear Efficiency * 28dB Linear Gain * -41dBc ACLR @ 5MHz 12 VCC2 11 VCC2 10 VCC2 16 15 14 13 RF IN 1 GND 2 VMODE 3 Bias VREG 4 * HSDPA Capable Ordering Information RF3165 RF3165PCBA-410 3V 1750MHz W-CDMA Linear Power Amplifier Module Fully Assembled Evaluation Board Tel (336) 664 1233 Fax (336) 664 0454 http://www.rfmd.com 9 RF OUT 5 NC 6 NC 7 NC 8 NC RF Micro Devices, Inc. 7628 Thorndike Road Greensboro, NC 27409, USA Functional Block Diagram Rev A7 061201 2-1 RF3165 Absolute Maximum Ratings Parameter Supply Voltage (RF off) Supply Voltage (POUT 31dBm) Control Voltage (VREG) Input RF Power Mode Voltage (VMODE) Operating Temperature Storage Temperature Moisture Sensitivity Level IPC/JEDEC J-STD-20 Rating +8.0 +5.2 +3.9 +10 +3.9 -30 to +110 -40 to +150 MSL 2 @260 Unit V V V dBm V C C C Caution! ESD sensitive device. RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. RoHS marking based on EUDirective2002/95/EC (at time of this printing). However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s). Parameter Specification Min. Typ. Max. Unit Condition T=25oC Ambient, VCCBIAS =3.4V, VCC =3.4V, VREG =2.8V, VMODE =0V, and POUT =28dBm for all parameters (unless otherwise specified). Modulation is 3GPP 3.2 03-00 DPCCH+1DPDCH. High Gain Mode (VMODE Low) Operating Frequency Range Linear Gain Harmonics Maximum Linear Output Linear Efficiency Maximum ICC ACLR1 @ 5MHz ACLR2 @ 10MHz Input VSWR Output VSWR Stability Noise Power 1710 28 -15 28 42 442 -41 -51 2:1 6:1 10:1 -146 -115 -144 -151 -156 -140 IM Products IM 5MHz IM 10MHz -41 -51 -31 -41 dBc dBc dBm/Hz dBm/Hz dBm/Hz dBm/Hz dBm/Hz dBm/Hz 1785 MHz dB dBm dBm % mA dBc dBc f=2fo, 3fo No oscillation>-70dBc No damage -50 Rev A7 061201 RF3165 Parameter Low Gain/Low VCC Mode (VMODE High) Operating Frequency Range Linear Gain Maximum Linear Output Linear Efficiency ACLR @ 5MHz ACLR @ 10MHz Maximum ICC Input VSWR Output VSWR Stability Ruggedness IM Products IM 5MHz IM 10MHz -41 -53 3.2 0.6 1.5 3.4 -31 -41 4.2 4.2 93 83 3 6 25 0.5 0.5 2.95 3.0 0.5 3.0 dBc dBc V V V mA mA mA uA uS uS uA V V V V V IF offset fO +5MHz with CW signal=-40dBc IF offset fO +10MHz with CW signal=-40dBc 1710 26 21.0 -40 -54 125 2:1 6:1 10:1 1785 MHz dB dBm % dBc dBc mA No oscillation>-65dBc No damage Specification Min. Typ. Max. Unit Condition T=25oC Ambient, VCCBIAS =3.4V, VCC =1.5V, VREG =2.8V, VMODE =2.8V, and POUT =16dBm for all parameters (unless otherwise specified). Modulation is 3GPP 3.2 03-00 DPCCH+1DPDCH. Power Supply Supply Voltage (VCC1 and VCC2) VCC Bias High Gain Idle Current (ICC1 /ICC2 /ICCBIAS) Low Gain Idle Current (ICC1 /ICC2 /ICCBIAS) VREG Current VMODE Current RF Turn On/Off Time DC Turn On/Off Time Total Current (Power Down) VREG Low Voltage (Power Down) VREG High Voltage (Recommended) VREG High Voltage (Operational) VMODE Voltage VMODE Voltage Low power with DC to DC Converter VMODE =low and VREG =2.8V, VCC =3.4V VMODE =high and VREG =2.8V, VCC =1.5V 70 60 1 250 1.2 2 0.2 0 2.75 2.7 0 2.0 2.8 High Gain Mode Low Gain Mode Rev A7 061201 2-3 RF3165 Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Pkg Base Function RF IN GND VMODE VREG NC NC NC NC RF OUT VCC2 VCC2 VCC2 NC IM VCC1/IM VCCBIAS GND Description RF input internally matched to 50. This input is internally AC-coupled. Ground connection. For nominal operation (High Power mode), VMODE is set LOW. When set HIGH, devices are biased lower to improve efficiency at lower output levels. Regulated voltage supply for amplifier bias circuit. In power down mode, both VREG and VMODE need to be LOW (<0.5V). No connection. Do not connect this pin to any external circuit. No connection. Do not connect this pin to any external circuit. No connection. Do not connect this pin to any external circuit. No connection. Do not connect this pin to any external circuit. RF output. Internally AC-coupled. Output stage collector supply. Connect to pin 11 with the shortest trace possible. Please see the schematic for required external components. See note. Output stage collector supply and output matching. Connect to pin 10 and pin 12 with the shortest trace possible. See note. Output stage collector supply and output matching. Connect to pin 11 with the shortest trace possible. See note. No connection. Do not connect this pin to any external circuit. Interstage matching. Connect to pin 15 with the shortest trace possible. See note. First stage collector supply and interstage matching. A 4.7F decoupling capacitor may be required. Connect to pin 14 with the shortest trace possible. See note. Power supply input for the DC bias circuitry. Interface Schematic Ground connection. The backside of the package should be soldered to a top side ground pad which is connected to the ground plane with multiple vias. The pad should have a short thermal path to the ground plane. Note: Refer to Layout Recommendation Application Note and Application Schematic for additional information. 2-4 Rev A7 061201 RF3165 Application Schematic VCC BIAS L2 1 nF 10 F VCC 16 15 14 13 RF IN 1 2 12 11 10 Bias 9 RF OUT Matching Component 1 nF Place this component next to RF3165 with minimal trace length to the PA. VMODE 1 nF 3 4 VREG 1 nF 5 6 7 8 VCC BIAS can be connected to VCC; however, VCC must be maintained above 1.5 V. L2 = 8.2 nH and may be needed to provide isolation between VCC1 and VCC2 depending on layout. Circuit Optimization for Various Output Power Requirements Output Power (dBm) 28.5 28 27.5 Matching Component 15nH N/A 0.5pF Sample Part Number LQG15HN12NJ02D (Murata) GRM1555C1HR50BZ01E (Murata) Typical Efficiency (%) 41 42 42 Rev A7 061201 2-5 RF3165 Evaluation Board Schematic VCCBIAS VCC1 R1 0 C30 4.7 F R2 DNI C3 1 nF 16 J1 RF IN 50 strip 1 2 VMODE C20 4.7 F VREG C40 4.7 F C2 1 nF P1 P1-1 P1-2 1 2 3 4 5 CON5 VMODE VREG GND GND GND P2-3 P2-4 P2-1 5 6 7 8 P2 1 2 3 4 5 CON5 VCC2 GND VCC1 VCCBIAS GND 3 Bias 4 9 50 strip J2 RF OUT 10 12 11 C1 1 nF C10 22 F VCC2 15 L2 DNI 14 13 2-6 Rev A7 061201 |
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