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FDS5692Z N-Channel UltraFET Trench(R) MOSFET February 2006 FDS5692Z N-Channel UltraFET Trench(R) MOSFET 50V, 5.8A, 24m General Description This N-Channel UltraFET device has been designed specifically to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers. It has been optimized for low gate charge, low rDS(on) and fast switching speed. Features Max rDS(on) = 24m at VGS = 10V, ID = 5.8A Max rDS(on) = 33m at VGS = 4.5V, ID = 5.6A ESD protection diode (note 3) Low Qgd Fast switching speed Applications DC/DC converter D D D D 5 6 4 3 2 1 SO-8 S S S G 7 8 MOSFET Maximum Ratings Symbol VDS VGS ID Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed EAS PD Single Pulse Avalanche Energy TA=25oC unless otherwise noted Parameter Ratings 50 20 (Note 1a) Units V V A 5.8 40 72 mJ W UltraFET Dissipation for Single Operation (Note 1a) (Note 1b) (Note 1c) 2.5 1.2 1.1 -55 to 150 TJ, TSTG Operating and Storage Junction Temperature Range C Thermal Characteristics RJA RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1c) (Note 1) 50 125 25 C/W Package Marking and Ordering Information Device Marking FDS5692Z (c)2006 Fairchild Semiconductor Corporation FDS5692Z Rev C(W) Device FDS5692Z Package SO-8 Reel Size 13" Tape width 12mm Quantity 2500units www.fairchildsemi.com FDS5692Z N-Channel UltraFET Trench(R) MOSFET Electrical Characteristics Symbol Parameter Drain-Source Avalanche Energy (Single Pulse) Drain-Source Avalanche Current TA = 25C unless otherwise noted Test Conditions Min Typ Max Units Drain-Source Avalanche Ratings EAS IAS VDD = 50 V, ID= 12 A, L=1mH 12 ID = 250 A 72 mJ A Off Characteristics BVDSS BVDSS TJ IDSS IGSS Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage (Note 4) VGS = 0 V, 50 48 1 10 V mV/C A A ID = 250 A, Referenced to 25C VDS = 40 V VGS = 20V, VGS = 0 V VDS = 0 V On Characteristics VGS(th) VGS(th) TJ rDS(on) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance VDS = VGS, ID = 250 A ID = 250 A, Referenced to 25C ID = 5.8 A VGS = 10 V, ID = 5.6 A VGS = 4.5 V, VGS = 10 V, ID = 5.8A, TJ = 125C 1 1.6 -6 20 26 32 3 V mV/C 24 33 41 m Dynamic Characteristics Ciss Coss Crss RG Qg(TOT) Qg(TOT) Qgs Qgd Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance Total Gate Charge, VGS = 10V Total Gate Charge, VGS = 5V Gate-Source Gate Charge Gate-Drain Gate Charge (Note 4) VDS = 25 V, f = 1.0 MHz f = 1.0 MHz VDS = 25V, V GS = 0 V, 1025 150 50 0.79 18 25 14 pF pF pF nC nC nC nC ID = 5.8A 10 2.8 3.0 Switching Characteristics td(on) tr td(off) tf Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time VDD = 25 V, VGS = 10 V, ID = 5.8A, RGEN = 6 9 5 27 6 18 10 43 12 ns ns ns ns FDS5692Z Rev C(W) www.fairchildsemi.com FDS5692Z N-Channel UltraFET Trench(R) MOSFET Electrical Characteristics Symbol VSD trr Qrr TA = 25C unless otherwise noted Parameter Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Test Conditions IS = 5.8 A IS = 2.9 A dIF/dt = 100A/s Min Typ 0.79 0.75 24 16 Max Units 1.25 1.0 V V ns nC Drain-Source Diode Characteristics VGS = 0 V, IF = 6A, Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design. a) 50C/W when 2 mounted on a 1in pad of 2 oz copper b) 105C/W when 2 mounted on a .04 in pad of 2 oz copper c) 125C/W when mounted on a minimum pad. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0% 3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied. FDS5692Z Rev C(W) www.fairchildsemi.com FDS5692Z N-Channel UltraFET Trench(R) MOSFET Typical Characteristics 40 VGS = 10V 4.5V 4.0V NORMALIZED DRAIN-SOURCE ON-RESISTANCE 2.4 VGS = 3.0V 2.2 2 1.8 3.5V 1.6 4.0V 1.4 1.2 10V 1 0.8 4.5V 5.0V 6.0V ID, DRAIN CURRENT (A) 32 6.0V 24 3.5.V 16 3.0V 8 2.5V 0 0 1 2 3 VDS, DRAIN-SOURCE VOLTAGE (V) 4 0 10 20 ID, DRAIN CURRENT (A) 30 40 Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.09 rDS(on), ON-RESISTANCE (OHM) 2 NORMALIZED DRAIN-SOURCE ON-RESISTANCE 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 -50 ID = 5.8A VGS = 5V ID = 2.9A 0.07 0.05 TA = 125 C o 0.03 TA = 25 C o 0.01 -25 0 25 50 75 100 o 125 150 2 TJ, JUNCTION TEMPERATURE ( C) 4 6 8 VGS, GATE TO SOURCE VOLTAGE (V) 10 Figure 3. On-Resistance Variation with Temperature. 40 VDS = 5V TA = -55 C o Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 125 C o IS, REVERSE DRAIN CURRENT (A) VGS = 0V 10 TA = 125oC 1 25oC 0.1 -55oC ID, DRAIN CURRENT (A) 30 25 C o 20 0.01 10 0.001 0 0 1 2 3 4 VGS, GATE TO SOURCE VOLTAGE (V) 5 0.0001 0 0.2 0.4 0.6 0.8 1 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDS5692Z Rev C(W) www.fairchildsemi.com FDS5692Z N-Channel UltraFET Trench(R) MOSFET Typical Characteristics 10 1500 ID = 5.8A f = 1MHz VGS = 0 V 1200 VDS = 20V 30V VGS, GATE-SOURCE VOLTAGE (V) 8 6 25V 4 CAPACITANCE (pF) 900 Ciss 600 Coss 300 Crss 2 0 0 4 8 12 16 20 0 0 5 10 15 20 25 30 Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. 100 P(pk), PEAK TRANSIENT POWER (W) 100s 1ms 10ms 100ms 1s 10s DC VGS = 10V SINGLE PULSE o RJA = 125 C/W TA = 25oC 40 Figure 8. Capacitance Characteristics. RDS(ON) LIMIT ID, DRAIN CURRENT (A) 10 30 SINGLE PULSE RJA = 125C/W TA = 25C 1 20 0.1 10 0.01 0.01 0.1 1 10 VDS, DRAIN-SOURCE VOLTAGE (V) 100 0 0.001 0.01 0.1 1 t1, TIME (sec) 10 100 Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum UltraFET Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 D = 0.5 0.2 RJA(t) = r(t) * RJA RJA = 125 C/W 0.1 0.1 0.05 0.02 P(pk) t1 t2 TJ - TA = P * RJA(t) Duty Cycle, D = t1 / t2 0.01 0.01 SINGLE PULSE 0.001 0.0001 0.001 0.01 0.1 t1, TIME (sec) 1 10 100 1000 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design. FDS5692Z Rev C(W) www.fairchildsemi.com TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM FAST(R) ActiveArrayTM FASTrTM BottomlessTM FPSTM Build it NowTM FRFETTM CoolFETTM GlobalOptoisolatorTM CROSSVOLTTM GTOTM DOMETM HiSeCTM EcoSPARKTM I2CTM E2CMOSTM i-LoTM EnSignaTM ImpliedDisconnectTM FACTTM IntelliMAXTM FACT Quiet SeriesTM Across the board. Around the world.TM The Power Franchise(R) Programmable Active DroopTM DISCLAIMER ISOPLANARTM LittleFETTM MICROCOUPLERTM MicroFETTM MicroPakTM MICROWIRETM MSXTM MSXProTM OCXTM OCXProTM OPTOLOGIC(R) OPTOPLANARTM PACMANTM POPTM Power247TM PowerEdgeTM PowerSaverTM PowerTrench(R) QFET(R) QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM RapidConnectTM SerDesTM ScalarPumpTM SILENT SWITCHER(R) SMART STARTTM SPMTM StealthTM SuperFETTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TCMTM TinyLogic(R) TINYOPTOTM TruTranslationTM UHCTM UltraFET(R) UniFETTM VCXTM WireTM FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I18 |
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