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| INTEGRATED CIRCUITS 74ALS273 Octal D-type flip-flop Product specification IC05 Data Handbook 1991 Feb 08 Philips Semiconductors Philips Semiconductors Product specification Octal D-type flip-flop 74ALS273 FEATURES * Eight edge-triggered D-type flip-flops * Buffered common clock * Buffered asynchronous master reset * See 74ALS377 for clock enable version * See 74ALS373 for transparent latch version * See 74ALS374 for 3-State version DESCRIPTION The 74ALS273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered clock (CP) and master reset (MR) inputs load and reset all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one setup time before the Low-to-High clock transition, is transferred to the corresponding flip-flop's Q output. All outputs will be forced Low independently of clock or data inputs by a Low voltage level on the MR input. The device is useful for applications where the true output only is required and the CP and MR are common to all flip-flops. TYPICAL SUPPLY CURRENT (TOTAL) 16mA PIN CONFIGURATION MR Q0 D0 D1 Q1 Q2 D2 D3 Q3 1 2 3 4 5 6 7 8 9 20 19 18 17 16 15 14 13 12 11 VCC Q7 D7 D6 Q6 Q5 D5 D4 Q4 CP GND 10 SF00346 ORDERING INFORMATION ORDER CODE DESCRIPTION COMMERCIAL RANGE VCC = 5V 10%, Tamb = 0C to +70C 74ALS273N 74ALS273D 74ALS273DB DRAWING NUMBER 20-pin plastic DIP 20-pin plastic SO 20-pin plastic SSOP Type II SOT146-1 SOT163-1 SOT339-1 TYPE 74ALS273 TYPICAL fMAX 95MHz INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS D0 - D7 CP MR Q0 - Q7 Data inputs Clock pulse input (active rising edge) Master Reset input (active-Low) 3-State outputs DESCRIPTION 74ALS (U.L.) HIGH/LOW 1.0/2.0 1.0/1.0 1.0/1.0 130/240 LOAD VALUE HIGH/LOW 20A/0.2mA 20A/0.1mA 20A/0.1mA 2.6mA/24mA NOTE: One (1.0) ALS unit load is defined as: 20A in the High state and 0.1mA in the Low state. LOGIC SYMBOL 3 4 7 8 13 14 17 18 IEC/IEEE SYMBOL 1 11 R C1 D0 11 1 CP MR D1 D2 D3 D4 D5 D6 D7 3 4 7 1D 2 5 6 9 12 15 16 19 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 8 13 14 2 VCC = Pin 20 GND = Pin 10 5 6 9 12 15 16 19 17 18 SF00347 SF00348 1991 Feb 08 2 853-1398 01670 Philips Semiconductors Product specification Octal D-type flip-flop 74ALS273 LOGIC DIAGRAM D0 3 CP 11 D1 4 D2 7 D3 8 D4 13 D5 14 D6 17 D7 18 D Q D Q D Q D Q D Q D Q D Q D Q CP RD MR 1 CP RD CP RD CP RD CP RD CP RD CP RD CP RD 2 Q0 VCC = Pin 20 GND = Pin 10 Q1 5 Q2 6 Q3 9 12 Q4 15 Q5 16 Q6 19 Q7 SF00349 FUNCTION TABLE INPUTS MR L H H H h L l X = = = = = = CP X Dn X h l OUTPUTS Qn L H L Reset (clear) Load "1" Load "0" OPERATING MODE High-voltage level High state must be present one setup time before the Low-to-High clock transition Low-voltage level Low state must be present one setup time before the Low-to-High clock transition Don't care Low-to-High clock transition ABSOLUTE MAXIMUM RATINGS (Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free air temperature range.) SYMBOL VCC VIN IIN VOUT IOUT Tamb Tstg Supply voltage Input voltage Input current Voltage applied to output in High output state Current applied to output in Low output state Operating free-air temperature range Storage temperature range PARAMETER RATING -0.5 to +7.0 -0.5 to +7.0 -30 to +5 -0.5 to VCC 48 0 to +70 -65 to +150 UNIT V V mA V mA C C RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL VCC VIH VIL IIK IOH IOL Tamb Supply voltage High-level input voltage Low-level input voltage Input clamp current High-level output current Low-level output current Operating free-air temperature range 0 PARAMETER MIN 4.5 2.0 0.8 -18 -2.6 24 +70 NOM 5.0 MAX 5.5 UNIT V V V mA mA mA C 1991 Feb 08 3 Philips Semiconductors Product specification Octal D-type flip-flop 74ALS273 DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL PARAMETER TEST CONDITIONS1 VCC10%, VIL = MAX, , , VIH = MIN VCC = MIN, VIL = MAX, , , VIH = MIN VCC = MIN, II = IIK VCC = MAX, VI = 7.0V VCC = MAX, VI = 2.7V MR, CP IIL IO ICC Low-level Low level input current Output current3 Supply current (total) ICCH ICCL Dn VCC = MAX, VI = 0 4V MAX 0.4V VCC = MAX, VO = 2.25V VCC = MAX -30 12 21 IOH = -0.4mA IOH = MAX IOL = 12mA IOL = 24mA LIMITS MIN VCC - 2 2.4 3.2 0.25 0.35 -0.73 0.40 0.50 -1.5 0.1 20 -0.1 -0.2 -112 18 29 TYP2 MAX UNIT V V V V V mA A mA mA mA mA mA VO OH High-level High level output voltage VO OL VIK II IIH Low-level Low level output voltage Input clamp voltage Input current at maximum input voltage High-level input current NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25C. 3. The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. AC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITION Tamb = 0C to +70C VCC = +5.0V 10% CL = 50pF, RL = 500 MIN fMAX tPLH tPHL tPHL Maximum clock frequency Propagation delay CP to Qn Propagation delay MR to Qn Waveform 1 Waveform 1 Waveform 2 65 2.0 3.0 4.0 8.0 11.0 12.0 MAX MHz ns ns UNIT AC SETUP REQUIREMENTS LIMITS SYMBOL PARAMETER TEST CONDITION Tamb = 0C to +70C VCC = +5.0V 10% CL = 50pF, RL = 500 MIN tsu(H) tsu(L) th(H) th(L) tw(H) tw(L) tw(L) tREC Setup time, High or Low Dn to CP Hold time, High or Low Dn to CP CP pulse width, High or Low MR pulse width, Low Recovery time, MR to CP Waveform 3 Waveform 3 Waveform 1 Waveform 2 Waveform 2 5.0 5.0 0.0 0.0 6.0 8.0 7.0 12.0 MAX ns ns ns ns ns UNIT 1991 Feb 08 4 Philips Semiconductors Product specification Octal D-type flip-flop 74ALS273 AC WAVEFORMS For all waveforms, VM = 1.3V. 1/fmax CP VM tw(H) tPHL VM tw(L) tPLH VM CP tsu(H) th(H) tsu(L) th(L) VM VM Dn VM VM VM VM Qn VM VM SF00294 SC00064 Waveform 1. Propagation Delay for Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency Waveform 3. Data Setup and Hold Times MR VM tw(L) VM tREC VM CP tPHL Qn VM SC00065 Waveform 2. Master Reset Pulse Width, Master Reset to Output Delay, and Master Reset to Clock Recovery Time TEST CIRCUIT AND WAVEFORMS VCC NEGATIVE PULSE VIN PULSE GENERATOR RT D.U.T. VOUT 90% VM 10% tTHL (tff) CL RL tw VM 10% tTLH (tr ) 0.3V 90% AMP (V) tTLH (tr ) 90% tTHL (tf ) AMP (V) 90% VM tw 10% 0.3V Test Circuit for Totem-pole Outputs POSITIVE PULSE 10% VM DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators. Input Pulse Definition INPUT PULSE REQUIREMENTS Family Amplitude VM 74ALS 3.5V 1.3V Rep.Rate 1MHz tw 500ns tTLH 2.0ns tTHL 2.0ns SC00005 1991 Feb 08 5 Philips Semiconductors Product specification Octal D-type flip-flop 74ALS273 DIP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1 1991 Feb 08 6 Philips Semiconductors Product specification Octal D-type flip-flop 74ALS273 SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 1991 Feb 08 7 Philips Semiconductors Product specification Octal D-type flip-flop 74ALS273 SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1 1991 Feb 08 8 Philips Semiconductors Product specification Octal D-type flip-flop 74ALS273 DEFINITIONS Data Sheet Identification Objective Specification Product Status Formative or in Design Definition This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product. Preliminary Specification Preproduction Product Product Specification Full Production Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1997 All rights reserved. Printed in U.S.A. Philips Semiconductors 1991 Feb 08 9 |
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