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| ANSALDO Ansaldo Trasporti s.p.a. Unita' Semiconduttori Via N. Lorenzi 8 - I 16152 GENOVA - ITALY Tel. int. +39/(0)10 6556549 - (0)10 6556488 Fax Int. +39/(0)10 6442510 Tx 270318 ANSUSE I - PHASE CONTROL THYRISTOR AT847 Repetitive voltage up to Mean on-state current Surge current 2500 V 2980 A 39.2 kA FINAL SPECIFICATION feb 97 - ISSUE : 02 Symbol Characteristic Conditions Tj [C] 125 125 125 Value Unit BLOCKING V V V I I RRM RSM DRM RRM DRM Repetitive peak reverse voltage Non-repetitive peak reverse voltage Repetitive peak off-state voltage Repetitive peak reverse current Repetitive peak off-state current V=VRRM V=VDRM 2500 2600 2500 200 200 V V V mA mA 125 125 CONDUCTING I I I V V r T (AV) T (AV) TSM Mean on-state current Mean on-state current Surge on-state current I t On-state voltage Threshold voltage On-state slope resistance 180 sin, 50 Hz, Th=55C, double side cooled 180 sin, 50 Hz, Tc=85C, double side cooled sine wave, 10 ms without reverse voltage On-state current = 2100 A 25 125 125 125 2980 2370 39.2 7683 x1E3 1.22 0.85 0.175 A A kA As V V mohm I t T T(TO) T SWITCHING di/dt dv/dt td tq Q rr I rr I I H L Critical rate of rise of on-state current, min. Critical rate of rise of off-state voltage, min. Gate controlled delay time, typical Circuit commutated turn-off time, typical Reverse recovery charge Peak reverse recovery current Holding current, typical Latching current, typical From 75% VDRM up to 3280 A, gate 10V 5ohm Linear ramp up to 70% of VDRM VD=100V, gate source 10V, 10 ohm , tr=.5 s dV/dt = 20 V/s linear up to 75% VDRM di/dt=-20 A/s, I= 2150 A VR= 50 V VD=5V, gate open circuit VD=12V, tp=30s 125 125 25 125 25 25 800 1000 2 400 A/s V/s s s C A 500 1000 mA mA GATE V I V V I V P P GT GT GD FGM FGM RGM GM G Gate trigger voltage Gate trigger current Non-trigger gate voltage, min. Peak gate voltage (forward) Peak gate current Peak gate voltage (reverse) Peak gate power dissipation Average gate power dissipation VD=12V VD=12V VD=VDRM 25 25 125 3.5 400 0.25 30 10 10 V mA V V A V W W Pulse width 100 s 150 10 MOUNTING R R T F th(j-h) th(c-h) j Thermal impedance, DC Thermal impedance Operating junction temperature Mounting force Mass ORDERING INFORMATION : AT847 S 25 standard specification Junction to heatsink, double side cooled Case to heatsink, double side cooled 11 2 -30 / 125 40.0 / 50.0 1700 C/kW C/kW C kN g VDRM&VRRM/100 AT847 PHASE CONTROL THYRISTOR FINAL SPECIFICATION feb 97 - ISSUE : 02 ANSALDO DISSIPATION CHARACTERISTICS SQUARE WAVE Th [C] 130 120 110 100 90 80 70 90 30 60 60 50 0 1000 2000 120 180 DC 3000 4000 5000 IF(AV) [A] PF(AV) [W] 7000 6000 5000 60 90 120 180 DC 4000 3000 2000 1000 0 0 30 1000 2000 3000 4000 5000 IF(AV) [A] AT847 PHASE CONTROL THYRISTOR FINAL SPECIFICATION feb 97 - ISSUE : 02 ANSALDO DISSIPATION CHARACTERISTICS SINE WAVE Th [C] 130 120 110 100 90 80 30 70 60 50 0 1000 60 90 120 180 2000 3000 4000 5000 IF(AV) [A] PF(AV) [W] 7000 6000 90 120 180 5000 4000 3000 2000 1000 0 0 1000 30 60 2000 3000 4000 5000 IF(AV) [A] AT847 PHASE CONTROL THYRISTOR FINAL SPECIFICATION feb 97 - ISSUE : 02 ANSALDO ON-STATE CHARACTERISTIC Tj = 125 C SURGE CHARACTERISTIC Tj = 125 C 9000 8000 7000 40 35 30 On-state Current [A] 6000 25 5000 4000 3000 2000 1000 0 0.6 1.1 1.6 2.1 2.6 On-state Voltage [V] ITSM [kA] 20 15 10 5 0 1 10 n cycles 100 TRANSIENT THERMAL IMPEDANCE DOUBLE SIDE COOLED 12.0 10.0 Zth j-h [C/kW] 8.0 6.0 4.0 2.0 0.0 0.001 0.01 0.1 t[s] 1 10 100 Cathode terminal type DIN 46244 - A 4.8 - 0.8 Gate terminal type AMP 60598 - 1 Distributed by All the characteristics given in this data sheet are guaranteed only with uniform clamping force, cleaned and lubricated heatsink, surfaces with flatness < .03 mm and roughness < 2 m. In the interest of product improvement ANSALDO reserves the right to change any data given in this data sheet at any time without previous notice. If not stated otherwise the maximum value of ratings (simbols over shaded background) and characteristics is reported. |
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