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 DISCRETE SEMICONDUCTORS
DATA SHEET
book, halfpage
M3D088
BSH104 N-channel enhancement mode MOS transistor
Objective specification File under Discrete Semiconductors, SC13b 1997 Nov 26
Philips Semiconductors
Objective specification
N-channel enhancement mode MOS transistor
FEATURES * High-speed switching * No secondary breakdown * Direct interface to C-MOS, TTL, etc. * Very low threshold. APPLICATIONS * `Glue-logic': interface between logic blocks and/or periphery * Power management * DC to DC converters * General purpose switch * Battery powered applications. DESCRIPTION N-channel enhancement mode MOS transistor in a SOT23 SMD package. CAUTION The device is supplied in an antistatic package. The gate-source input must be protected against static discharge during transport or handling. QUICK REFERENCE DATA SYMBOL VDS VSD VGS VGSth ID RDSon Ptot PARAMETER drain-source voltage (DC) source-drain diode forward voltage gate-source voltage (DC) gate-source threshold voltage drain current (DC) drain-source on-state resistance total power dissipation VDS = VGS ; ID = 1 mA Ts = 80 C VGS = 2.5 V; ID = 0.65 A Ts = 80 C VGD = 0; IS = 0.5 A CONDITIONS - - - 0.4 - - - MIN. 1 8 - 1.1 0.3 0.5
1 Top view 2
MAM273
BSH104
PINNING PIN 1 2 3 SYMBOL g s d gate source drain DESCRIPTION
handbook, halfpage
3
d
g
s
Fig.1 Simplified outline (SOT23) and symbol.
MAX. 12 V V V V A
UNIT
W
1997 Nov 26
2
Philips Semiconductors
Objective specification
N-channel enhancement mode MOS transistor
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VDS VGS ID IDM Ptot PARAMETER drain-source voltage (DC) gate-source voltage (DC) drain current (DC) peak drain current total power dissipation Ts = 80 C; note 1 note 2 Ts = 80 C Tamb = 25 C; note 3 Tamb = 25 C; note 4 Tstg Tj IS ISM Notes 1. Ts is the temperature at the soldering point of the drain lead. 2. Pulse width and duty cycle limited by maximum junction temperature. 3. Device mounted on a printed-circuit board with a Rth a-tp (ambient to tie-point) of 27.5 K/W. 4. Device mounted on a printed-circuit board with a Rth a-tp (ambient to tie-point) of 90 K/W. THERMAL CHARACTERISTICS SYMBOL Rth j-s PARAMETER thermal resistance from junction to soldering point VALUE 140 storage temperature operating junction temperature Ts = 80 C note 2 CONDITIONS - - - - - - - -55 -55 - - MIN.
BSH104
MAX. 12 8 1.1 4.5 0.5 0.75 0.54 +150 +150 V V A A
UNIT
W W W C C
Source-drain diode source current (DC) peak pulsed source current 0.5 2 A A
UNIT K/W
1997 Nov 26
3
Philips Semiconductors
Objective specification
N-channel enhancement mode MOS transistor
CHARACTERISTICS Tj = 25 C unless otherwise specified. SYMBOL V(BR)DSS VGSth IDSS IGSS RDSon PARAMETER drain-source breakdown voltage gate-source threshold voltage drain-source leakage current gate leakage current drain-source on-state resistance CONDITIONS VGS = 0; ID = 10 A VGS = VDS ; ID = 1 mA VGS = 0; VDS = 9.6 V VDS = 0; VGS = 8 V VGS = 4.5 V; ID = 0.65 A VGS = 2.5 V; ID = 0.65 A VGS = 1.8 V; ID = 0.32 A Ciss Coss Crss QG QGS QGD input capacitance output capacitance reverse transfer capacitance total gate charge gate-source charge gate-drain charge VGS = 0; VDS = 9.6 V; f = 1 MHz VGS = 0; VDS = 9.6 V; f = 1 MHz VGS = 0; VDS = 9.6 V; f = 1 MHz VGS = 6 V; VDD = 6 V; ID = 0.65 A; Tamb = 25 C VDD = 6 V; ID = 0.65 A; Tamb = 25 C VDD = 6 V; ID = 0.65 A; Tamb = 25 C VGS = 0 to 6 V; VDD = 6 V; ID = 0.65 A; Rgen = 6 VGS = 0 to 6 V; VDD = 6 V; ID = 0.65 A; Rgen = 6 VGS = 0 to 6 V; VDD = 6 V; ID = 0.65 A; Rgen = 6 VGS = 6 to 0 V; VDD = 6 V; ID = 0.65 A; Rgen = 6 VGS = 6 to 0 V; VDD = 6 V; ID = 0.65 A; Rgen = 6 VGS = 6 to 0 V; VDD = 6 V; ID = 0.65 A; Rgen = 6 VGD = 0; IS = 0.5 A IS = 0.5 A; di/dt = -100 A/s MIN. 12 0.4 - - - - - - - - - - - TYP. - - - - - - - t.b.f. t.b.f. t.b.f. t.b.f. t.b.f. t.b.f.
BSH104
MAX. - - 100 100 0.23 0.3 0.4 - - - - - -
UNIT V V nA nA pF pF pF pC pC pC
Switching times td(on) tf ton td(off) tr toff turn-on delay time fall time turn-on switching time turn-off delay time rise time turn-off switching time - - - - - - t.b.f. t.b.f. t.b.f. t.b.f. t.b.f. t.b.f. - - - - - - ns ns ns ns ns ns
Source-drain diode VSD trr source-drain diode forward voltage reverse recovery time - - - t.b.f. 1 - V ns
1997 Nov 26
4
Philips Semiconductors
Objective specification
N-channel enhancement mode MOS transistor
PACKAGE OUTLINE Plastic surface mounted package; 3 leads
BSH104
SOT23
D
B
E
A
X
HE
vMA
3
Q A A1
1
e1 e bp
2
wMB detail X Lp
c
0
1 scale
2 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.9 A1 max. 0.1 bp 0.48 0.38 c 0.15 0.09 D 3.0 2.8 E 1.4 1.2 e 1.9 e1 0.95 HE 2.5 2.1 Lp 0.45 0.15 Q 0.55 0.45 v 0.2 w 0.1
OUTLINE VERSION SOT23
REFERENCES IEC JEDEC EIAJ
EUROPEAN PROJECTION
ISSUE DATE 97-02-28
1997 Nov 26
5
Philips Semiconductors
Objective specification
N-channel enhancement mode MOS transistor
DEFINITIONS Data Sheet Status Objective specification Preliminary specification Product specification Limiting values
BSH104
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1997 Nov 26
6
Philips Semiconductors
Objective specification
N-channel enhancement mode MOS transistor
NOTES
BSH104
1997 Nov 26
7
Philips Semiconductors - a worldwide company
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For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1997
Internet: http://www.semiconductors.philips.com
SCA56
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
137107/00/01/pp8
Date of release: 1997 Nov 26
Document order number:
9397 750 02938


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