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FDPF12N35 350V N-Channel MOSFET
UniFET
FDPF12N35
350V N-Channel MOSFET Features
* 7.5A, 350V, RDS(on) = 0.38 @VGS = 10 V * Low gate charge ( typical 18 nC) * Low Crss ( typical 15 pF) * Fast switching * 100% avalanche tested * Improved dv/dt capability
February 2006 TM
Description
These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficient switched mode power supplies and active power factor correction.
D
G GD S
TO-220F
FDPF Series
S
Absolute Maximum Ratings
Symbol
VDSS ID IDM VGSS EAS IAR EAR dv/dt PD TJ, TSTG TL Drain-Source Voltage Drain Current Drain Current Gate-Source voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25C) - Derate above 25C
(Note 2) (Note 1) (Note 1) (Note 3)
Parameter
- Continuous (TC = 25C) - Continuous (TC = 100C) - Pulsed
(Note 1)
FDPF12N35
350 7.5 4.5 30 30 335 7.5 5 4.5 50 0.35 -55 to +150 300
Unit
V A A A V mJ A mJ V/ns W W/C C C
Operating and Storage Temperature Range Maximum Lead Temperature for Soldering Purpose, 1/8" from Case for 5 Seconds
Thermal Characteristics
Symbol
RJC RJA
Parameter
Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient
Min.
---
Max.
2.5 62.5
Unit
C/W C/W
(c)2006 Fairchild Semiconductor Corporation
1
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FDPF12N35 Rev. A
FDPF12N35 350V N-Channel MOSFET
Package Marking and Ordering Information
Device Marking
FDPF12N35
Device
FDPF12N35
Package
TO-220F
TC = 25C unless otherwise noted
Reel Size
-
Tape Width
-
Quantity
50
Electrical Characteristics
Symbol
Off Characteristics BVDSS BVDSS / TJ IDSS IGSSF IGSSR VGS(th) RDS(on) gFS Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd IS ISM VSD trr Qrr
NOTES:
Parameter
Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge
Conditions
VGS = 0V, ID = 250A ID = 250A, Referenced to 25C VDS = 350V, VGS = 0V VDS = 280V, TC = 125C VGS = 30V, VDS = 0V VGS = -30V, VDS = 0V VDS = VGS, ID = 250A VGS = 10V, ID = 3.75A VDS = 40V, ID = 3.75A VDS = 25V, VGS = 0V, f = 1.0MHz
(Note 4)
Min.
350 -----3.0 ------
Typ.
-0.35 -----0.32 13 855 135 15 30 180 35 60 18 5 8
Max Units
--1 10 100 -100 5.0 0.38 -1110 175 25 70 370 80 130 25 --V V/C A A nA nA V S pF pF pF ns ns ns ns nC nC nC
On Characteristics
Dynamic Characteristics
Switching Characteristics VDD = 175V, ID = 12A RG = 25
(Note 4, 5)
------(Note 4, 5)
VDS = 280V, ID = 12A VGS = 10V
--
Drain-Source Diode Characteristics and Maximum Ratings Maximum Continuous Drain-Source Diode Forward Current Maximum Pulsed Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0V, IS = 7.5A VGS = 0V, IS = 12A dIF/dt =100A/s
(Note 4)
------
---270 2.3
7.5 30 1.4 ---
A A V ns C
1. Repetitive Rating: Pulse width limited by maximum junction temperature 2. L = 10mH, IAS = 7.5A, VDD = 50V, RG = 25, Starting TJ = 25C 3. ISD 7.5A, di/dt 200A/s, VDD BVDSS, Starting TJ = 25C 4. Pulse Test: Pulse width 300s, Duty Cycle 2% 5. Essentially Independent of Operating Temperature Typical Characteristics
FDPF12N35 Rev. A
2
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FDPF12N35 350V N-Channel MOSFET
Typical Performance Characteristics
Figure 1. On-Region Characteristics
10
2
Figure 2. Transfer Characteristics
10
1
ID, Drain Current [A]
ID, Drain Current [A]
VGS 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V Bottom : 5.5 V Top :
10
1
10
0
150 C 25 C
o
o
Notes : 1. 250 s Pulse Test 2. TC = 25
-55 C
Notes : 1. VDS = 40V 2. 250 s Pulse Test
o
10
-1
10
-1
10
0
10
1
10
0
2
4
6
8
10
12
VDS, Drain-Source Voltage [V]
VGS, Gate-Source Voltage [V]
Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperatue
10
2
1.2
RDS(ON) [ ], Drain-Source On-Resistance
1.0
0.8
VGS = 10V
IDR, Reverse Drain Current [A]
10
1
0.6
150 25
Notes : 1. VGS = 0V 2. 250 s Pulse Test
0.4
VGS = 20V
0.2 0 5 10 15 20 25
Note : TJ = 25
30
35
10
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
ID, Drain Current [A]
VSD, Source-Drain voltage [V]
Figure 5. Capacitance Characteristics
12
1800 1600 1400
Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd
Figure 6. Gate Charge Characteristics
VGS, Gate-Source Voltage [V]
10
VDS = 70V VDS = 175V VDS = 280V
Coss Ciss
Capacitances [pF]
1200 1000 800 600 400 200 0 -1 10
8
6
4
Crss
Note ; 1. VGS = 0 V 2. f = 1 MHz
2
Note : ID = 12A
10
0
10
1
0
0
2
4
6
8
10
12
14
16
18
20
VDS, Drain-Source Voltage [V]
QG, Total Gate Charge [nC]
FDPF12N35 Rev. A
3
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FDPF12N35 350V N-Channel MOSFET
Typical Performance Characteristics (Continued)
Figure 7. Breakdown Voltage Variation vs. Temperature
1.2
Figure 8. On-Resistance Variation vs. Temperature
3.0
BVDSS, (Normalized) Drain-Source Breakdown Voltage
1.1
RDS(ON), (Normalized) Drain-Source On-Resistance
2.5
2.0
1.0
1.5
1.0
Notes : 1. VGS = 10 V 2. ID = 3.75 A
0.9
Notes : 1. VGS = 0 V 2. ID = 250 A
0.5
0.8 -100
-50
0
50
100
o
150
200
0.0 -100
-50
0
50
100
o
150
200
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current vs. Case Temperature
8
10
2
100 s
ID, Drain Current [A]
10
1
1 ms 10 ms 100 ms
Operation in This Area is Limited by R DS(on)
6
10
0
DC
ID, Drain Current [A]
4
10
-1
Notes : 1. TC = 25 C 2. TJ = 150 C 3. Single Pulse
o o
2
10
-2
10
0
10
1
10
2
0 25
50
75
100
125
150
VDS, Drain-Source Voltage [V]
TC, Case Temperature [ ]
Figure 11. Transient Thermal Response Curve
Z JC Thermal Response (t),
10
0
D = 0 .5 0 .2 0 .1 0 .0 5
N o te s : 1 . Z J C t) = 2 .5 ( /W M a x . 2 . D u t y F a c to r , D = t 1 /t 2 3 . T J M - T C = P D M * Z J C t) (
10
-1
0 .0 2 0 .0 1 s in g le p u ls e
10
-2
PDM t1 t2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t 1 , S q u a r e W a v e P u ls e D u r a t io n [s e c ]
FDPF12N35 Rev. A
4
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FDPF12N35 350V N-Channel MOSFET
Gate Charge Test Circuit & Waveform
5K 0 1V 2 20F 0n 30F 0n
SmTp a e ye a DT sU VS D
VS G 1V 0 Q g s Q g
VS G
Q g d
DT U
3A m
Ca e hr g
Resistive Switching Test Circuit & Waveforms
V D S R G V G S
R L V D D
V D S
9 0 %
1 0 V
D U T
V G S
1 0 %
to d) (n
t r tn o
to df (f ) tf o f
t f
Unclamped Inductive Switching Test Circuit & Waveforms
L V D S I D R G 1 0 V
tp
BS VS D 1 - - I 2 ---------E= - LS ---------A S A 2 B S- D VS V D D BS VS D IS A V D D I( t D) V D D
tp
D U T
V( Dt S) Te i m
FDPF12N35 Rev. A
5
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FDPF12N35 350V N-Channel MOSFET
Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+ V
DS
_ I
SD
L D r iv e r R
G
S am e T ype as DUT
V
DD
V
GS
* d v / d t c o n t r o lle d b y R G * I S D c o n t r o lle d b y p u ls e p e r io d
V GS ( D r iv e r )
G a te P u ls e W id t h D = -------------------------G a t e P u ls e P e r io d
10V
IF M , B o d y D io d e F o r w a r d C u r r e n t
I SD (DUT ) IR M
d i/d t
B o d y D io d e R e v e r s e C u r r e n t
V DS (DUT )
B o d y D io d e R e c o v e r y d v / d t
V
SD
V
DD
B o d y D io d e F o r w a r d V o lta g e D r o p
FDPF12N35 Rev. A
6
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FDPF12N35 350V N-Channel MOSFET
Mechanical Dimensions
TO-220F
3.30 0.10 10.16 0.20 (7.00) o3.18 0.10 2.54 0.20 (0.70)
6.68 0.20
15.80 0.20
(1.00x45)
MAX1.47 9.75 0.30 0.80 0.10
(3 ) 0
0.35 0.10 2.54TYP [2.54 0.20]
#1 0.50 -0.05 2.54TYP [2.54 0.20] 4.70 0.20
+0.10
2.76 0.20
9.40 0.20
Dimensions in Millimeters
FDPF12N35 Rev. A
7
15.87 0.20
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FDPF12N35 350V N-Channel MOSFET
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
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DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS Definition of Terms
Datasheet Identification Advance Information Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. I18
Preliminary
No Identification Needed
Full Production
Obsolete
Not In Production
8 FDPF12N35 Rev. A
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