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TECHNICAL DATA Low Power J-FET DUAL OPERATIONAL AMPLIFIERS The IL082 are high speed J-FET input dual operational amplifiers incorporating well matched, high voltage J-FET and bipolar transistors in a monolithic integrated circuit. The devices feature high slew rates, low input bias and offset current, and low offset voltage temperature coefficient. * * * * * * * * * * Low power consumption Wide common-mode and differential voltage range Low input bias and offset currents Low noise en=18 nV/Hz (typ) Output short-circuit protection High input impedance J-FET input stage Low harmonic distortion: 0.01% (typ) Internal frequency compensation Latch up free operation High slew rate: 13 V/s (typ) IL082 ORDERING INFORMATION IL082N Plastic IL082D SOIC TA = -40 to 85 C for package Pin Connections (top view) 1 2 3 4 5 6 7 8 - Output 1 Inverting input 1 Non-inverting input 1 VCC Non-inverting input 2 Inverting input 2 Output 2 VCC + IL082 SCHEMATIC DIAGRAM VC + Non-inverting inpu Inverting inpu 100 100 200 Output 1/2 IL082 VC _ MAXIMUM RATING Symbol VCC Vi Vid Ptot Toper Tstg Notes 1. . Parameter Supply Voltage - (note 1) Input Voltage - (note 3) Differential Input Voltage - (note 2) Power Dissipation Output Short-Circuit Duration (Note 4) Operating Free-Air Temperature Range Storage Temperature Range IL082 18 15 30 680 Infinite -40 to 85 -65 to +150 Unit V V V mW 0 0 C C 2. 3. 4. All voltage values, except differential voltage, are with respect to the zero reference level (ground) of the supply voltages where the zero reference level is the midpoint between VCC+ and VCC-. Differential voltages are at the non-inverting input terminal with respect to the inverting input terminal. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 volts, whichever is less. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the dissipation rating is not exceeded. IL082 ELECTRICAL CHARACTERISTICS VCC = 15V, TAMB = 25C (unless otherwise specified) Symbol VIO ParametersI Input Offset Voltage (RS = 50, V0=0) Tamb =25C Tmin. Tamb. Tmax. Input Offset Voltage Drift Input Offset Current* Tmin. Tamb. Tmax. IIB Input Bias Current* Tmin. Tamb. Tmax. AVD Tamb =25C 65 400 20 pA nA V/mV Tamb =25C 5 100 10 pA nA IL082 Typ. 3 18 Unit mV V/C Min. Max. 10 13 DVIO IIO SVR ICC VICM CMR VOPP Large Signal Voltage Gain (RL = 2k, VO = 10V) Tamb =25C Tmin. Tamb. Tmax. Supply Voltage Rejection Ratio (RS = 50, V0=0) Tamb =25C Tmin. Tamb. Tmax. Supply Current (Per Amplifier) Tamb =25C Tmin. Tamb. Tmax Input Common Mode Voltage Range Common Mode Rejection Ratio (RS = 50, V0=0) Tamb =25C Output Voltage Swing RL=2 k Tamb =25C RL=10k RL=2k Tmin. Tamb. Tmax. RL=10k Slew Rate (Vi = 10V, RL= 2k, CL = 100pF, Tamb =25C, unity gain) Rise Time (Vi = 20mV, RL= 2k, CL =100pF, Tamb =25C, unity gain) Overshoot (Vi = 20mV, RL= 2k, CL =100pF, Tamb =25C, unity gain) Gain Bandwidth Product Input Resistance Total Harmonic Distortion (f=1kHz, RL= 2k, Tamb =25C) Equivalent input Noise Voltage (RS = 100, f = 1KHz) 25 15 70 70 200 86 dB 1.4 11 70 10 12 10 12 8 +15 -12 86 12 13.5 2.5 2.5 mA V dB V 13 0.1 20 3 10 12 SR tr KOV GBP RI THD en V/s s % MHz % nV 0.01 18 Hz VO1/VO2 Channel Separation (AV =100) 120 dB * The Input bias currents are junction leakage currents which approximately double for every 100C increase in the junction temperature. IL082 IL082 IL082 IL082 N SUFFIX PLASTIC DIP (MS - 001BA) A 8 5 B 1 4 Dimension, mm Symbol A B MIN 8.51 6.1 MAX 10.16 7.11 5.33 0.36 1.14 2.54 7.62 0 2.92 7.62 0.2 0.38 10 3.81 8.26 0.36 0.56 1.78 F L C D C -T- SEATING PLANE F G M H J N G D 0.25 (0.010) M T K H J K L M N NOTES: 1. Dimensions "A", "B" do not include mold flash or protrusions. Maximum mold flash or protrusions 0.25 mm (0.010) per side. D SUFFIX SOIC (MS - 012AA) Dimension, mm 5 A 8 Symbol A B P MIN 4.8 3.8 1.35 0.33 0.4 1.27 5.72 0 0.1 0.19 5.8 0.25 MAX 5 4 1.75 0.51 1.27 H B C 1 G 4 C R x 45 D F -TD 0.25 (0.010) M T C M K SEATING PLANE G J F M H J K M P R 8 0.25 0.25 6.2 0.5 NOTES: 1. Dimensions A and B do not include mold flash or protrusion. 2. Maximum mold flash or protrusion 0.15 mm (0.006) per side for A; for B 0.25 mm (0.010) per side. |
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