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Product Specification PE4280 Product Description The PE4280 is an UltraCMOSTM Switch designed for CATV applications, covering a broad frequency range from DC up to 2.2 GHz. This single-supply SPDT switch integrates a two-pin CMOS control interface. It also provides low insertion loss with extremely low bias requirements while operating on a single 3 V supply. In a typical CATV application, the PE4280 provides for a cost effective and manufacturable solution when compared to mechanical relays. The PE4280 is manufactured in Peregrine's patented Ultra Thin Silicon (UTSi(R)) CMOS process, offering the performance of GaAs with the economy and integration of conventional CMOS. Figure 1. Functional Diagram RFC 75 SPDT CATV UltraCMOSTM Switch DC--2.2 GHz Features * 75 characteristic impedance * Integrated 75 0.25 watt terminations * CTB performance of 85 dBc * High isolation 60 dB at 1 GHz * Low insertion loss: typically 0.5 dB at 5 MHz, 1.1 dB at 1 GHz * High input IP3: 50 dBm * CMOS two-pin control * Single +3 V supply operation * Low current consumption: 8 A * Unique all off terminated mode * 4x4 mm QFN package Figure 2. Package Type 4x4 mm 20-Lead QFN RF2 75 RF1 75 CMOS Control Driver 75 C1 C2 Table 1. Electrical Specifications @ +25 C (ZS = ZL = 75 ) Parameter Operating Frequency Insertion Loss 1 Condition 5 MHz - 250 MHz 250 MHz - 750 MHz 750 MHz - 1000 MHz 1000 MHz - 2200 MHz 5 MHz - 250 MHz 250 MHz - 750 MHz 750 MHz - 1000 MHz 1000 MHz - 2200 MHz 5 MHz - 1000 MHz 5 MHz - 1000 MHz 1000 MHz 77 & 110 channels; Power Out = 44 dBmV 50% CTRL to 10/90 RF 5 MHz - 1000 MHz Minimum DC Typical 0.5 0.8 0.9 1.1 Maximum 2200 0.6 0.95 1.1 1.3 Units MHz dB Isolation Input IP22 Input IP3 2 67 60 57 44 50 29 72 65 60 47 75 50 26 -85 2 15 dB dBm dBm dBm dBc s mVpp Input 1dB Compression2 CTB / CSO Switching Time Video Feedthrough3 Notes: 1. Device linearity will begin to degrade below 1 MHz. 2. Measured in a 50 system. 3. Measured with a 1 ns risetime, 0/3 V pulse and 500 MHz bandwidth (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 8 Document No. 70-0164-01 Pre-release www.psemi.com PE4280 Product Specification Figure 3. Pin Configuration (Top View) 18 VSS/GND 19 GND 20 VDD 17 C1 Table 3. Absolute Maximum Ratings Symbol Parameter/Condition Power supply voltage Voltage on CTRL input RF CW power Storage temperature Operating temperature ESD voltage (Human Body Model) -65 -40 Min -0.3 -0.3 Max 4.0 VDD + 0.3 24 150 85 1000 Unit V V dBm C C V 16 C2 VDD VI PRF 15 GND 14 GND 13 RF2 12 GND 11 GND GND 1 GND 2 RF1 3 GND 4 GND 5 GND 10 TST TOP VESD Table 4. DC Electrical Specifications @ 25 C GND 6 GND 7 GND 9 RFC 8 Parameter VDD Power Supply IDD Power Supply Current (VDD = 3 V) Min 2.7 Typ 3.0 8 Max 3.3 20 Unit V A V 4x4 mm 20-Lead QFN Table 2. Pin Descriptions No. 1 2 31 4 5 6 7 8 1 Name GND GND RF1 GND GND GND GND RFC GND GND GND GND RF2 GND GND C2 C1 VSS / GND GND VDD GND Description Ground Ground RF I/O Ground Ground Ground Ground Common Ground Ground Ground Ground RF I/O Ground Ground Control 2 Control 1 Negative Supply Option Ground Supply Ground Pad Control Voltage High Control Voltage Low 70% VDD 30% VDD V Electrostatic Discharge (ESD) Precautions When handling this UTSi device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified. Latch-Up Avoidance Unlike conventional CMOS devices, UltraCMOSTM devices are immune to latch-up. Switching Frequency The PE4280 has a maximum 25 kHz switching rate when the internal negative voltage generator is used (pin 18=GND). The rate at which the PE4280 can be switched is only limited to the switching time if an external -3 V supply is provided at pin 18 (VSS). 9 10 11 12 13 1 14 15 162 172 183 19 20 Pad Notes: 1. RF pins 3, 8, and 13 must be at 0 VDC. The RF pins do not require DC blocking capacitors for proper operation if the 0 VDC requirement is met. 2. Pins 16 and 17 are the CMOS controls that set the three operating states. 3. Connect pin 18 to GND to enable the on-chip negative voltage generator. Connect pin 18 to VSS (-3 V) to bypass and disable internal -3 V supply generator. Also, see paragraph "Switching Frequency." (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 2 of 8 Document No. 70-0164-01 Pre-release UltraCMOSTM RFIC Solutions PE4280 Product Specification Table 5. RF Path Truth Table C1 Low Low High High C2 Low High Low High RFC - RF1 OFF OFF ON N/A 1 RFC - RF2 OFF ON OFF N/A1 Table 6. Termination Truth Table C1 Low Low High High Notes: C2 Low High Low High RFC - 75 X2 RF1 - 75 X2 X2 RF2 - 75 X2 X2 N/A1 N/A1 N/A1 1. The operation of the PE4280 is not supported or characterized in the C1=VDD and C2=VDD state. 2. "X" denotes termination enabled. Document No. 70-0164-01 Pre-release www.psemi.com (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 3 of 8 PE4280 Product Specification Evaluation Kit The SPDT Switch Evaluation Kit board was designed to ease customer evaluation of the PE4280 SPDT switch. The RFC port is connected through a 75 transmission line to J2. Port 1 and Port 2 are connected through 75 transmission lines to J1 and J3. A through transmission line connects F connectors J4 and J5. This transmission line can be used to estimate the loss of the PCB over the environmental conditions being evaluated. The board is constructed of a four metal layer FR4 material with a total thickness of 0.062". The transmission lines were designed using a coplanar waveguide with ground plane (28 mil core, 21mil width, 30 mil gap). J6 provides a means for controlling DC and digital inputs to the device. The provided jumpers short the package pin to ground for logic low. When the jumper is removed, the pin is pulled up to VDD for logic high. When the jumper is in place, 3 A of current will flow through the 1 M pull up resistor. This extra current should not be attributed to the requirements of the device. Proper PCB design is essential for full isolation performance. This eval board demonstrates good trace and ground management for minimum coupling and radiation. J1 Figure 4. Evaluation Board Layouts Figure 5. Evaluation Board Schematic J4 J5 J6-1 J6-5 J6-9 J6-13 GND VDD GND GND RF1 GND GND GND VSS/ GND C1 C2 GND GND PE4280 MLPQ 20-Lead 4x4 mm RF2 GND GND J3 GND GND J2 (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 4 of 8 Document No. 70-0164-01 Pre-release UltraCMOSTM RFIC Solutions GND RFC PE4280 Product Specification Typical Performance Data from -40C to +85C (Unless otherwise noted) (75 impedance except as indicated) Figure 6. Insertion Loss (RFC to RF1 or RF2) 25C -40C 85C -0.2 -0.4 -0.6 Insertion Loss (dB) Figure 7. Input to Output Isolation RFC - RF1 (RF2 CLOSED) RFC - RF2 (RF1 CLOSED) -40 -50 -60 Isolation (dB) -0.8 -1 -1.2 -1.4 -70 -80 -90 -1.6 -1.8 0 500 1000 1500 Frequency (MHz) -100 2000 2500 3000 0 500 1000 1500 Frequency (MHz) 2000 2500 3000 Figure 8. Input to Output Isolation RFC - RF1 (RF2 OPEN) RFC - RF2 (RF1 OPEN) Figure 9. Isolation - RF1 To RF2 RF1 - RF2 (RF1 Thru) RF1 - RF2 (RF2 Thru) RF1 - RF2 (RF1 & 2 OPEN) -40 -40 -50 -50 -60 Isolation (dB) Isolation (dB) -60 -70 -70 -80 -80 -90 -90 -100 0 500 1000 1500 Frequency (MHz) -100 2000 2500 3000 0 500 1000 1500 Frequency (MHz) 2000 2500 3000 Document No. 70-0164-01 Pre-release www.psemi.com (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 5 of 8 PE4280 Product Specification Typical Performance Data @ +25C (Unless otherwise noted) (75 impedance except as indicated) Figure 10. RFC Return Loss RFC Terminated RFC - RF1 CLOSED Figure 11. RF1 Return Loss RFC - RF1 CLOSED RF1 TERMINATED 0 0 -5 -5 -10 Return Loss (dB) Return Loss (dB) -10 -15 -15 -20 -20 -25 -25 -30 -30 -35 0 500 1000 1500 Frequency (MHz) -35 2000 2500 3000 0 500 1000 1500 Frequency (MHz) 2000 2500 3000 Figure 12. RF2 Return Loss RFC - RF2 CLOSED RF2 TERMINATED Figure 13. Linearity: 50 Impedance Input IP3 1dB Compression 0 60 -5 50 -10 40 Return Loss (dB) Power (dBm) -15 30 -20 20 -25 10 -30 -35 0 500 1000 1500 Frequency (MHz) 0 2000 2500 3000 0 500 1000 1500 Frequency (MHz) 2000 2500 3000 (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 6 of 8 Document No. 70-0164-01 Pre-release UltraCMOSTM RFIC Solutions PE4280 Product Specification Figure 14. Package Drawing (mm) 4.00 4x4 mm 20-Lead QFN INDEX AREA 2.00 X 2.00 -B- 2.00 2.00 0.25 C -A0.10 C 0.08 C 0.020 0.20 REF EXPOSED PAD & TERMINAL PADS 0.435 0.18 SEATING PLANE 0.80 4.00 -C2.00 TYP 0.50 TYP 0.55 2.00 1.00 5 11 0.435 0.18 4.00 1. DIMENSION APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 FROM TERMINAL TIP. 2. CCOPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS. DETAIL A 1 20 16 15 EXPOSED PAD 0.23 2.00 DETAIL A 1.00 6 10 2 1 0.10 CAB Figure 15. Tape and Reel Drawing Table 7. Ordering Information Order Code 4280-01 4280-02 4280-00 4280-51 4280-52 Part Marking 4280 4280 PE4280EK 4280 4280 Description PE4280-20QFN 4x4mm-75A PE4280-20QFN 4x4mm-3000C PE4280-20QFN 4x4mm-EK PE4280G-20QFN 4x4mm-75A PE4280G-20QFN 4x4mm-3000C Package 20-lead 4x4mm QFN 20-lead 4x4mm QFN Evaluation Kit Green 20-lead 4x4mm QFN Green 20-lead 4x4mm QFN Shipping Method 75 units / Tube 3000 units / T&R 1/ Box 75 units / Tube 3000 units / T&R Document No. 70-0164-01 Pre-release www.psemi.com (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 7 of 8 PE4280 Product Specification Sales Offices United States Peregrine Semiconductor Corp. 9450 Carroll Park Drive San Diego, CA 92121 Tel 1-858-731-9400 Fax 1-858-731-9499 Japan Peregrine Semiconductor K.K. 5A-5, 5F Imperial Tower 1-1-1 Uchisaiwaicho, Chiyoda-ku Tokyo 100-0011 Japan Tel: 011-81-3-3502-5211 Fax: 011-81-3-3502-5213 Europe Peregrine Semiconductor Europe Batiment Maine 13-15 rue des Quatre Vents F- 92380 Garches, France Tel: 011- 33-1-47-41-91-73 Fax : 011-33-1-47-41-91-73 China Peregrine Semiconductor 28G, Times Square, No. 500 Zhangyang Road, Shanghai, 200122, P.R. China Tel: 011-86-21-5836-8276 Fax: 011-86-21-5836-7652 For a list of representatives in your area, please refer to our Web site at: www.psemi.com Data Sheet Identification Advance Information The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications and features may change in any manner without notice. The information in this data sheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user's own risk. No patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. Peregrine's products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS is a trademark of Peregrine Semiconductor Corp. Preliminary Specification The data sheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification The data sheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a DCN (Document Change Notice). (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 8 of 8 Document No. 70-0164-01 Pre-release UltraCMOSTM RFIC Solutions |
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